blob: 3d865d140cc907231c66586bbf9155bf1b2ae6b9 [file] [log] [blame]
Ian Campbell2c7e3b92014-10-24 21:20:44 +01001if ARCH_SUNXI
2
Hans de Goede44d8ae52015-04-06 20:33:34 +02003# Note only one of these may be selected at a time! But hidden choices are
4# not supported by Kconfig
5config SUNXI_GEN_SUN4I
6 bool
7 ---help---
8 Select this for sunxi SoCs which have resets and clocks set up
9 as the original A10 (mach-sun4i).
10
11config SUNXI_GEN_SUN6I
12 bool
13 ---help---
14 Select this for sunxi SoCs which have sun6i like periphery, like
15 separate ahb reset control registers, custom pmic bus, new style
16 watchdog, etc.
17
18
Ian Campbell2c7e3b92014-10-24 21:20:44 +010019choice
20 prompt "Sunxi SoC Variant"
21
Ian Campbellc3be2792014-10-24 21:20:45 +010022config MACH_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010023 bool "sun4i (Allwinner A10)"
24 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020025 select SUNXI_GEN_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010026 select SUPPORT_SPL
27
Ian Campbellc3be2792014-10-24 21:20:45 +010028config MACH_SUN5I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010029 bool "sun5i (Allwinner A13)"
30 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020031 select SUNXI_GEN_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010032 select SUPPORT_SPL
33
Ian Campbellc3be2792014-10-24 21:20:45 +010034config MACH_SUN6I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010035 bool "sun6i (Allwinner A31)"
36 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020037 select SUNXI_GEN_SUN6I
Hans de Goede8c2c9cf2014-10-25 20:18:10 +020038 select SUPPORT_SPL
Ian Campbell2c7e3b92014-10-24 21:20:44 +010039
Ian Campbellc3be2792014-10-24 21:20:45 +010040config MACH_SUN7I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010041 bool "sun7i (Allwinner A20)"
42 select CPU_V7
Hans de Goedeea624e12014-11-14 09:34:30 +010043 select CPU_V7_HAS_NONSEC
44 select CPU_V7_HAS_VIRT
Hans de Goede44d8ae52015-04-06 20:33:34 +020045 select SUNXI_GEN_SUN4I
Ian Campbell2c7e3b92014-10-24 21:20:44 +010046 select SUPPORT_SPL
Hans de Goedeb366fb92014-10-24 20:12:04 +020047 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
Ian Campbell2c7e3b92014-10-24 21:20:44 +010048
Hans de Goede5e6bacd2015-04-06 20:55:39 +020049config MACH_SUN8I_A23
Ian Campbell2c7e3b92014-10-24 21:20:44 +010050 bool "sun8i (Allwinner A23)"
51 select CPU_V7
Hans de Goede44d8ae52015-04-06 20:33:34 +020052 select SUNXI_GEN_SUN6I
Hans de Goede08fd1472014-12-07 14:34:27 +010053 select SUPPORT_SPL
Ian Campbell2c7e3b92014-10-24 21:20:44 +010054
55endchoice
Maxime Ripard8a6564d2014-10-03 20:16:29 +080056
Hans de Goede5e6bacd2015-04-06 20:55:39 +020057# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
58config MACH_SUN8I
59 bool
60 default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
61
62
Hans de Goede37781a12014-11-15 19:46:39 +010063config DRAM_CLK
Hans de Goede8ffc4872015-01-17 14:24:55 +010064 int "sunxi dram clock speed"
65 default 312 if MACH_SUN6I || MACH_SUN8I
66 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
Hans de Goede37781a12014-11-15 19:46:39 +010067 ---help---
68 Set the dram clock speed, valid range 240 - 480, must be a multiple
Hans de Goedee1a08882015-01-25 11:29:27 +010069 of 24.
Hans de Goede37781a12014-11-15 19:46:39 +010070
Siarhei Siamashka47e35012015-02-01 00:27:06 +020071if MACH_SUN5I || MACH_SUN7I
72config DRAM_MBUS_CLK
73 int "sunxi mbus clock speed"
74 default 300
75 ---help---
76 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
77
78endif
79
Hans de Goede37781a12014-11-15 19:46:39 +010080config DRAM_ZQ
Hans de Goede8ffc4872015-01-17 14:24:55 +010081 int "sunxi dram zq value"
82 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
83 default 127 if MACH_SUN7I
Hans de Goede37781a12014-11-15 19:46:39 +010084 ---help---
Hans de Goedee1a08882015-01-25 11:29:27 +010085 Set the dram zq value.
Hans de Goede37781a12014-11-15 19:46:39 +010086
Hans de Goede8ffc4872015-01-17 14:24:55 +010087if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
88config DRAM_EMR1
89 int "sunxi dram emr1 value"
90 default 0 if MACH_SUN4I
91 default 4 if MACH_SUN5I || MACH_SUN7I
92 ---help---
Hans de Goedee1a08882015-01-25 11:29:27 +010093 Set the dram controller emr1 value.
Siarhei Siamashkad1336472015-02-01 00:27:05 +020094
Siarhei Siamashka47e35012015-02-01 00:27:06 +020095config DRAM_ODT_EN
96 int "sunxi dram odt_en value"
97 default 0
98 ---help---
99 Set the dram controller odt_en parameter. This can be used to
100 enable/disable the ODT feature.
101
102config DRAM_TPR3
103 hex "sunxi dram tpr3 value"
104 default 0
105 ---help---
106 Set the dram controller tpr3 parameter. This parameter configures
107 the delay on the command lane and also phase shifts, which are
108 applied for sampling incoming read data. The default value 0
109 means that no phase/delay adjustments are necessary. Properly
110 configuring this parameter increases reliability at high DRAM
111 clock speeds.
112
113config DRAM_DQS_GATING_DELAY
114 hex "sunxi dram dqs_gating_delay value"
115 default 0
116 ---help---
117 Set the dram controller dqs_gating_delay parmeter. Each byte
118 encodes the DQS gating delay for each byte lane. The delay
119 granularity is 1/4 cycle. For example, the value 0x05060606
120 means that the delay is 5 quarter-cycles for one lane (1.25
121 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
122 The default value 0 means autodetection. The results of hardware
123 autodetection are not very reliable and depend on the chip
124 temperature (sometimes producing different results on cold start
125 and warm reboot). But the accuracy of hardware autodetection
126 is usually good enough, unless running at really high DRAM
127 clocks speeds (up to 600MHz). If unsure, keep as 0.
128
Siarhei Siamashkad1336472015-02-01 00:27:05 +0200129choice
130 prompt "sunxi dram timings"
131 default DRAM_TIMINGS_VENDOR_MAGIC
132 ---help---
133 Select the timings of the DDR3 chips.
134
135config DRAM_TIMINGS_VENDOR_MAGIC
136 bool "Magic vendor timings from Android"
137 ---help---
138 The same DRAM timings as in the Allwinner boot0 bootloader.
139
140config DRAM_TIMINGS_DDR3_1066F_1333H
141 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
142 ---help---
143 Use the timings of the standard JEDEC DDR3-1066F speed bin for
144 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
145 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
146 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
147 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
148 that down binning to DDR3-1066F is supported (because DDR3-1066F
149 uses a bit faster timings than DDR3-1333H).
150
151config DRAM_TIMINGS_DDR3_800E_1066G_1333J
152 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
153 ---help---
154 Use the timings of the slowest possible JEDEC speed bin for the
155 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
156 DDR3-800E, DDR3-1066G or DDR3-1333J.
157
158endchoice
159
Hans de Goede37781a12014-11-15 19:46:39 +0100160endif
161
Iain Patone71b4222015-03-28 10:26:38 +0000162config SYS_CLK_FREQ
163 default 912000000 if MACH_SUN7I
164 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
165
Maxime Ripard8a6564d2014-10-03 20:16:29 +0800166config SYS_CONFIG_NAME
Ian Campbellc3be2792014-10-24 21:20:45 +0100167 default "sun4i" if MACH_SUN4I
168 default "sun5i" if MACH_SUN5I
169 default "sun6i" if MACH_SUN6I
170 default "sun7i" if MACH_SUN7I
171 default "sun8i" if MACH_SUN8I
Hans de Goede6ae66f22014-08-01 09:28:24 +0200172
Masahiro Yamadadd840582014-07-30 14:08:14 +0900173config SYS_BOARD
Masahiro Yamadadd840582014-07-30 14:08:14 +0900174 default "sunxi"
175
176config SYS_SOC
Masahiro Yamadadd840582014-07-30 14:08:14 +0900177 default "sunxi"
178
Ian Campbell4ce99412014-10-24 21:20:46 +0100179config SPL_FEL
180 bool "SPL/FEL mode support"
181 depends on SPL
182 default n
Simon Glass942cb0b2015-02-07 10:47:30 -0700183 help
184 This enables support for Fast Early Loader (FEL) mode. This
185 allows U-Boot to be loaded to the board over USB by the on-chip
186 boot rom. U-Boot should be sent in two parts: SPL first, with
187 'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000' then U-Boot with
188 'fel write 0x4a000000 u-boot.bin; fel exe 0x4a000000'. This option
189 shrinks the amount of SRAM available to SPL, so only enable it if
190 you need FEL. Note that enabling this option only allows FEL to be
191 used; it is still possible to boot U-Boot from boot media. U-Boot
192 SPL detects when it is being loaded using FEL.
Ian Campbell4ce99412014-10-24 21:20:46 +0100193
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200194config UART0_PORT_F
195 bool "UART0 on MicroSD breakout board"
196 depends on SPL_FEL
197 default n
198 ---help---
199 Repurpose the SD card slot for getting access to the UART0 serial
200 console. Primarily useful only for low level u-boot debugging on
201 tablets, where normal UART0 is difficult to access and requires
202 device disassembly and/or soldering. As the SD card can't be used
203 at the same time, the system can be only booted in the FEL mode.
204 Only enable this if you really know what you are doing.
205
Ian Campbell98e214d2014-08-31 13:13:43 +0100206config FDTFILE
207 string "Default fdtfile env setting for this board"
Hans de Goede846e3252014-08-01 09:37:58 +0200208
Hans de Goedeaccc9e42014-10-22 14:56:36 +0200209config OLD_SUNXI_KERNEL_COMPAT
210 boolean "Enable workarounds for booting old kernels"
211 default n
212 ---help---
213 Set this to enable various workarounds for old kernels, this results in
214 sub-optimal settings for newer kernels, only enable if needed.
215
Hans de Goedecd821132014-10-02 20:29:26 +0200216config MMC0_CD_PIN
217 string "Card detect pin for mmc0"
218 default ""
219 ---help---
220 Set the card detect pin for mmc0, leave empty to not use cd. This
221 takes a string in the format understood by sunxi_name_to_gpio, e.g.
222 PH1 for pin 1 of port H.
223
224config MMC1_CD_PIN
225 string "Card detect pin for mmc1"
226 default ""
227 ---help---
228 See MMC0_CD_PIN help text.
229
230config MMC2_CD_PIN
231 string "Card detect pin for mmc2"
232 default ""
233 ---help---
234 See MMC0_CD_PIN help text.
235
236config MMC3_CD_PIN
237 string "Card detect pin for mmc3"
238 default ""
239 ---help---
240 See MMC0_CD_PIN help text.
241
Paul Kocialkowski8deacca2015-03-22 18:12:23 +0100242config MMC1_PINS
243 string "Pins for mmc1"
244 default ""
245 ---help---
246 Set the pins used for mmc1, when applicable. This takes a string in the
247 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
248
249config MMC2_PINS
250 string "Pins for mmc2"
251 default ""
252 ---help---
253 See MMC1_PINS help text.
254
255config MMC3_PINS
256 string "Pins for mmc3"
257 default ""
258 ---help---
259 See MMC1_PINS help text.
260
Hans de Goede2ccfac02014-10-02 20:43:50 +0200261config MMC_SUNXI_SLOT_EXTRA
262 int "mmc extra slot number"
263 default -1
264 ---help---
265 sunxi builds always enable mmc0, some boards also have a second sdcard
266 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
267 support for this.
268
Hans de Goede4458b7a2015-01-07 15:26:06 +0100269config USB0_VBUS_PIN
270 string "Vbus enable pin for usb0 (otg)"
271 default ""
272 ---help---
273 Set the Vbus enable pin for usb0 (otg). This takes a string in the
274 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
275
Hans de Goede52defe82015-02-16 22:13:43 +0100276config USB0_VBUS_DET
277 string "Vbus detect pin for usb0 (otg)"
Hans de Goede52defe82015-02-16 22:13:43 +0100278 default ""
279 ---help---
280 Set the Vbus detect pin for usb0 (otg). This takes a string in the
281 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
282
Hans de Goede115200c2014-11-07 16:09:00 +0100283config USB1_VBUS_PIN
284 string "Vbus enable pin for usb1 (ehci0)"
285 default "PH6" if MACH_SUN4I || MACH_SUN7I
Hans de Goede76946df2014-11-07 14:51:12 +0100286 default "PH27" if MACH_SUN6I
Hans de Goede115200c2014-11-07 16:09:00 +0100287 ---help---
288 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
289 a string in the format understood by sunxi_name_to_gpio, e.g.
290 PH1 for pin 1 of port H.
291
292config USB2_VBUS_PIN
293 string "Vbus enable pin for usb2 (ehci1)"
294 default "PH3" if MACH_SUN4I || MACH_SUN7I
Hans de Goede76946df2014-11-07 14:51:12 +0100295 default "PH24" if MACH_SUN6I
Hans de Goede115200c2014-11-07 16:09:00 +0100296 ---help---
297 See USB1_VBUS_PIN help text.
298
Paul Kocialkowski6c739c52015-04-10 23:09:52 +0200299config I2C0_ENABLE
300 bool "Enable I2C/TWI controller 0"
301 default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
302 default n if MACH_SUN6I || MACH_SUN8I
303 ---help---
304 This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
305 its clock and setting up the bus. This is especially useful on devices
306 with slaves connected to the bus or with pins exposed through e.g. an
307 expansion port/header.
308
309config I2C1_ENABLE
310 bool "Enable I2C/TWI controller 1"
311 default n
312 ---help---
313 See I2C0_ENABLE help text.
314
315config I2C2_ENABLE
316 bool "Enable I2C/TWI controller 2"
317 default n
318 ---help---
319 See I2C0_ENABLE help text.
320
321if MACH_SUN6I || MACH_SUN7I
322config I2C3_ENABLE
323 bool "Enable I2C/TWI controller 3"
324 default n
325 ---help---
326 See I2C0_ENABLE help text.
327endif
328
329if MACH_SUN7I
330config I2C4_ENABLE
331 bool "Enable I2C/TWI controller 4"
332 default n
333 ---help---
334 See I2C0_ENABLE help text.
335endif
336
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200337config VIDEO
Hans de Goede2dae8002014-12-21 16:28:32 +0100338 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200339 default y
340 ---help---
Hans de Goede2dae8002014-12-21 16:28:32 +0100341 Say Y here to add support for using a cfb console on the HDMI, LCD
342 or VGA output found on most sunxi devices. See doc/README.video for
343 info on how to select the video output and mode.
344
Hans de Goede2fbf0912014-12-23 23:04:35 +0100345config VIDEO_HDMI
346 boolean "HDMI output support"
347 depends on VIDEO && !MACH_SUN8I
348 default y
349 ---help---
350 Say Y here to add support for outputting video over HDMI.
351
Hans de Goeded9786d22014-12-25 13:58:06 +0100352config VIDEO_VGA
353 boolean "VGA output support"
354 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
355 default n
356 ---help---
357 Say Y here to add support for outputting video over VGA.
358
Hans de Goedee2bbdfb2014-12-24 12:17:07 +0100359config VIDEO_VGA_VIA_LCD
360 boolean "VGA via LCD controller support"
Chen-Yu Tsai2583d5b2015-01-12 18:02:10 +0800361 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
Hans de Goedee2bbdfb2014-12-24 12:17:07 +0100362 default n
363 ---help---
364 Say Y here to add support for external DACs connected to the parallel
365 LCD interface driving a VGA connector, such as found on the
366 Olimex A13 boards.
367
Hans de Goedefb75d972015-01-25 15:33:07 +0100368config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
369 boolean "Force sync active high for VGA via LCD controller support"
370 depends on VIDEO_VGA_VIA_LCD
371 default n
372 ---help---
373 Say Y here if you've a board which uses opendrain drivers for the vga
374 hsync and vsync signals. Opendrain drivers cannot generate steep enough
375 positive edges for a stable video output, so on boards with opendrain
376 drivers the sync signals must always be active high.
377
Chen-Yu Tsai507e27d2015-01-12 18:02:11 +0800378config VIDEO_VGA_EXTERNAL_DAC_EN
379 string "LCD panel power enable pin"
380 depends on VIDEO_VGA_VIA_LCD
381 default ""
382 ---help---
383 Set the enable pin for the external VGA DAC. This takes a string in the
384 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
385
Hans de Goede2dae8002014-12-21 16:28:32 +0100386config VIDEO_LCD_MODE
387 string "LCD panel timing details"
388 depends on VIDEO
389 default ""
390 ---help---
391 LCD panel timing details string, leave empty if there is no LCD panel.
392 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
393 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
394
Hans de Goede65150322015-01-13 13:21:46 +0100395config VIDEO_LCD_DCLK_PHASE
396 int "LCD panel display clock phase"
397 depends on VIDEO
398 default 1
399 ---help---
400 Select LCD panel display clock phase shift, range 0-3.
401
Hans de Goede2dae8002014-12-21 16:28:32 +0100402config VIDEO_LCD_POWER
403 string "LCD panel power enable pin"
404 depends on VIDEO
405 default ""
406 ---help---
407 Set the power enable pin for the LCD panel. This takes a string in the
408 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
409
Hans de Goede242e3d82015-02-16 17:26:41 +0100410config VIDEO_LCD_RESET
411 string "LCD panel reset pin"
412 depends on VIDEO
413 default ""
414 ---help---
415 Set the reset pin for the LCD panel. This takes a string in the format
416 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
417
Hans de Goede2dae8002014-12-21 16:28:32 +0100418config VIDEO_LCD_BL_EN
419 string "LCD panel backlight enable pin"
420 depends on VIDEO
421 default ""
422 ---help---
423 Set the backlight enable pin for the LCD panel. This takes a string in the
424 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
425 port H.
426
427config VIDEO_LCD_BL_PWM
428 string "LCD panel backlight pwm pin"
429 depends on VIDEO
430 default ""
431 ---help---
432 Set the backlight pwm pin for the LCD panel. This takes a string in the
433 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200434
Hans de Goedea7403ae2015-01-22 21:02:42 +0100435config VIDEO_LCD_BL_PWM_ACTIVE_LOW
436 bool "LCD panel backlight pwm is inverted"
437 depends on VIDEO
438 default y
439 ---help---
440 Set this if the backlight pwm output is active low.
441
Hans de Goede55410082015-02-16 17:23:25 +0100442config VIDEO_LCD_PANEL_I2C
443 bool "LCD panel needs to be configured via i2c"
444 depends on VIDEO
Hans de Goede1fc42012015-03-07 12:00:02 +0100445 default n
Hans de Goede55410082015-02-16 17:23:25 +0100446 ---help---
447 Say y here if the LCD panel needs to be configured via i2c. This
448 will add a bitbang i2c controller using gpios to talk to the LCD.
449
450config VIDEO_LCD_PANEL_I2C_SDA
451 string "LCD panel i2c interface SDA pin"
452 depends on VIDEO_LCD_PANEL_I2C
453 default "PG12"
454 ---help---
455 Set the SDA pin for the LCD i2c interface. This takes a string in the
456 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
457
458config VIDEO_LCD_PANEL_I2C_SCL
459 string "LCD panel i2c interface SCL pin"
460 depends on VIDEO_LCD_PANEL_I2C
461 default "PG10"
462 ---help---
463 Set the SCL pin for the LCD i2c interface. This takes a string in the
464 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
465
Hans de Goede213480e2015-01-01 22:04:34 +0100466
467# Note only one of these may be selected at a time! But hidden choices are
468# not supported by Kconfig
469config VIDEO_LCD_IF_PARALLEL
470 bool
471
472config VIDEO_LCD_IF_LVDS
473 bool
474
475
476choice
477 prompt "LCD panel support"
478 depends on VIDEO
479 ---help---
480 Select which type of LCD panel to support.
481
482config VIDEO_LCD_PANEL_PARALLEL
483 bool "Generic parallel interface LCD panel"
484 select VIDEO_LCD_IF_PARALLEL
485
486config VIDEO_LCD_PANEL_LVDS
487 bool "Generic lvds interface LCD panel"
488 select VIDEO_LCD_IF_LVDS
489
Siarhei Siamashka97ece832015-01-19 05:23:33 +0200490config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
491 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
492 select VIDEO_LCD_SSD2828
493 select VIDEO_LCD_IF_PARALLEL
494 ---help---
495 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
496
Hans de Goede27515b22015-01-20 09:23:36 +0100497config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
498 bool "Hitachi tx18d42vm LCD panel"
499 select VIDEO_LCD_HITACHI_TX18D42VM
500 select VIDEO_LCD_IF_LVDS
501 ---help---
502 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
503
Hans de Goedeaad2ac22015-02-16 17:49:47 +0100504config VIDEO_LCD_TL059WV5C0
505 bool "tl059wv5c0 LCD panel"
506 select VIDEO_LCD_PANEL_I2C
507 select VIDEO_LCD_IF_PARALLEL
508 ---help---
509 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
510 Aigo M60/M608/M606 tablets.
511
Hans de Goede213480e2015-01-01 22:04:34 +0100512endchoice
513
514
Hans de Goede1a800f72015-01-11 17:17:00 +0100515config USB_MUSB_SUNXI
516 bool "Enable sunxi OTG / DRC USB controller in host mode"
517 default n
518 ---help---
519 Say y here to enable support for the sunxi OTG / DRC USB controller
520 used on almost all sunxi boards. Note currently u-boot can only have
521 one usb host controller enabled at a time, so enabling this on boards
522 which also use the ehci host controller will result in build errors.
523
Hans de Goede86b49092014-09-18 21:03:34 +0200524config USB_KEYBOARD
525 boolean "Enable USB keyboard support"
526 default y
527 ---help---
528 Say Y here to add support for using a USB keyboard (typically used
Hans de Goede2dae8002014-12-21 16:28:32 +0100529 in combination with a graphical console).
Hans de Goede86b49092014-09-18 21:03:34 +0200530
Hans de Goedec13f60d2015-01-25 12:10:48 +0100531config GMAC_TX_DELAY
532 int "GMAC Transmit Clock Delay Chain"
533 default 0
534 ---help---
535 Set the GMAC Transmit Clock Delay Chain value.
536
Masahiro Yamadadd840582014-07-30 14:08:14 +0900537endif