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Ian Campbellcba69ee2014-05-05 11:52:26 +01001/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
16/*
17 * High Level Configuration Options
18 */
19#define CONFIG_SUNXI /* sunxi family */
Ian Campbell50827a52014-05-05 11:52:30 +010020#ifdef CONFIG_SPL_BUILD
21#ifndef CONFIG_SPL_FEL
22#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
23#endif
24#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010025
26#include <asm/arch/cpu.h> /* get chip and board defs */
27
28#define CONFIG_SYS_TEXT_BASE 0x4a000000
29
Simon Glass57f878e2014-10-30 20:25:46 -060030#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM)
Simon Glass1a81cf832014-10-30 20:25:50 -060031# define CONFIG_DW_SERIAL
Simon Glass57f878e2014-10-30 20:25:46 -060032#endif
33
Ian Campbellcba69ee2014-05-05 11:52:26 +010034/*
35 * Display CPU information
36 */
37#define CONFIG_DISPLAY_CPUINFO
38
Ian Campbell4e7c8922015-01-23 10:17:35 +000039#define CONFIG_SYS_PROMPT "sunxi# "
40
Ian Campbellcba69ee2014-05-05 11:52:26 +010041/* Serial & console */
42#define CONFIG_SYS_NS16550
43#define CONFIG_SYS_NS16550_SERIAL
44/* ns16550 reg in the low bits of cpu reg */
Ian Campbellcba69ee2014-05-05 11:52:26 +010045#define CONFIG_SYS_NS16550_CLK 24000000
Simon Glass1a81cf832014-10-30 20:25:50 -060046#ifndef CONFIG_DM_SERIAL
47# define CONFIG_SYS_NS16550_REG_SIZE -4
48# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
49# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
50# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
51# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
52# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
53#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010054
55/* DRAM Base */
56#define CONFIG_SYS_SDRAM_BASE 0x40000000
57#define CONFIG_SYS_INIT_RAM_ADDR 0x0
58#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
59
60#define CONFIG_SYS_INIT_SP_OFFSET \
61 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
62#define CONFIG_SYS_INIT_SP_ADDR \
63 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
64
65#define CONFIG_NR_DRAM_BANKS 1
66#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
67#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
68
Ian Campbella6e50a82014-07-18 20:38:41 +010069#ifdef CONFIG_AHCI
70#define CONFIG_LIBATA
71#define CONFIG_SCSI_AHCI
72#define CONFIG_SCSI_AHCI_PLAT
73#define CONFIG_SUNXI_AHCI
74#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
75#define CONFIG_SYS_SCSI_MAX_LUN 1
76#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
77 CONFIG_SYS_SCSI_MAX_LUN)
78#define CONFIG_CMD_SCSI
79#endif
80
Ian Campbellcba69ee2014-05-05 11:52:26 +010081#define CONFIG_CMD_MEMORY
82#define CONFIG_CMD_SETEXPR
83
Hans de Goedebd2a4882015-02-04 00:43:36 +010084#define CONFIG_PARTITION_UUIDS
85#define CONFIG_CMD_PART
86
Ian Campbellcba69ee2014-05-05 11:52:26 +010087#define CONFIG_SETUP_MEMORY_TAGS
88#define CONFIG_CMDLINE_TAG
89#define CONFIG_INITRD_TAG
90
Ian Campbelle24ea552014-05-05 14:42:31 +010091/* mmc config */
Chen-Yu Tsaiff2b47f2014-10-22 16:47:42 +080092#if !defined(CONFIG_UART0_PORT_F)
Ian Campbelle24ea552014-05-05 14:42:31 +010093#define CONFIG_MMC
94#define CONFIG_GENERIC_MMC
95#define CONFIG_CMD_MMC
96#define CONFIG_MMC_SUNXI
97#define CONFIG_MMC_SUNXI_SLOT 0
Ian Campbelle24ea552014-05-05 14:42:31 +010098#define CONFIG_ENV_IS_IN_MMC
99#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
Chen-Yu Tsaiff2b47f2014-10-22 16:47:42 +0800100#endif
Ian Campbelle24ea552014-05-05 14:42:31 +0100101
Ian Campbellcba69ee2014-05-05 11:52:26 +0100102/* 4MB of malloc() pool */
103#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
104
105/*
106 * Miscellaneous configurable options
107 */
108#define CONFIG_CMD_ECHO
Ian Campbell06beadb2014-10-07 14:20:30 +0100109#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
110#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100111#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
112#define CONFIG_SYS_GENERIC_BOARD
113
114/* Boot Argument Buffer Size */
115#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
116
Hans de Goede846e3252014-08-01 09:37:58 +0200117#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100118
119/* standalone support */
Hans de Goede846e3252014-08-01 09:37:58 +0200120#define CONFIG_STANDALONE_LOAD_ADDR 0x42000000
Ian Campbellcba69ee2014-05-05 11:52:26 +0100121
Ian Campbellcba69ee2014-05-05 11:52:26 +0100122/* baudrate */
123#define CONFIG_BAUDRATE 115200
124
125/* The stack sizes are set up in start.S using the settings below */
126#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
127
128/* FLASH and environment organization */
129
130#define CONFIG_SYS_NO_FLASH
131
132#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */
133#define CONFIG_IDENT_STRING " Allwinner Technology"
134
Ian Campbelle24ea552014-05-05 14:42:31 +0100135#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100136#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
137
Ian Campbellcba69ee2014-05-05 11:52:26 +0100138#include <config_cmd_default.h>
Hans de Goedeb9fb3b92014-08-01 09:19:55 +0200139#undef CONFIG_CMD_FPGA
Ian Campbellcba69ee2014-05-05 11:52:26 +0100140
141#define CONFIG_FAT_WRITE /* enable write access */
142
143#define CONFIG_SPL_FRAMEWORK
144#define CONFIG_SPL_LIBCOMMON_SUPPORT
145#define CONFIG_SPL_SERIAL_SUPPORT
146#define CONFIG_SPL_LIBGENERIC_SUPPORT
147
Ian Campbell50827a52014-05-05 11:52:30 +0100148#ifdef CONFIG_SPL_FEL
149
Ian Campbellcba69ee2014-05-05 11:52:26 +0100150#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
151#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
152#define CONFIG_SPL_TEXT_BASE 0x2000
153#define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */
Ian Campbell50827a52014-05-05 11:52:30 +0100154
155#else /* CONFIG_SPL */
156
157#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
158#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */
159
160#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
161#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
162
163#define CONFIG_SPL_LIBDISK_SUPPORT
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200164
165#if !defined(CONFIG_UART0_PORT_F)
Ian Campbell50827a52014-05-05 11:52:30 +0100166#define CONFIG_SPL_MMC_SUPPORT
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200167#endif
Ian Campbell50827a52014-05-05 11:52:30 +0100168
169#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
170
171#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
172#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
173
174#endif /* CONFIG_SPL */
175
Ian Campbellcba69ee2014-05-05 11:52:26 +0100176/* end of 32 KiB in sram */
177#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
178#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
179#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
180#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
181
Hans de Goede66203772014-06-13 22:55:49 +0200182/* I2C */
Hans de Goedead406102015-01-23 15:28:22 +0100183#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER
Hans de Goede66203772014-06-13 22:55:49 +0200184#define CONFIG_SPL_I2C_SUPPORT
Hans de Goedead406102015-01-23 15:28:22 +0100185#endif
186
Hans de Goede66203772014-06-13 22:55:49 +0200187#define CONFIG_SYS_I2C
188#define CONFIG_SYS_I2C_MVTWSI
189#define CONFIG_SYS_I2C_SPEED 400000
190#define CONFIG_SYS_I2C_SLAVE 0x7f
191#define CONFIG_CMD_I2C
192
Henrik Nordstrom14bc66b2014-06-13 22:55:50 +0200193/* PMU */
194#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
195#define CONFIG_SPL_POWER_SUPPORT
196#endif
197
Hans de Goedef84269c2014-06-09 11:36:58 +0200198#ifndef CONFIG_CONS_INDEX
Ian Campbellcba69ee2014-05-05 11:52:26 +0100199#define CONFIG_CONS_INDEX 1 /* UART0 */
Hans de Goedef84269c2014-06-09 11:36:58 +0200200#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +0100201
Ian Campbellabce2c62014-06-05 19:00:15 +0100202/* GPIO */
203#define CONFIG_SUNXI_GPIO
Hans de Goedecd821132014-10-02 20:29:26 +0200204#define CONFIG_SPL_GPIO_SUPPORT
Ian Campbellabce2c62014-06-05 19:00:15 +0100205#define CONFIG_CMD_GPIO
206
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200207#ifdef CONFIG_VIDEO
208/*
209 * The amount of RAM that is reserved for the FB. This will not show up as
210 * RAM to the kernel, but will be reclaimed by a KMS driver in future.
211 */
Hans de Goede5f339932014-12-19 14:03:40 +0100212#define CONFIG_SUNXI_FB_SIZE (9 << 20)
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200213
Luc Verhaegen2d7a0842014-08-13 07:55:07 +0200214/* Do we want to initialize a simple FB? */
215#define CONFIG_VIDEO_DT_SIMPLEFB
216
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200217#define CONFIG_VIDEO_SUNXI
218
219#define CONFIG_CFB_CONSOLE
220#define CONFIG_VIDEO_SW_CURSOR
221#define CONFIG_VIDEO_LOGO
Hans de Goedebe8ec632014-12-19 13:46:33 +0100222#define CONFIG_VIDEO_STD_TIMINGS
Hans de Goede75481602014-12-19 16:05:12 +0100223#define CONFIG_I2C_EDID
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200224
225/* allow both serial and cfb console. */
226#define CONFIG_CONSOLE_MUX
227/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
228#define CONFIG_VGA_AS_SINGLE_DEVICE
229
230#define CONFIG_SYS_MEM_TOP_HIDE ((CONFIG_SUNXI_FB_SIZE + 0xFFF) & ~0xFFF)
231
Luc Verhaegen2d7a0842014-08-13 07:55:07 +0200232/* To be able to hook simplefb into dt */
233#ifdef CONFIG_VIDEO_DT_SIMPLEFB
234#define CONFIG_OF_BOARD_SETUP
235#endif
236
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200237#endif /* CONFIG_VIDEO */
238
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200239/* Ethernet support */
240#ifdef CONFIG_SUNXI_EMAC
241#define CONFIG_MII /* MII PHY management */
242#endif
243
Ian Campbell58358232014-05-05 11:52:28 +0100244#ifdef CONFIG_SUNXI_GMAC
245#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
246#define CONFIG_DW_AUTONEG
247#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
248#define CONFIG_PHY_ADDR 1
249#define CONFIG_MII /* MII PHY management */
250#define CONFIG_PHYLIB
251#endif
252
Roman Byshko3584f302014-07-24 22:54:22 +0200253#ifdef CONFIG_USB_EHCI
Roman Byshko3584f302014-07-24 22:54:22 +0200254#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
Hans de Goede1a800f72015-01-11 17:17:00 +0100255#endif
256
257#ifdef CONFIG_USB_MUSB_SUNXI
258#define CONFIG_MUSB_HOST
259#define CONFIG_MUSB_PIO_ONLY
260#endif
261
262#if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI
263#define CONFIG_CMD_USB
Roman Byshko3584f302014-07-24 22:54:22 +0200264#define CONFIG_USB_STORAGE
265#endif
266
Hans de Goede86b49092014-09-18 21:03:34 +0200267#ifdef CONFIG_USB_KEYBOARD
268#define CONFIG_CONSOLE_MUX
269#define CONFIG_PREBOOT
270#define CONFIG_SYS_STDIO_DEREGISTER
271#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
272#endif
273
Ian Campbellcba69ee2014-05-05 11:52:26 +0100274#if !defined CONFIG_ENV_IS_IN_MMC && \
275 !defined CONFIG_ENV_IS_IN_NAND && \
276 !defined CONFIG_ENV_IS_IN_FAT && \
277 !defined CONFIG_ENV_IS_IN_SPI_FLASH
278#define CONFIG_ENV_IS_NOWHERE
279#endif
280
Jonathan Liub41d7d02014-06-14 08:59:09 +0200281#define CONFIG_MISC_INIT_R
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200282#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Jonathan Liub41d7d02014-06-14 08:59:09 +0200283
Ian Campbellcba69ee2014-05-05 11:52:26 +0100284#ifndef CONFIG_SPL_BUILD
285#include <config_distro_defaults.h>
Hans de Goede2ec3a612014-07-31 23:04:45 +0200286
Siarhei Siamashkaa7925072015-01-08 09:02:32 +0200287/* Enable pre-console buffer to get complete log on the VGA console */
288#define CONFIG_PRE_CONSOLE_BUFFER
289#define CONFIG_PRE_CON_BUF_SZ (1024 * 1024)
290/* Use the room between the end of bootm_size and the framebuffer */
291#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
292
Hans de Goede8c95c552014-12-24 16:08:30 +0100293/*
294 * 240M RAM (256M minimum minus space for the framebuffer),
295 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
296 * 1M script, 1M pxe and the ramdisk at the end.
297 */
Hans de Goede846e3252014-08-01 09:37:58 +0200298#define MEM_LAYOUT_ENV_SETTINGS \
Hans de Goede8c95c552014-12-24 16:08:30 +0100299 "bootm_size=0xf000000\0" \
Hans de Goede846e3252014-08-01 09:37:58 +0200300 "kernel_addr_r=0x42000000\0" \
301 "fdt_addr_r=0x43000000\0" \
302 "scriptaddr=0x43100000\0" \
303 "pxefile_addr_r=0x43200000\0" \
304 "ramdisk_addr_r=0x43300000\0"
305
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800306#ifdef CONFIG_MMC
307#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
308#else
309#define BOOT_TARGET_DEVICES_MMC(func)
310#endif
311
Hans de Goede2ec3a612014-07-31 23:04:45 +0200312#ifdef CONFIG_AHCI
313#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
314#else
315#define BOOT_TARGET_DEVICES_SCSI(func)
316#endif
317
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800318#ifdef CONFIG_USB_EHCI
319#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
320#else
321#define BOOT_TARGET_DEVICES_USB(func)
322#endif
323
Hans de Goede2ec3a612014-07-31 23:04:45 +0200324#define BOOT_TARGET_DEVICES(func) \
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800325 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200326 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800327 BOOT_TARGET_DEVICES_USB(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200328 func(PXE, pxe, na) \
329 func(DHCP, dhcp, na)
330
331#include <config_distro_bootcmd.h>
332
Hans de Goede86b49092014-09-18 21:03:34 +0200333#ifdef CONFIG_USB_KEYBOARD
334#define CONSOLE_STDIN_SETTINGS \
335 "preboot=usb start\0" \
336 "stdin=serial,usbkbd\0"
337#else
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200338#define CONSOLE_STDIN_SETTINGS \
339 "stdin=serial\0"
Hans de Goede86b49092014-09-18 21:03:34 +0200340#endif
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200341
342#ifdef CONFIG_VIDEO
343#define CONSOLE_STDOUT_SETTINGS \
344 "stdout=serial,vga\0" \
345 "stderr=serial,vga\0"
346#else
347#define CONSOLE_STDOUT_SETTINGS \
348 "stdout=serial\0" \
349 "stderr=serial\0"
350#endif
351
352#define CONSOLE_ENV_SETTINGS \
353 CONSOLE_STDIN_SETTINGS \
354 CONSOLE_STDOUT_SETTINGS
355
Hans de Goede2ec3a612014-07-31 23:04:45 +0200356#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200357 CONSOLE_ENV_SETTINGS \
Hans de Goede846e3252014-08-01 09:37:58 +0200358 MEM_LAYOUT_ENV_SETTINGS \
Ian Campbell98e214d2014-08-31 13:13:43 +0100359 "fdtfile=" CONFIG_FDTFILE "\0" \
Hans de Goede846e3252014-08-01 09:37:58 +0200360 "console=ttyS0,115200\0" \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200361 BOOTENV
362
363#else /* ifndef CONFIG_SPL_BUILD */
364#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbellcba69ee2014-05-05 11:52:26 +0100365#endif
366
367#endif /* _SUNXI_COMMON_CONFIG_H */