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Bin Meng5dad97e2014-12-17 15:50:48 +08001#
2# Copyright (C) 2014, Simon Glass <sjg@chromium.org>
3# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4#
5# SPDX-License-Identifier: GPL-2.0+
6#
7
8U-Boot on x86
9=============
10
11This document describes the information about U-Boot running on x86 targets,
12including supported boards, build instructions, todo list, etc.
13
14Status
15------
16U-Boot supports running as a coreboot [1] payload on x86. So far only Link
Bin Meng1ae5b782015-05-07 21:34:12 +080017(Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should
18work with minimal adjustments on other x86 boards since coreboot deals with
19most of the low-level details.
Bin Meng5dad97e2014-12-17 15:50:48 +080020
Andy Shevchenko495f3772017-07-06 14:41:53 +030021U-Boot is a main bootloader on Intel Edison board.
22
Stoppa, Igor28a85362015-08-13 16:43:35 +030023U-Boot also supports booting directly from x86 reset vector, without coreboot.
24In this case, known as bare mode, from the fact that it runs on the
Simon Glassf21069f2016-03-11 22:07:33 -070025'bare metal', U-Boot acts like a BIOS replacement. The following platforms
26are supported:
27
Bin Mengeda995a2016-05-07 07:46:36 -070028 - Bayley Bay CRB
Bin Mengeb457872017-08-15 22:42:02 -070029 - Cherry Hill CRB
Bin Mengeda995a2016-05-07 07:46:36 -070030 - Congatec QEVAL 2.0 & conga-QA3/E3845
Simon Glassf21069f2016-03-11 22:07:33 -070031 - Cougar Canyon 2 CRB
32 - Crown Bay CRB
33 - Galileo
34 - Link (Chromebook Pixel)
35 - Minnowboard MAX
36 - Samus (Chromebook Pixel 2015)
37 - QEMU x86
Bin Meng5dad97e2014-12-17 15:50:48 +080038
Simon Glass3a1a18f2015-01-27 22:13:47 -070039As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
40Linux kernel as part of a FIT image. It also supports a compressed zImage.
Bin Meng3619e942015-10-07 20:19:20 -070041U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks
42for more details.
Bin Meng5dad97e2014-12-17 15:50:48 +080043
Stoppa, Igor28a85362015-08-13 16:43:35 +030044Build Instructions for U-Boot as coreboot payload
45-------------------------------------------------
Bin Meng5dad97e2014-12-17 15:50:48 +080046Building U-Boot as a coreboot payload is just like building U-Boot for targets
47on other architectures, like below:
48
49$ make coreboot-x86_defconfig
50$ make all
51
Bin Meng1ae5b782015-05-07 21:34:12 +080052Note this default configuration will build a U-Boot payload for the QEMU board.
Bin Meng617b8672015-01-06 22:14:24 +080053To build a coreboot payload against another board, you can change the build
54configuration during the 'make menuconfig' process.
55
56x86 architecture --->
57 ...
Bin Meng1ae5b782015-05-07 21:34:12 +080058 (qemu-x86) Board configuration file
Bin Meng683b09d2015-06-03 09:20:04 +080059 (qemu-x86_i440fx) Board Device Tree Source (dts) file
Bin Meng1ae5b782015-05-07 21:34:12 +080060 (0x01920000) Board specific Cache-As-RAM (CAR) address
Bin Meng617b8672015-01-06 22:14:24 +080061 (0x4000) Board specific Cache-As-RAM (CAR) size
62
63Change the 'Board configuration file' and 'Board Device Tree Source (dts) file'
64to point to a new board. You can also change the Cache-As-RAM (CAR) related
65settings here if the default values do not fit your new board.
66
Andy Shevchenko495f3772017-07-06 14:41:53 +030067Build Instructions for U-Boot as main bootloader
68------------------------------------------------
69
70Intel Edison instructions:
71
72Simple you can build U-Boot and obtain u-boot.bin
73
74$ make edison_defconfig
75$ make all
76
Stoppa, Igor28a85362015-08-13 16:43:35 +030077Build Instructions for U-Boot as BIOS replacement (bare mode)
78-------------------------------------------------------------
Simon Glass3a1a18f2015-01-27 22:13:47 -070079Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
Bin Meng5dad97e2014-12-17 15:50:48 +080080little bit tricky, as generally it requires several binary blobs which are not
81shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is
82not turned on by default in the U-Boot source tree. Firstly, you need turn it
Simon Glasseea0f112015-01-27 22:13:32 -070083on by enabling the ROM build:
Bin Meng5dad97e2014-12-17 15:50:48 +080084
Simon Glasseea0f112015-01-27 22:13:32 -070085$ export BUILD_ROM=y
86
87This tells the Makefile to build u-boot.rom as a target.
Bin Meng5dad97e2014-12-17 15:50:48 +080088
Stoppa, Igor28a85362015-08-13 16:43:35 +030089---
90
91Chromebook Link specific instructions for bare mode:
Bin Meng5dad97e2014-12-17 15:50:48 +080092
93First, you need the following binary blobs:
94
95* descriptor.bin - Intel flash descriptor
96* me.bin - Intel Management Engine
97* mrc.bin - Memory Reference Code, which sets up SDRAM
98* video ROM - sets up the display
99
100You can get these binary blobs by:
101
102$ git clone http://review.coreboot.org/p/blobs.git
103$ cd blobs
104
105Find the following files:
106
107* ./mainboard/google/link/descriptor.bin
108* ./mainboard/google/link/me.bin
Simon Glass8712af92015-04-19 22:05:37 -0600109* ./northbridge/intel/sandybridge/systemagent-r6.bin
Bin Meng5dad97e2014-12-17 15:50:48 +0800110
111The 3rd one should be renamed to mrc.bin.
Bin Meng786a08e2015-07-06 16:31:33 +0800112As for the video ROM, you can get it here [3] and rename it to vga.bin.
Bin Meng5dad97e2014-12-17 15:50:48 +0800113Make sure all these binary blobs are put in the board directory.
114
115Now you can build U-Boot and obtain u-boot.rom:
116
117$ make chromebook_link_defconfig
118$ make all
119
Stoppa, Igor28a85362015-08-13 16:43:35 +0300120---
121
Simon Glass374e78e2016-03-16 07:44:43 -0600122Chromebook Samus (2015 Pixel) instructions for bare mode:
123
124First, you need the following binary blobs:
125
126* descriptor.bin - Intel flash descriptor
127* me.bin - Intel Management Engine
128* mrc.bin - Memory Reference Code, which sets up SDRAM
129* refcode.elf - Additional Reference code
130* vga.bin - video ROM, which sets up the display
131
132If you have a samus you can obtain them from your flash, for example, in
133developer mode on the Chromebook (use Ctrl-Alt-F2 to obtain a terminal and
134log in as 'root'):
135
136 cd /tmp
137 flashrom -w samus.bin
138 scp samus.bin username@ip_address:/path/to/somewhere
139
140If not see the coreboot tree [4] where you can use:
141
142 bash crosfirmware.sh samus
143
144to get the image. There is also an 'extract_blobs.sh' scripts that you can use
145on the 'coreboot-Google_Samus.*' file to short-circuit some of the below.
146
147Then 'ifdtool -x samus.bin' on your development machine will produce:
148
149 flashregion_0_flashdescriptor.bin
150 flashregion_1_bios.bin
151 flashregion_2_intel_me.bin
152
153Rename flashregion_0_flashdescriptor.bin to descriptor.bin
154Rename flashregion_2_intel_me.bin to me.bin
155You can ignore flashregion_1_bios.bin - it is not used.
156
157To get the rest, use 'cbfstool samus.bin print':
158
159samus.bin: 8192 kB, bootblocksize 2864, romsize 8388608, offset 0x700000
160alignment: 64 bytes, architecture: x86
161
162Name Offset Type Size
163cmos_layout.bin 0x700000 cmos_layout 1164
164pci8086,0406.rom 0x7004c0 optionrom 65536
165spd.bin 0x710500 (unknown) 4096
166cpu_microcode_blob.bin 0x711540 microcode 70720
167fallback/romstage 0x722a00 stage 54210
168fallback/ramstage 0x72fe00 stage 96382
169config 0x7476c0 raw 6075
170fallback/vboot 0x748ec0 stage 15980
171fallback/refcode 0x74cd80 stage 75578
172fallback/payload 0x75f500 payload 62878
173u-boot.dtb 0x76eb00 (unknown) 5318
174(empty) 0x770000 null 196504
175mrc.bin 0x79ffc0 (unknown) 222876
176(empty) 0x7d66c0 null 167320
177
178You can extract what you need:
179
180 cbfstool samus.bin extract -n pci8086,0406.rom -f vga.bin
181 cbfstool samus.bin extract -n fallback/refcode -f refcode.rmod
182 cbfstool samus.bin extract -n mrc.bin -f mrc.bin
183 cbfstool samus.bin extract -n fallback/refcode -f refcode.bin -U
184
185Note that the -U flag is only supported by the latest cbfstool. It unpacks
186and decompresses the stage to produce a coreboot rmodule. This is a simple
187representation of an ELF file. You need the patch "Support decoding a stage
188with compression".
189
190Put all 5 files into board/google/chromebook_samus.
191
192Now you can build U-Boot and obtain u-boot.rom:
193
194$ make chromebook_link_defconfig
195$ make all
196
197If you are using em100, then this command will flash write -Boot:
198
199 em100 -s -d filename.rom -c W25Q64CV -r
200
201---
202
Stoppa, Igor28a85362015-08-13 16:43:35 +0300203Intel Crown Bay specific instructions for bare mode:
Bin Meng5dad97e2014-12-17 15:50:48 +0800204
Bin Meng1ae5b782015-05-07 21:34:12 +0800205U-Boot support of Intel Crown Bay board [4] relies on a binary blob called
206Firmware Support Package [5] to perform all the necessary initialization steps
Bin Meng5dad97e2014-12-17 15:50:48 +0800207as documented in the BIOS Writer Guide, including initialization of the CPU,
208memory controller, chipset and certain bus interfaces.
209
210Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T,
211install it on your host and locate the FSP binary blob. Note this platform
212also requires a Chipset Micro Code (CMC) state machine binary to be present in
213the SPI flash where u-boot.rom resides, and this CMC binary blob can be found
214in this FSP package too.
215
216* ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd
217* ./Microcode/C0_22211.BIN
218
219Rename the first one to fsp.bin and second one to cmc.bin and put them in the
220board directory.
221
Bin Meng83d97122015-03-05 11:21:03 +0800222Note the FSP release version 001 has a bug which could cause random endless
223loop during the FspInit call. This bug was published by Intel although Intel
224did not describe any details. We need manually apply the patch to the FSP
225binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP
226binary, change the following five bytes values from orginally E8 42 FF FF FF
227to B8 00 80 0B 00.
228
Bin Meng7aaff9b2015-07-06 16:31:35 +0800229As for the video ROM, you need manually extract it from the Intel provided
230BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM
231ID 8086:4108, extract and save it as vga.bin in the board directory.
232
Bin Meng617b8672015-01-06 22:14:24 +0800233Now you can build U-Boot and obtain u-boot.rom
Bin Meng5dad97e2014-12-17 15:50:48 +0800234
235$ make crownbay_defconfig
236$ make all
237
Stoppa, Igor28a85362015-08-13 16:43:35 +0300238---
239
Bin Menga2e3b052016-02-17 00:16:25 -0800240Intel Cougar Canyon 2 specific instructions for bare mode:
241
242This uses Intel FSP for 3rd generation Intel Core and Intel Celeron processors
243with mobile Intel HM76 and QM77 chipsets platform. Download it from Intel FSP
244website and put the .fd file (CHIEFRIVER_FSP_GOLD_001_09-OCTOBER-2013.fd at the
245time of writing) in the board directory and rename it to fsp.bin.
246
247Now build U-Boot and obtain u-boot.rom
248
249$ make cougarcanyon2_defconfig
250$ make all
251
252The board has two 8MB SPI flashes mounted, which are called SPI-0 and SPI-1 in
253the board manual. The SPI-0 flash should have flash descriptor plus ME firmware
254and SPI-1 flash is used to store U-Boot. For convenience, the complete 8MB SPI-0
255flash image is included in the FSP package (named Rom00_8M_MB_PPT.bin). Program
256this image to the SPI-0 flash according to the board manual just once and we are
257all set. For programming U-Boot we just need to program SPI-1 flash.
258
259---
260
Bin Meng03bfc782016-02-17 00:47:04 -0800261Intel Bay Trail based board instructions for bare mode:
Simon Glass3a1a18f2015-01-27 22:13:47 -0700262
263This uses as FSP as with Crown Bay, except it is for the Atom E3800 series.
Bin Meng03bfc782016-02-17 00:47:04 -0800264Two boards that use this configuration are Bayley Bay and Minnowboard MAX.
Simon Glass3a1a18f2015-01-27 22:13:47 -0700265Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at
Bin Meng03bfc782016-02-17 00:47:04 -0800266the time of writing). Put it in the corresponding board directory and rename
267it to fsp.bin.
Simon Glass3a1a18f2015-01-27 22:13:47 -0700268
269Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same
Bin Meng03bfc782016-02-17 00:47:04 -0800270board directory as vga.bin.
Simon Glass3a1a18f2015-01-27 22:13:47 -0700271
Bin Meng03bfc782016-02-17 00:47:04 -0800272You still need two more binary blobs. For Bayley Bay, they can be extracted
273from the sample SPI image provided in the FSP (SPI.bin at the time of writing).
274
275 $ ./tools/ifdtool -x BayleyBay/SPI.bin
276 $ cp flashregion_0_flashdescriptor.bin board/intel/bayleybay/descriptor.bin
277 $ cp flashregion_2_intel_me.bin board/intel/bayleybay/me.bin
278
279For Minnowboard MAX, we can reuse the same ME firmware above, but for flash
280descriptor, we need get that somewhere else, as the one above does not seem to
281work, probably because it is not designed for the Minnowboard MAX. Now download
282the original firmware image for this board from:
Simon Glass68522482015-04-25 11:46:43 -0600283
284http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
285
286Unzip it:
287
288 $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
Simon Glass3a1a18f2015-01-27 22:13:47 -0700289
290Use ifdtool in the U-Boot tools directory to extract the images from that
291file, for example:
292
Simon Glass68522482015-04-25 11:46:43 -0600293 $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin
294
295This will provide the descriptor file - copy this into the correct place:
296
297 $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin
298
Simon Glass3a1a18f2015-01-27 22:13:47 -0700299Now you can build U-Boot and obtain u-boot.rom
Bin Meng03bfc782016-02-17 00:47:04 -0800300Note: below are examples/information for Minnowboard MAX.
Simon Glass3a1a18f2015-01-27 22:13:47 -0700301
302$ make minnowmax_defconfig
303$ make all
304
Simon Glassdf898672015-07-03 18:28:28 -0600305Checksums are as follows (but note that newer versions will invalidate this):
306
307$ md5sum -b board/intel/minnowmax/*.bin
308ffda9a3b94df5b74323afb328d51e6b4 board/intel/minnowmax/descriptor.bin
30969f65b9a580246291d20d08cbef9d7c5 board/intel/minnowmax/fsp.bin
310894a97d371544ec21de9c3e8e1716c4b board/intel/minnowmax/me.bin
311a2588537da387da592a27219d56e9962 board/intel/minnowmax/vga.bin
312
Simon Glass537ccba2015-07-03 18:28:24 -0600313The ROM image is broken up into these parts:
314
315Offset Description Controlling config
316------------------------------------------------------------
317000000 descriptor.bin Hard-coded to 0 in ifdtool
318001000 me.bin Set by the descriptor
319500000 <spare>
Bin Meng91fc5bf2016-05-11 07:44:55 -07003206ef000 Environment CONFIG_ENV_OFFSET
Bin Meng638a0582015-10-11 21:37:44 -07003216f0000 MRC cache CONFIG_ENABLE_MRC_CACHE
Simon Glass537ccba2015-07-03 18:28:24 -0600322700000 u-boot-dtb.bin CONFIG_SYS_TEXT_BASE
Bin Meng7f72cdf2015-08-27 08:38:16 -0700323790000 vga.bin CONFIG_VGA_BIOS_ADDR
Simon Glass537ccba2015-07-03 18:28:24 -06003247c0000 fsp.bin CONFIG_FSP_ADDR
3257f8000 <spare> (depends on size of fsp.bin)
Simon Glass537ccba2015-07-03 18:28:24 -06003267ff800 U-Boot 16-bit boot CONFIG_SYS_X86_START16
327
328Overall ROM image size is controlled by CONFIG_ROM_SIZE.
329
Stefan Roese5d98c5e2016-07-13 08:23:40 +0200330Note that the debug version of the FSP is bigger in size. If this version
331is used, CONFIG_FSP_ADDR needs to be configured to 0xfffb0000 instead of
332the default value 0xfffc0000.
333
Stoppa, Igor28a85362015-08-13 16:43:35 +0300334---
Simon Glass537ccba2015-07-03 18:28:24 -0600335
Bin Mengeb457872017-08-15 22:42:02 -0700336Intel Cherry Hill specific instructions for bare mode:
337
338This uses Intel FSP for Braswell platform. Download it from Intel FSP website,
339put the .fd file to the board directory and rename it to fsp.bin.
340
341Extract descriptor.bin and me.bin from the original BIOS on the board using
342ifdtool and put them to the board directory as well.
343
344Note the FSP package for Braswell does not ship a traditional legacy VGA BIOS
345image for the integrated graphics device. Instead a new binary called Video
346BIOS Table (VBT) is shipped. Put it to the board directory and rename it to
347vbt.bin if you want graphics support in U-Boot.
348
349Now you can build U-Boot and obtain u-boot.rom
350
351$ make cherryhill_defconfig
352$ make all
353
354An important note for programming u-boot.rom to the on-board SPI flash is that
355you need make sure the SPI flash's 'quad enable' bit in its status register
356matches the settings in the descriptor.bin, otherwise the board won't boot.
357
358For the on-board SPI flash MX25U6435F, this can be done by writing 0x40 to the
359status register by DediProg in: Config > Modify Status Register > Write Status
360Register(s) > Register1 Value(Hex). This is is a one-time change. Once set, it
361persists in SPI flash part regardless of the u-boot.rom image burned.
362
363---
364
Stoppa, Igor28a85362015-08-13 16:43:35 +0300365Intel Galileo instructions for bare mode:
Bin Meng67582c02015-02-04 16:26:14 +0800366
367Only one binary blob is needed for Remote Management Unit (RMU) within Intel
368Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is
369needed by the Quark SoC itself.
370
371You can get the binary blob from Quark Board Support Package from Intel website:
372
373* ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
374
375Rename the file and put it to the board directory by:
376
377 $ cp RMU.bin board/intel/galileo/rmu.bin
378
379Now you can build U-Boot and obtain u-boot.rom
380
381$ make galileo_defconfig
382$ make all
Simon Glass3a1a18f2015-01-27 22:13:47 -0700383
Bin Meng03bfc782016-02-17 00:47:04 -0800384---
385
386QEMU x86 target instructions for bare mode:
Bin Meng1ae5b782015-05-07 21:34:12 +0800387
388To build u-boot.rom for QEMU x86 targets, just simply run
389
390$ make qemu-x86_defconfig
391$ make all
392
Bin Meng683b09d2015-06-03 09:20:04 +0800393Note this default configuration will build a U-Boot for the QEMU x86 i440FX
394board. To build a U-Boot against QEMU x86 Q35 board, you can change the build
395configuration during the 'make menuconfig' process like below:
396
397Device Tree Control --->
398 ...
399 (qemu-x86_q35) Default Device Tree for DT control
400
Bin Meng617b8672015-01-06 22:14:24 +0800401Test with coreboot
402------------------
403For testing U-Boot as the coreboot payload, there are things that need be paid
404attention to. coreboot supports loading an ELF executable and a 32-bit plain
405binary, as well as other supported payloads. With the default configuration,
406U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
407generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
408provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
409this capability yet. The command is as follows:
410
411# in the coreboot root directory
412$ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
Bin Meng330728d2015-08-13 00:29:07 -0700413 -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
Bin Meng617b8672015-01-06 22:14:24 +0800414
Bin Meng330728d2015-08-13 00:29:07 -0700415Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address
416of _x86boot_start (in arch/x86/cpu/start.S).
Bin Meng617b8672015-01-06 22:14:24 +0800417
418If you want to use ELF as the coreboot payload, change U-Boot configuration to
Simon Glasseea0f112015-01-27 22:13:32 -0700419use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
Bin Meng617b8672015-01-06 22:14:24 +0800420
Simon Glass3a1a18f2015-01-27 22:13:47 -0700421To enable video you must enable these options in coreboot:
422
423 - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
424 - Keep VESA framebuffer
425
Bin Meng2d3c5732016-10-09 04:14:18 -0700426And include coreboot_fb.dtsi in your board's device tree source file, like:
427
428 /include/ "coreboot_fb.dtsi"
429
Simon Glass3a1a18f2015-01-27 22:13:47 -0700430At present it seems that for Minnowboard Max, coreboot does not pass through
431the video information correctly (it always says the resolution is 0x0). This
432works correctly for link though.
433
Bin Meng4dc5e542016-10-09 04:14:10 -0700434Note: coreboot framebuffer driver does not work on QEMU. The reason is unknown
435at this point. Patches are welcome if you figure out anything wrong.
436
Stoppa, Igor28a85362015-08-13 16:43:35 +0300437Test with QEMU for bare mode
438----------------------------
Bin Meng1ae5b782015-05-07 21:34:12 +0800439QEMU is a fancy emulator that can enable us to test U-Boot without access to
Bin Meng9c4f5412015-05-11 07:36:30 +0800440a real x86 board. Please make sure your QEMU version is 2.3.0 or above test
441U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows:
Bin Meng1ae5b782015-05-07 21:34:12 +0800442
443$ qemu-system-i386 -nographic -bios path/to/u-boot.rom
444
445This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU
446also supports emulating an x86 board with Q35 and ICH9 based chipset, which is
447also supported by U-Boot. To instantiate such a machine, call QEMU with:
448
449$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35
450
451Note by default QEMU instantiated boards only have 128 MiB system memory. But
452it is enough to have U-Boot boot and function correctly. You can increase the
453system memory by pass '-m' parameter to QEMU if you want more memory:
454
455$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024
456
457This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only
458supports 3 GiB maximum system memory and reserves the last 1 GiB address space
459for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m'
460would be 3072.
Simon Glass3a1a18f2015-01-27 22:13:47 -0700461
Bin Meng9c4f5412015-05-11 07:36:30 +0800462QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will
463show QEMU's VGA console window. Note this will disable QEMU's serial output.
464If you want to check both consoles, use '-serial stdio'.
465
Bin Menga2eb65f2015-07-27 19:16:08 +0800466Multicore is also supported by QEMU via '-smp n' where n is the number of cores
Miao Yan5c2ed612016-01-07 01:32:06 -0800467to instantiate. Note, the maximum supported CPU number in QEMU is 255.
468
Bin Mengeda995a2016-05-07 07:46:36 -0700469The fw_cfg interface in QEMU also provides information about kernel data,
470initrd, command-line arguments and more. U-Boot supports directly accessing
471these informtion from fw_cfg interface, which saves the time of loading them
472from hard disk or network again, through emulated devices. To use it , simply
473providing them in QEMU command line:
Miao Yan5c2ed612016-01-07 01:32:06 -0800474
475$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel /path/to/bzImage
476 -append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8
477
478Note: -initrd and -smp are both optional
479
Bin Mengeda995a2016-05-07 07:46:36 -0700480Then start QEMU, in U-Boot command line use the following U-Boot command to
481setup kernel:
Miao Yan5c2ed612016-01-07 01:32:06 -0800482
483 => qfw
484qfw - QEMU firmware interface
485
486Usage:
487qfw <command>
488 - list : print firmware(s) currently loaded
489 - cpus : print online cpu number
490 - load <kernel addr> <initrd addr> : load kernel and initrd (if any) and setup for zboot
491
492=> qfw load
493loading kernel to address 01000000 size 5d9d30 initrd 04000000 size 1b1ab50
494
Bin Mengeda995a2016-05-07 07:46:36 -0700495Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then,
496'zboot' can be used to boot the kernel:
Miao Yan5c2ed612016-01-07 01:32:06 -0800497
Bin Meng10491c82016-10-09 04:14:14 -0700498=> zboot 01000000 - 04000000 1b1ab50
Bin Menga2eb65f2015-07-27 19:16:08 +0800499
Andy Shevchenko495f3772017-07-06 14:41:53 +0300500Updating U-Boot on Edison
501-------------------------
502By default Intel Edison boards are shipped with preinstalled heavily
503patched U-Boot v2014.04. Though it supports DFU which we may be able to
504use.
505
5061. Prepare u-boot.bin as described in chapter above. You still need one
507more step (if and only if you have original U-Boot), i.e. run the
508following command:
509
510$ truncate -s %4096 u-boot.bin
511
5122. Run your board and interrupt booting to U-Boot console. In the console
513call:
514
515 => run do_force_flash_os
516
5173. Wait for few seconds, it will prepare environment variable and runs
518DFU. Run DFU command from the host system:
519
520$ dfu-util -v -d 8087:0a99 --alt u-boot0 -D u-boot.bin
521
5224. Return to U-Boot console and following hint. i.e. push Ctrl+C, and
523reset the board:
524
525 => reset
526
Bin Meng5dad97e2014-12-17 15:50:48 +0800527CPU Microcode
528-------------
Bin Meng7aaff9b2015-07-06 16:31:35 +0800529Modern CPUs usually require a special bit stream called microcode [8] to be
Bin Meng5dad97e2014-12-17 15:50:48 +0800530loaded on the processor after power up in order to function properly. U-Boot
531has already integrated these as hex dumps in the source tree.
532
Bin Meng1281a1f2015-06-23 12:18:53 +0800533SMP Support
534-----------
535On a multicore system, U-Boot is executed on the bootstrap processor (BSP).
536Additional application processors (AP) can be brought up by U-Boot. In order to
537have an SMP kernel to discover all of the available processors, U-Boot needs to
538prepare configuration tables which contain the multi-CPUs information before
539loading the OS kernel. Currently U-Boot supports generating two types of tables
Bin Meng7aaff9b2015-07-06 16:31:35 +0800540for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP)
541[10] tables. The writing of these two tables are controlled by two Kconfig
542options GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
Bin Meng1281a1f2015-06-23 12:18:53 +0800543
Bin Meng5dad97e2014-12-17 15:50:48 +0800544Driver Model
545------------
Simon Glassf21069f2016-03-11 22:07:33 -0700546x86 has been converted to use driver model for serial, GPIO, SPI, SPI flash,
547keyboard, real-time clock, USB. Video is in progress.
Bin Meng5dad97e2014-12-17 15:50:48 +0800548
549Device Tree
550-----------
551x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to
Bin Meng617b8672015-01-06 22:14:24 +0800552be turned on. Not every device on the board is configured via device tree, but
Bin Meng5dad97e2014-12-17 15:50:48 +0800553more and more devices will be added as time goes by. Check out the directory
554arch/x86/dts/ for these device tree source files.
555
Simon Glasscb3b2e62015-01-01 16:18:15 -0700556Useful Commands
557---------------
Simon Glasscb3b2e62015-01-01 16:18:15 -0700558In keeping with the U-Boot philosophy of providing functions to check and
559adjust internal settings, there are several x86-specific commands that may be
560useful:
561
Bin Meng62716eb2015-10-10 01:47:58 -0700562fsp - Display information about Intel Firmware Support Package (FSP).
563 This is only available on platforms which use FSP, mostly Atom.
Simon Glasscb3b2e62015-01-01 16:18:15 -0700564iod - Display I/O memory
565iow - Write I/O memory
566mtrr - List and set the Memory Type Range Registers (MTRR). These are used to
567 tell the CPU whether memory is cacheable and if so the cache write
568 mode to use. U-Boot sets up some reasonable values but you can
569 adjust then with this command.
570
Simon Glass7bea5272015-07-27 15:47:31 -0600571Booting Ubuntu
572--------------
573As an example of how to set up your boot flow with U-Boot, here are
574instructions for starting Ubuntu from U-Boot. These instructions have been
Bin Mengeda995a2016-05-07 07:46:36 -0700575tested on Minnowboard MAX with a SATA drive but are equally applicable on
576other platforms and other media. There are really only four steps and it's a
Simon Glass7bea5272015-07-27 15:47:31 -0600577very simple script, but a more detailed explanation is provided here for
578completeness.
579
580Note: It is possible to set up U-Boot to boot automatically using syslinux.
581It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the
582GUID. If you figure these out, please post patches to this README.
583
Bin Mengeda995a2016-05-07 07:46:36 -0700584Firstly, you will need Ubuntu installed on an available disk. It should be
Simon Glass7bea5272015-07-27 15:47:31 -0600585possible to make U-Boot start a USB start-up disk but for now let's assume
586that you used another boot loader to install Ubuntu.
587
588Use the U-Boot command line to find the UUID of the partition you want to
589boot. For example our disk is SCSI device 0:
590
591=> part list scsi 0
592
593Partition Map for SCSI device 0 -- Partition Type: EFI
594
595 Part Start LBA End LBA Name
596 Attributes
597 Type GUID
598 Partition GUID
599 1 0x00000800 0x001007ff ""
600 attrs: 0x0000000000000000
601 type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b
602 guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c
603 2 0x00100800 0x037d8fff ""
604 attrs: 0x0000000000000000
605 type: 0fc63daf-8483-4772-8e79-3d69d8477de4
606 guid: 965c59ee-1822-4326-90d2-b02446050059
607 3 0x037d9000 0x03ba27ff ""
608 attrs: 0x0000000000000000
609 type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f
610 guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17
611 =>
612
613This shows that your SCSI disk has three partitions. The really long hex
614strings are called Globally Unique Identifiers (GUIDs). You can look up the
615'type' ones here [11]. On this disk the first partition is for EFI and is in
616VFAT format (DOS/Windows):
617
618 => fatls scsi 0:1
619 efi/
620
621 0 file(s), 1 dir(s)
622
623
624Partition 2 is 'Linux filesystem data' so that will be our root disk. It is
625in ext2 format:
626
627 => ext2ls scsi 0:2
628 <DIR> 4096 .
629 <DIR> 4096 ..
630 <DIR> 16384 lost+found
631 <DIR> 4096 boot
632 <DIR> 12288 etc
633 <DIR> 4096 media
634 <DIR> 4096 bin
635 <DIR> 4096 dev
636 <DIR> 4096 home
637 <DIR> 4096 lib
638 <DIR> 4096 lib64
639 <DIR> 4096 mnt
640 <DIR> 4096 opt
641 <DIR> 4096 proc
642 <DIR> 4096 root
643 <DIR> 4096 run
644 <DIR> 12288 sbin
645 <DIR> 4096 srv
646 <DIR> 4096 sys
647 <DIR> 4096 tmp
648 <DIR> 4096 usr
649 <DIR> 4096 var
650 <SYM> 33 initrd.img
651 <SYM> 30 vmlinuz
652 <DIR> 4096 cdrom
653 <SYM> 33 initrd.img.old
654 =>
655
656and if you look in the /boot directory you will see the kernel:
657
658 => ext2ls scsi 0:2 /boot
659 <DIR> 4096 .
660 <DIR> 4096 ..
661 <DIR> 4096 efi
662 <DIR> 4096 grub
663 3381262 System.map-3.13.0-32-generic
664 1162712 abi-3.13.0-32-generic
665 165611 config-3.13.0-32-generic
666 176500 memtest86+.bin
667 178176 memtest86+.elf
668 178680 memtest86+_multiboot.bin
669 5798112 vmlinuz-3.13.0-32-generic
670 165762 config-3.13.0-58-generic
671 1165129 abi-3.13.0-58-generic
672 5823136 vmlinuz-3.13.0-58-generic
673 19215259 initrd.img-3.13.0-58-generic
674 3391763 System.map-3.13.0-58-generic
675 5825048 vmlinuz-3.13.0-58-generic.efi.signed
676 28304443 initrd.img-3.13.0-32-generic
677 =>
678
679The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of
680self-extracting compressed file mixed with some 'setup' configuration data.
681Despite its size (uncompressed it is >10MB) this only includes a basic set of
682device drivers, enough to boot on most hardware types.
683
684The 'initrd' files contain a RAM disk. This is something that can be loaded
685into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots
686of drivers for whatever hardware you might have. It is loaded before the
687real root disk is accessed.
688
689The numbers after the end of each file are the version. Here it is Linux
690version 3.13. You can find the source code for this in the Linux tree with
691the tag v3.13. The '.0' allows for additional Linux releases to fix problems,
692but normally this is not needed. The '-58' is used by Ubuntu. Each time they
693release a new kernel they increment this number. New Ubuntu versions might
694include kernel patches to fix reported bugs. Stable kernels can exist for
695some years so this number can get quite high.
696
697The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own
698secure boot mechanism - see [12] [13] and cannot read .efi files at present.
699
700To boot Ubuntu from U-Boot the steps are as follows:
701
7021. Set up the boot arguments. Use the GUID for the partition you want to
703boot:
704
705 => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
706
707Here root= tells Linux the location of its root disk. The disk is specified
708by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory'
709containing all the GUIDs Linux has found. When it starts up, there will be a
710file in that directory with this name in it. It is also possible to use a
711device name here, see later.
712
7132. Load the kernel. Since it is an ext2/4 filesystem we can do:
714
715 => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic
716
717The address 30000000 is arbitrary, but there seem to be problems with using
718small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into
719the start of RAM (which is at 0 on x86).
720
7213. Load the ramdisk (to 64MB):
722
723 => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic
724
7254. Start up the kernel. We need to know the size of the ramdisk, but can use
726a variable for that. U-Boot sets 'filesize' to the size of the last file it
727loaded.
728
729 => zboot 03000000 0 04000000 ${filesize}
730
731Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is
732quite verbose when it boots a kernel. You should see these messages from
733U-Boot:
734
735 Valid Boot Flag
736 Setup Size = 0x00004400
737 Magic signature found
738 Using boot protocol version 2.0c
739 Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015
740 Building boot_params at 0x00090000
741 Loading bzImage at address 100000 (5805728 bytes)
742 Magic signature found
743 Initial RAM disk at linear address 0x04000000, size 19215259 bytes
Bin Mengeda995a2016-05-07 07:46:36 -0700744 Kernel command line: "root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
Simon Glass7bea5272015-07-27 15:47:31 -0600745
746 Starting kernel ...
747
748U-Boot prints out some bootstage timing. This is more useful if you put the
749above commands into a script since then it will be faster.
750
751 Timer summary in microseconds:
752 Mark Elapsed Stage
753 0 0 reset
754 241,535 241,535 board_init_r
755 2,421,611 2,180,076 id=64
756 2,421,790 179 id=65
757 2,428,215 6,425 main_loop
758 48,860,584 46,432,369 start_kernel
759
760 Accumulated time:
761 240,329 ahci
762 1,422,704 vesa display
763
Bin Mengeda995a2016-05-07 07:46:36 -0700764Now the kernel actually starts: (if you want to examine kernel boot up message
765on the serial console, append "console=ttyS0,115200" to the kernel command line)
Simon Glass7bea5272015-07-27 15:47:31 -0600766
767 [ 0.000000] Initializing cgroup subsys cpuset
768 [ 0.000000] Initializing cgroup subsys cpu
769 [ 0.000000] Initializing cgroup subsys cpuacct
770 [ 0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22)
Bin Mengeda995a2016-05-07 07:46:36 -0700771 [ 0.000000] Command line: root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro console=ttyS0,115200
Simon Glass7bea5272015-07-27 15:47:31 -0600772
773It continues for a long time. Along the way you will see it pick up your
774ramdisk:
775
776 [ 0.000000] RAMDISK: [mem 0x04000000-0x05253fff]
777...
778 [ 0.788540] Trying to unpack rootfs image as initramfs...
779 [ 1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000)
780...
781
782Later it actually starts using it:
783
784 Begin: Running /scripts/local-premount ... done.
785
786You should also see your boot disk turn up:
787
788 [ 4.357243] scsi 1:0:0:0: Direct-Access ATA ADATA SP310 5.2 PQ: 0 ANSI: 5
789 [ 4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB)
790 [ 4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0
791 [ 4.381859] sd 1:0:0:0: [sda] Write Protect is off
792 [ 4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
793 [ 4.399535] sda: sda1 sda2 sda3
794
795Linux has found the three partitions (sda1-3). Mercifully it doesn't print out
796the GUIDs. In step 1 above we could have used:
797
798 setenv bootargs root=/dev/sda2 ro
799
800instead of the GUID. However if you add another drive to your board the
801numbering may change whereas the GUIDs will not. So if your boot partition
802becomes sdb2, it will still boot. For embedded systems where you just want to
803boot the first disk, you have that option.
804
805The last thing you will see on the console is mention of plymouth (which
806displays the Ubuntu start-up screen) and a lot of 'Starting' messages:
807
808 * Starting Mount filesystems on boot [ OK ]
809
810After a pause you should see a login screen on your display and you are done.
811
812If you want to put this in a script you can use something like this:
813
814 setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro
815 setenv boot zboot 03000000 0 04000000 \${filesize}
816 setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot"
817 saveenv
818
819The \ is to tell the shell not to evaluate ${filesize} as part of the setenv
820command.
821
Simon Glass7bea5272015-07-27 15:47:31 -0600822You can also bake this behaviour into your build by hard-coding the
823environment variables if you add this to minnowmax.h:
824
Simon Glass7bea5272015-07-27 15:47:31 -0600825#undef CONFIG_BOOTCOMMAND
Simon Glass7bea5272015-07-27 15:47:31 -0600826#define CONFIG_BOOTCOMMAND \
827 "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \
828 "ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \
829 "run boot"
830
831#undef CONFIG_EXTRA_ENV_SETTINGS
832#define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
833
Sam Protsenko5abc1a42017-08-14 20:22:17 +0300834and change CONFIG_BOOTARGS value in configs/minnowmax_defconfig to:
835
836CONFIG_BOOTARGS="root=/dev/sda2 ro"
837
Bin Meng2e9ae222016-02-28 23:54:52 -0800838Test with SeaBIOS
839-----------------
840SeaBIOS [14] is an open source implementation of a 16-bit x86 BIOS. It can run
841in an emulator or natively on x86 hardware with the use of U-Boot. With its
842help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS.
843
844As U-Boot, we have to manually create a table where SeaBIOS gets various system
845information (eg: E820) from. The table unfortunately has to follow the coreboot
846table format as SeaBIOS currently supports booting as a coreboot payload.
847
848To support loading SeaBIOS, U-Boot should be built with CONFIG_SEABIOS on.
849Booting SeaBIOS is done via U-Boot's bootelf command, like below:
850
851 => tftp bios.bin.elf;bootelf
852 Using e1000#0 device
853 TFTP from server 10.10.0.100; our IP address is 10.10.0.108
854 ...
855 Bytes transferred = 122124 (1dd0c hex)
856 ## Starting application at 0x000ff06e ...
857 SeaBIOS (version rel-1.9.0)
858 ...
859
860bios.bin.elf is the SeaBIOS image built from SeaBIOS source tree.
861Make sure it is built as follows:
862
863 $ make menuconfig
864
865Inside the "General Features" menu, select "Build for coreboot" as the
866"Build Target". Inside the "Debugging" menu, turn on "Serial port debugging"
867so that we can see something as soon as SeaBIOS boots. Leave other options
868as in their default state. Then,
869
870 $ make
871 ...
872 Total size: 121888 Fixed: 66496 Free: 9184 (used 93.0% of 128KiB rom)
873 Creating out/bios.bin.elf
874
875Currently this is tested on QEMU x86 target with U-Boot chain-loading SeaBIOS
876to install/boot a Windows XP OS (below for example command to install Windows).
877
878 # Create a 10G disk.img as the virtual hard disk
879 $ qemu-img create -f qcow2 disk.img 10G
880
881 # Install a Windows XP OS from an ISO image 'winxp.iso'
882 $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -cdrom winxp.iso -smp 2 -m 512
883
884 # Boot a Windows XP OS installed on the virutal hard disk
885 $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -smp 2 -m 512
886
887This is also tested on Intel Crown Bay board with a PCIe graphics card, booting
888SeaBIOS then chain-loading a GRUB on a USB drive, then Linux kernel finally.
889
Bin Meng5a6a2c72016-05-11 07:45:06 -0700890If you are using Intel Integrated Graphics Device (IGD) as the primary display
891device on your board, SeaBIOS needs to be patched manually to get its VGA ROM
892loaded and run by SeaBIOS. SeaBIOS locates VGA ROM via the PCI expansion ROM
893register, but IGD device does not have its VGA ROM mapped by this register.
894Its VGA ROM is packaged as part of u-boot.rom at a configurable flash address
895which is unknown to SeaBIOS. An example patch is needed for SeaBIOS below:
896
897diff --git a/src/optionroms.c b/src/optionroms.c
898index 65f7fe0..c7b6f5e 100644
899--- a/src/optionroms.c
900+++ b/src/optionroms.c
901@@ -324,6 +324,8 @@ init_pcirom(struct pci_device *pci, int isvga, u64 *sources)
902 rom = deploy_romfile(file);
903 else if (RunPCIroms > 1 || (RunPCIroms == 1 && isvga))
904 rom = map_pcirom(pci);
905+ if (pci->bdf == pci_to_bdf(0, 2, 0))
906+ rom = (struct rom_header *)0xfff90000;
907 if (! rom)
908 // No ROM present.
909 return;
910
911Note: the patch above expects IGD device is at PCI b.d.f 0.2.0 and its VGA ROM
912is at 0xfff90000 which corresponds to CONFIG_VGA_BIOS_ADDR on Minnowboard MAX.
913Change these two accordingly if this is not the case on your board.
Simon Glass7bea5272015-07-27 15:47:31 -0600914
Simon Glass00bdd952015-01-27 22:13:46 -0700915Development Flow
916----------------
Simon Glass00bdd952015-01-27 22:13:46 -0700917These notes are for those who want to port U-Boot to a new x86 platform.
918
919Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment.
920The Dediprog em100 can be used on Linux. The em100 tool is available here:
921
922 http://review.coreboot.org/p/em100.git
923
924On Minnowboard Max the following command line can be used:
925
926 sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r
927
928A suitable clip for connecting over the SPI flash chip is here:
929
930 http://www.dediprog.com/pd/programmer-accessories/EM-TC-8
931
932This allows you to override the SPI flash contents for development purposes.
933Typically you can write to the em100 in around 1200ms, considerably faster
934than programming the real flash device each time. The only important
935limitation of the em100 is that it only supports SPI bus speeds up to 20MHz.
936This means that images must be set to boot with that speed. This is an
937Intel-specific feature - e.g. tools/ifttool has an option to set the SPI
938speed in the SPI descriptor region.
939
940If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly
941easy to fit it in. You can follow the Minnowboard Max implementation, for
942example. Hopefully you will just need to create new files similar to those
943in arch/x86/cpu/baytrail which provide Bay Trail support.
944
945If you are not using an FSP you have more freedom and more responsibility.
946The ivybridge support works this way, although it still uses a ROM for
947graphics and still has binary blobs containing Intel code. You should aim to
948support all important peripherals on your platform including video and storage.
949Use the device tree for configuration where possible.
950
951For the microcode you can create a suitable device tree file using the
952microcode tool:
953
Simon Glass03e3c312015-08-15 14:37:48 -0600954 ./tools/microcode-tool -d microcode.dat -m <model> create
Simon Glass00bdd952015-01-27 22:13:46 -0700955
956or if you only have header files and not the full Intel microcode.dat database:
957
958 ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \
959 -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \
Simon Glass03e3c312015-08-15 14:37:48 -0600960 -m all create
Simon Glass00bdd952015-01-27 22:13:46 -0700961
962These are written to arch/x86/dts/microcode/ by default.
963
964Note that it is possible to just add the micrcode for your CPU if you know its
965model. U-Boot prints this information when it starts
966
967 CPU: x86_64, vendor Intel, device 30673h
968
969so here we can use the M0130673322 file.
970
971If you platform can display POST codes on two little 7-segment displays on
972the board, then you can use post_code() calls from C or assembler to monitor
973boot progress. This can be good for debugging.
974
975If not, you can try to get serial working as early as possible. The early
Stefan Roesed5211972016-01-19 14:24:12 +0100976debug serial port may be useful here. See setup_internal_uart() for an example.
Simon Glass00bdd952015-01-27 22:13:46 -0700977
Bin Meng12c75102015-08-02 20:33:35 -0700978During the U-Boot porting, one of the important steps is to write correct PIRQ
979routing information in the board device tree. Without it, device drivers in the
980Linux kernel won't function correctly due to interrupt is not working. Please
Bin Meng2e9ae222016-02-28 23:54:52 -0800981refer to U-Boot doc [15] for the device tree bindings of Intel interrupt router.
Bin Meng12c75102015-08-02 20:33:35 -0700982Here we have more details on the intel,pirq-routing property below.
983
984 intel,pirq-routing = <
985 PCI_BDF(0, 2, 0) INTA PIRQA
986 ...
987 >;
988
989As you see each entry has 3 cells. For the first one, we need describe all pci
990devices mounted on the board. For SoC devices, normally there is a chapter on
991the chipset datasheet which lists all the available PCI devices. For example on
992Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we
993can get the interrupt pin either from datasheet or hardware via U-Boot shell.
994The reliable source is the hardware as sometimes chipset datasheet is not 100%
995up-to-date. Type 'pci header' plus the device's pci bus/device/function number
996from U-Boot shell below.
997
998 => pci header 0.1e.1
999 vendor ID = 0x8086
1000 device ID = 0x0f08
1001 ...
1002 interrupt line = 0x09
1003 interrupt pin = 0x04
1004 ...
1005
1006It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin
1007register. Repeat this until you get interrupt pins for all the devices. The last
1008cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel
1009chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This
1010can be changed by registers in LPC bridge. So far Intel FSP does not touch those
1011registers so we can write down the PIRQ according to the default mapping rule.
1012
1013Once we get the PIRQ routing information in the device tree, the interrupt
1014allocation and assignment will be done by U-Boot automatically. Now you can
1015enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and
1016CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC.
1017
Simon Glass590870e2015-08-13 10:36:17 -06001018This script might be useful. If you feed it the output of 'pci long' from
1019U-Boot then it will generate a device tree fragment with the interrupt
1020configuration for each device (note it needs gawk 4.0.0):
1021
1022 $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \
1023 /interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \
1024 {patsplit(device, bdf, "[0-9a-f]+"); \
1025 printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \
1026 strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}'
1027
1028Example output:
1029 PCI_BDF(0, 2, 0) INTA PIRQA
1030 PCI_BDF(0, 3, 0) INTA PIRQA
1031...
1032
Bin Meng448719c2015-09-09 23:20:29 -07001033Porting Hints
1034-------------
1035
1036Quark-specific considerations:
1037
1038To port U-Boot to other boards based on the Intel Quark SoC, a few things need
1039to be taken care of. The first important part is the Memory Reference Code (MRC)
1040parameters. Quark MRC supports memory-down configuration only. All these MRC
1041parameters are supplied via the board device tree. To get started, first copy
1042the MRC section of arch/x86/dts/galileo.dts to your board's device tree, then
1043change these values by consulting board manuals or your hardware vendor.
1044Available MRC parameter values are listed in include/dt-bindings/mrc/quark.h.
1045The other tricky part is with PCIe. Quark SoC integrates two PCIe root ports,
1046but by default they are held in reset after power on. In U-Boot, PCIe
1047initialization is properly handled as per Quark's firmware writer guide.
1048In your board support codes, you need provide two routines to aid PCIe
1049initialization, which are board_assert_perst() and board_deassert_perst().
1050The two routines need implement a board-specific mechanism to assert/deassert
1051PCIe PERST# pin. Care must be taken that in those routines that any APIs that
1052may trigger PCI enumeration process are strictly forbidden, as any access to
1053PCIe root port's configuration registers will cause system hang while it is
1054held in reset. For more details, check how they are implemented by the Intel
1055Galileo board support codes in board/intel/galileo/galileo.c.
1056
Simon Glasse28fcb22016-03-06 19:28:17 -07001057coreboot:
1058
1059See scripts/coreboot.sed which can assist with porting coreboot code into
1060U-Boot drivers. It will not resolve all build errors, but will perform common
1061transformations. Remember to add attribution to coreboot for new files added
1062to U-Boot. This should go at the top of each file and list the coreboot
1063filename where the code originated.
1064
Bin Mengefd4be42016-05-11 07:45:12 -07001065Debugging ACPI issues with Windows:
1066
1067Windows might cache system information and only detect ACPI changes if you
1068modify the ACPI table versions. So tweak them liberally when debugging ACPI
1069issues with Windows.
1070
Bin Meng49d929b2016-05-07 07:46:37 -07001071ACPI Support Status
1072-------------------
1073Advanced Configuration and Power Interface (ACPI) [16] aims to establish
1074industry-standard interfaces enabling OS-directed configuration, power
1075management, and thermal management of mobile, desktop, and server platforms.
1076
1077Linux can boot without ACPI with "acpi=off" command line parameter, but
1078with ACPI the kernel gains the capabilities to handle power management.
1079For Windows, ACPI is a must-have firmware feature since Windows Vista.
1080CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
1081U-Boot. This requires Intel ACPI compiler to be installed on your host to
1082compile ACPI DSDT table written in ASL format to AML format. You can get
1083the compiler via "apt-get install iasl" if you are on Ubuntu or download
1084the source from [17] to compile one by yourself.
1085
Bin Meng13c9d842017-04-21 07:24:49 -07001086Current ACPI support in U-Boot is basically complete. More optional features
1087can be added in the future. The status as of today is:
Bin Meng49d929b2016-05-07 07:46:37 -07001088
1089 * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
1090 * Support one static DSDT table only, compiled by Intel ACPI compiler.
Bin Meng13c9d842017-04-21 07:24:49 -07001091 * Support S0/S3/S4/S5, reboot and shutdown from OS.
Bin Meng49d929b2016-05-07 07:46:37 -07001092 * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
Bin Meng206a3a42016-05-11 07:45:08 -07001093 * Support installing and booting Ubuntu 14.04 (or above) from U-Boot with
1094 the help of SeaBIOS using legacy interface (non-UEFI mode).
1095 * Support installing and booting Windows 8.1/10 from U-Boot with the help
1096 of SeaBIOS using legacy interface (non-UEFI mode).
Bin Meng49d929b2016-05-07 07:46:37 -07001097 * Support ACPI interrupts with SCI only.
1098
Bin Meng49d929b2016-05-07 07:46:37 -07001099Features that are optional:
Bin Meng49d929b2016-05-07 07:46:37 -07001100 * Dynamic AML bytecodes insertion at run-time. We may need this to support
1101 SSDT table generation and DSDT fix up.
1102 * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
1103 those legacy stuff into U-Boot. ACPI spec allows a system that does not
1104 support SMI (a legacy-free system).
1105
Bin Menge6ddb6b2016-05-25 19:19:12 -07001106ACPI was initially enabled on BayTrail based boards. Testing was done by booting
Bin Meng206a3a42016-05-11 07:45:08 -07001107a pre-installed Ubuntu 14.04 from a SATA drive. Installing Ubuntu 14.04 and
1108Windows 8.1/10 to a SATA drive and booting from there is also tested. Most
1109devices seem to work correctly and the board can respond a reboot/shutdown
1110command from the OS.
Simon Glasse28fcb22016-03-06 19:28:17 -07001111
Bin Menge6ddb6b2016-05-25 19:19:12 -07001112For other platform boards, ACPI support status can be checked by examining their
1113board defconfig files to see if CONFIG_GENERATE_ACPI_TABLE is set to y.
1114
Bin Meng13c9d842017-04-21 07:24:49 -07001115The S3 sleeping state is a low wake latency sleeping state defined by ACPI
1116spec where all system context is lost except system memory. To test S3 resume
1117with a Linux kernel, simply run "echo mem > /sys/power/state" and kernel will
1118put the board to S3 state where the power is off. So when the power button is
1119pressed again, U-Boot runs as it does in cold boot and detects the sleeping
1120state via ACPI register to see if it is S3, if yes it means we are waking up.
1121U-Boot is responsible for restoring the machine state as it is before sleep.
1122When everything is done, U-Boot finds out the wakeup vector provided by OSes
1123and jump there. To determine whether ACPI S3 resume is supported, check to
1124see if CONFIG_HAVE_ACPI_RESUME is set for that specific board.
1125
1126Note for testing S3 resume with Windows, correct graphics driver must be
1127installed for your platform, otherwise you won't find "Sleep" option in
1128the "Power" submenu from the Windows start menu.
1129
Simon Glass007adbc2016-07-17 01:23:45 -06001130EFI Support
1131-----------
1132U-Boot supports booting as a 32-bit or 64-bit EFI payload, e.g. with UEFI.
1133This is enabled with CONFIG_EFI_STUB. U-Boot can also run as an EFI
1134application, with CONFIG_EFI_APP. The CONFIG_EFI_LOADER option, where U-Booot
1135provides an EFI environment to the kernel (i.e. replaces UEFI completely but
1136provides the same EFI run-time services) is not currently supported on x86.
1137
1138See README.efi for details of EFI support in U-Boot.
1139
Simon Glass37b4a902016-07-17 01:23:46 -0600114064-bit Support
1141--------------
1142U-Boot supports booting a 64-bit kernel directly and is able to change to
114364-bit mode to do so. It also supports (with CONFIG_EFI_STUB) booting from
1144both 32-bit and 64-bit UEFI. However, U-Boot itself is currently always built
1145in 32-bit mode. Some access to the full memory range is provided with
1146arch_phys_memset().
1147
1148The development work to make U-Boot itself run in 64-bit mode has not yet
1149been attempted. The best approach would likely be to build a 32-bit SPL
1150image for U-Boot, with CONFIG_SPL_BUILD. This could then handle the early CPU
1151init in 16-bit and 32-bit mode, running the FSP and any other binaries that
1152are needed. Then it could change to 64-bit model and jump to U-Boot proper.
1153
1154Given U-Boot's extensive 64-bit support this has not been a high priority,
1155but it would be a nice addition.
1156
Bin Meng5dad97e2014-12-17 15:50:48 +08001157TODO List
1158---------
Bin Meng5dad97e2014-12-17 15:50:48 +08001159- Audio
1160- Chrome OS verified boot
Simon Glass37b4a902016-07-17 01:23:46 -06001161- Building U-Boot to run in 64-bit mode
Bin Meng5dad97e2014-12-17 15:50:48 +08001162
1163References
1164----------
1165[1] http://www.coreboot.org
Bin Meng1ae5b782015-05-07 21:34:12 +08001166[2] http://www.qemu.org
1167[3] http://www.coreboot.org/~stepan/pci8086,0166.rom
1168[4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
1169[5] http://www.intel.com/fsp
Bin Meng7aaff9b2015-07-06 16:31:35 +08001170[6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html
1171[7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/
1172[8] http://en.wikipedia.org/wiki/Microcode
1173[9] http://simplefirmware.org
1174[10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
Simon Glass7bea5272015-07-27 15:47:31 -06001175[11] https://en.wikipedia.org/wiki/GUID_Partition_Table
1176[12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf
1177[13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
Bin Meng2e9ae222016-02-28 23:54:52 -08001178[14] http://www.seabios.org/SeaBIOS
1179[15] doc/device-tree-bindings/misc/intel,irq-router.txt
Bin Meng49d929b2016-05-07 07:46:37 -07001180[16] http://www.acpi.info
1181[17] https://www.acpica.org/downloads