blob: 8465b5426d817d851fc14e32bf036ec61be97890 [file] [log] [blame]
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +09001if ARCH_OMAP2PLUS
2
3choice
4 prompt "OMAP2+ platform select"
Tom Rinif2d78c12017-06-09 16:59:17 -04005 default OMAP34XX
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +09006
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +09007config OMAP34XX
8 bool "OMAP34XX SoC"
Michal Simek58008cb2018-07-23 15:55:15 +02009 select ARM_CORTEX_A8_CVE_2017_5715
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090010 select ARM_ERRATA_430973
11 select ARM_ERRATA_454179
12 select ARM_ERRATA_621766
13 select ARM_ERRATA_725233
Simon Glass27084c02019-09-25 08:56:27 -060014 select SPL_USE_TINY_PRINTF if SPL
Adam Ford0a9ef452017-10-16 14:08:26 -050015 imply NAND_OMAP_GPMC
Tien Fong Cheef4b40922019-01-23 14:20:05 +080016 imply SPL_FS_EXT4
Tien Fong Chee0c3a9ed2019-01-23 14:20:03 +080017 imply SPL_FS_FAT
Simon Glass83061db2021-07-10 21:14:30 -060018 imply SPL_GPIO
Simon Glass975e7cf2021-07-10 21:14:36 -060019 imply SPL_I2C
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090020 imply SPL_LIBCOMMON_SUPPORT
21 imply SPL_LIBDISK_SUPPORT
22 imply SPL_LIBGENERIC_SUPPORT
Simon Glass103c5f12021-08-08 12:20:09 -060023 imply SPL_MMC
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090024 imply SPL_NAND_SUPPORT
Adam Fordedd16532017-08-11 08:51:20 -050025 imply SPL_OMAP3_ID_NAND
Simon Glass933b2f02021-07-10 21:14:24 -060026 imply SPL_POWER
Simon Glass2a736062021-08-08 12:20:12 -060027 imply SPL_SERIAL
Adam Forddaa0f052017-08-07 13:11:34 -050028 imply SYS_I2C_OMAP24XX
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090029 imply SYS_THUMB_BUILD
Adam Ford7815c702017-04-26 13:41:31 -050030 imply TWL4030_POWER
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090031
32config OMAP44XX
33 bool "OMAP44XX SoC"
Tom Rini448e2b62023-01-16 15:46:49 -050034 select DM_EVENT
Simon Glass27084c02019-09-25 08:56:27 -060035 select SPL_USE_TINY_PRINTF
Pali Rohár372779a2022-04-06 16:20:18 +020036 select SPL_SYS_NO_VECTOR_TABLE if SPL
Adam Ford0a9ef452017-10-16 14:08:26 -050037 imply NAND_OMAP_ELM
38 imply NAND_OMAP_GPMC
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090039 imply SPL_DISPLAY_PRINT
Tien Fong Cheef4b40922019-01-23 14:20:05 +080040 imply SPL_FS_EXT4
Tien Fong Chee0c3a9ed2019-01-23 14:20:03 +080041 imply SPL_FS_FAT
Simon Glass83061db2021-07-10 21:14:30 -060042 imply SPL_GPIO
Simon Glass975e7cf2021-07-10 21:14:36 -060043 imply SPL_I2C
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090044 imply SPL_LIBCOMMON_SUPPORT
45 imply SPL_LIBDISK_SUPPORT
46 imply SPL_LIBGENERIC_SUPPORT
Simon Glass103c5f12021-08-08 12:20:09 -060047 imply SPL_MMC
Adam Ford0a9ef452017-10-16 14:08:26 -050048 imply SPL_NAND_SIMPLE
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090049 imply SPL_NAND_SUPPORT
Simon Glass933b2f02021-07-10 21:14:24 -060050 imply SPL_POWER
Simon Glass2a736062021-08-08 12:20:12 -060051 imply SPL_SERIAL
Adam Forddaa0f052017-08-07 13:11:34 -050052 imply SYS_I2C_OMAP24XX
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090053 imply SYS_THUMB_BUILD
54
55config OMAP54XX
56 bool "OMAP54XX SoC"
Michal Simek58008cb2018-07-23 15:55:15 +020057 select ARM_CORTEX_A15_CVE_2017_5715
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090058 select ARM_ERRATA_798870
Tom Rini448e2b62023-01-16 15:46:49 -050059 select DM_EVENT
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090060 select SYS_THUMB_BUILD
Adam Ford0a9ef452017-10-16 14:08:26 -050061 imply NAND_OMAP_ELM
62 imply NAND_OMAP_GPMC
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090063 imply SPL_DISPLAY_PRINT
64 imply SPL_ENV_SUPPORT
Tien Fong Cheef4b40922019-01-23 14:20:05 +080065 imply SPL_FS_EXT4
Tien Fong Chee0c3a9ed2019-01-23 14:20:03 +080066 imply SPL_FS_FAT
Simon Glass83061db2021-07-10 21:14:30 -060067 imply SPL_GPIO
Simon Glass975e7cf2021-07-10 21:14:36 -060068 imply SPL_I2C
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090069 imply SPL_LIBCOMMON_SUPPORT
70 imply SPL_LIBDISK_SUPPORT
71 imply SPL_LIBGENERIC_SUPPORT
Simon Glass103c5f12021-08-08 12:20:09 -060072 imply SPL_MMC
Adam Ford0a9ef452017-10-16 14:08:26 -050073 imply SPL_NAND_AM33XX_BCH
74 imply SPL_NAND_AM33XX_BCH
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090075 imply SPL_NAND_SUPPORT
Simon Glass933b2f02021-07-10 21:14:24 -060076 imply SPL_POWER
Simon Glass2a736062021-08-08 12:20:12 -060077 imply SPL_SERIAL
Adam Forddaa0f052017-08-07 13:11:34 -050078 imply SYS_I2C_OMAP24XX
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090079
80config AM43XX
81 bool "AM43XX SoC"
Tom Rini6f6b7cf2018-03-06 19:02:27 -050082 select SPECIFY_CONSOLE_INDEX
Philip Oberfichtner11168882022-08-17 15:07:12 +020083 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Adam Ford0a9ef452017-10-16 14:08:26 -050084 imply NAND_OMAP_ELM
85 imply NAND_OMAP_GPMC
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090086 imply SPL_DM
87 imply SPL_DM_SEQ_ALIAS
Adam Ford0a9ef452017-10-16 14:08:26 -050088 imply SPL_NAND_AM33XX_BCH
89 imply SPL_NAND_SUPPORT
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090090 imply SPL_OF_CONTROL
91 imply SPL_OF_TRANSLATE
92 imply SPL_SEPARATE_BSS
93 imply SPL_SYS_MALLOC_SIMPLE
Adam Forddaa0f052017-08-07 13:11:34 -050094 imply SYS_I2C_OMAP24XX
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +090095 imply SYS_THUMB_BUILD
96 help
97 Support for AM43xx SOC from Texas Instruments.
98 The AM43xx high performance SOC features a Cortex-A9
99 ARM core, a quad core PRU-ICSS for industrial Ethernet
100 protocols, dual camera support, optional 3D graphics
101 and an optional customer programmable secure boot.
102
103config AM33XX
104 bool "AM33XX SoC"
Nishanth Menon94c6a892018-06-12 15:24:11 -0500105 select ARM_CORTEX_A8_CVE_2017_5715
Tom Rini448e2b62023-01-16 15:46:49 -0500106 select DM_EVENT
Michal Simek58008cb2018-07-23 15:55:15 +0200107 select SPECIFY_CONSOLE_INDEX
Adam Ford0a9ef452017-10-16 14:08:26 -0500108 imply NAND_OMAP_ELM
109 imply NAND_OMAP_GPMC
Tom Rinia2ac2b92021-08-27 21:18:30 -0400110 imply SKIP_LOWLEVEL_INIT
Adam Ford0a9ef452017-10-16 14:08:26 -0500111 imply SPL_NAND_AM33XX_BCH
112 imply SPL_NAND_SUPPORT
Adam Forddaa0f052017-08-07 13:11:34 -0500113 imply SYS_I2C_OMAP24XX
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900114 imply SYS_THUMB_BUILD
Simon Glass27084c02019-09-25 08:56:27 -0600115 imply SPL_USE_TINY_PRINTF
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900116 help
117 Support for AM335x SOC from Texas Instruments.
118 The AM335x high performance SOC features a Cortex-A8
119 ARM core, a dual core PRU-ICSS for industrial Ethernet
120 protocols, optional 3D graphics and an optional customer
121 programmable secure boot.
122
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900123endchoice
124
Lokesh Vutlac187dd62017-05-05 12:59:07 +0530125config SYS_MPUCLK
126 int "MPU CLK speed"
Adam Ford876ddb52018-10-07 09:58:25 -0500127 depends on AM33XX
Lokesh Vutla59041a52017-05-05 12:59:08 +0530128 default 500
Lokesh Vutlac187dd62017-05-05 12:59:07 +0530129 help
130 Defines the MPU clock speed (in MHz).
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900131
Tom Rini789bb952022-11-16 13:10:32 -0500132config SYS_OMAP_ABE_SYSCK
133 bool
134
Andrew F. Davis3348e0c2017-07-10 14:45:49 -0500135config TI_SECURE_EMIF_REGION_START
136 hex "Reserved EMIF region start address"
137 depends on TI_SECURE_DEVICE
138 default 0x0
139 help
140 Reserved EMIF region start address. Set to "0" to auto-select
141 to be at the end of the external memory region.
142
143config TI_SECURE_EMIF_TOTAL_REGION_SIZE
144 hex "Reserved EMIF region size"
145 depends on TI_SECURE_DEVICE
146 default 0x0
147 help
148 Total reserved EMIF region size. Default is 0, which means no reserved EMIF
149 region on secure devices.
150
151config TI_SECURE_EMIF_PROTECTED_REGION_SIZE
152 hex "Size of protected region within reserved EMIF region"
153 depends on TI_SECURE_DEVICE
154 default 0x0
155 help
156 This config option is used to specify the size of the portion of the total
157 reserved EMIF region set aside for secure OS needs that will be protected
158 using hardware memory firewalls. This value must be smaller than the
159 TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
160
Tom Rini2bb9d7c2022-06-25 11:02:37 -0400161config SYS_AUTOMATIC_SDRAM_DETECTION
162 bool
163
164choice
165 depends on OMAP44XX || OMAP54XX
166 prompt "Static or dynamic DDR timing calculations"
167 default SYS_EMIF_PRECALCULATED_TIMING_REGS
168 help
169 For the DDR timing information we can either dynamically determine
170 the timings to use or use pre-determined timings (based on using the
171 dynamic method). Default to the static timing information.
172
173config SYS_EMIF_PRECALCULATED_TIMING_REGS
174 bool "Use precalcualted timing values"
175
176config SYS_DEFAULT_LPDDR2_TIMINGS
177 bool "Use default LPDDR2 timing values"
178 select SYS_AUTOMATIC_SDRAM_DETECTION
179
180endchoice
181
Tom Rini983e3702016-11-07 21:34:54 -0500182source "arch/arm/mach-omap2/omap3/Kconfig"
Madan Srinivasa774e082016-05-19 19:10:44 -0500183
Tom Rini983e3702016-11-07 21:34:54 -0500184source "arch/arm/mach-omap2/omap4/Kconfig"
Madan Srinivasa774e082016-05-19 19:10:44 -0500185
Tom Rini983e3702016-11-07 21:34:54 -0500186source "arch/arm/mach-omap2/omap5/Kconfig"
Madan Srinivasa774e082016-05-19 19:10:44 -0500187
Tom Rini983e3702016-11-07 21:34:54 -0500188source "arch/arm/mach-omap2/am33xx/Kconfig"
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900189
190source "board/BuR/brxre1/Kconfig"
Hannes Schmelzer60df8092019-08-01 07:04:46 +0200191source "board/BuR/brsmarc1/Kconfig"
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900192source "board/BuR/brppt1/Kconfig"
193source "board/siemens/draco/Kconfig"
194source "board/siemens/pxm2/Kconfig"
195source "board/siemens/rut/Kconfig"
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900196source "board/ti/am43xx/Kconfig"
197source "board/ti/am335x/Kconfig"
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900198source "board/compulab/cm_t43/Kconfig"
Niel Fourie6e171b62019-06-03 15:31:17 +0200199source "board/phytec/phycore_am335x_r2/Kconfig"
Masahiro Yamadaa93fbf4a2017-04-25 13:10:11 +0900200
201endif