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Wolfgang Denk86ea5f92006-02-22 00:43:16 +01001/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 * (easy to change)
30 */
31
32#define CONFIG_MPC5200
33#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
34#define CONFIG_MCC200 1 /* ... on MCC200 board */
35
36#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
37
38#define CONFIG_MISC_INIT_R
39
Wolfgang Denk360b4102006-09-03 18:17:46 +020040#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
41#define BOOTFLAG_WARM 0x02 /* Software reboot */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010042
Wolfgang Denk360b4102006-09-03 18:17:46 +020043#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010044#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Wolfgang Denk360b4102006-09-03 18:17:46 +020045# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010046#endif
47
48/*
49 * Serial console configuration
Wolfgang Denk87791f32006-07-11 00:23:54 +020050 *
51 * To select console on the one of 8 external UARTs,
52 * define CONFIG_QUART_CONSOLE as 1, 2, 3, or 4 for the first Quad UART,
53 * or as 5, 6, 7, or 8 for the second Quad UART.
Wolfgang Denk463764c2006-08-17 00:36:51 +020054 * COM11, COM12, COM13, COM14 are located on the second Quad UART.
Wolfgang Denk87791f32006-07-11 00:23:54 +020055 *
56 * CONFIG_PSC_CONSOLE must be undefined in this case.
57 */
Wolfgang Denked1cf842006-08-24 00:26:42 +020058#if !defined(CONFIG_PRS200)
59/* MCC200 configuration: */
Wolfgang Denk463764c2006-08-17 00:36:51 +020060#ifdef CONFIG_CONSOLE_COM12
61#define CONFIG_QUART_CONSOLE 6 /* console is on UARTF of QUART2 */
62#else
63#define CONFIG_QUART_CONSOLE 8 /* console is on UARTH of QUART2 */
64#endif
Wolfgang Denked1cf842006-08-24 00:26:42 +020065#else
66/* PRS200 configuration: */
67#undef CONFIG_QUART_CONSOLE
68#endif /* CONFIG_PRS200 */
Wolfgang Denk87791f32006-07-11 00:23:54 +020069/*
70 * To select console on PSC1, define CONFIG_PSC_CONSOLE as 1
71 * and undefine CONFIG_QUART_CONSOLE.
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010072 */
Wolfgang Denked1cf842006-08-24 00:26:42 +020073#if !defined(CONFIG_PRS200)
74/* MCC200 configuration: */
Wolfgang Denk0fd30252006-08-30 23:02:10 +020075#define CONFIG_SERIAL_MULTI 1
76#define CONFIG_PSC_CONSOLE 1 /* PSC1 may be COM */
77#define CONFIG_PSC_CONSOLE2 2 /* PSC2 is PSoC */
Wolfgang Denked1cf842006-08-24 00:26:42 +020078#else
79/* PRS200 configuration: */
80#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
81#endif
Wolfgang Denk0fd30252006-08-30 23:02:10 +020082#if defined(CONFIG_QUART_CONSOLE) && defined(CONFIG_PSC_CONSOLE) && \
83 !defined(CONFIG_SERIAL_MULTI)
Wolfgang Denk87791f32006-07-11 00:23:54 +020084#error "Select only one console device!"
85#endif
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010086#define CONFIG_BAUDRATE 115200
87#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
88
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010089#define CONFIG_MII 1
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010090
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010091#define CONFIG_DOS_PARTITION
92
93/* USB */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010094#define CONFIG_USB_OHCI
Wolfgang Denk360b4102006-09-03 18:17:46 +020095#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010096#define CONFIG_USB_STORAGE
Andrei Safronovcdb97a62006-12-08 16:23:08 +010097/* automatic software updates (see board/mcc200/auto_update.c) */
98#define CONFIG_AUTO_UPDATE 1
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010099
100/*
101 * Supported commands
102 */
103#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100104 ADD_USB_CMD | \
105 CFG_CMD_BEDBUG | \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100106 CFG_CMD_FAT | \
Wolfgang Denk5725f942006-03-21 01:58:07 +0100107 CFG_CMD_I2C)
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100108
109/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
110#include <cmd_confdefs.h>
111
112/*
113 * Autobooting
114 */
115#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
116
117#define CONFIG_PREBOOT "echo;" \
118 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
119 "echo"
120
121#undef CONFIG_BOOTARGS
122
Wolfgang Denk3b0ff842006-08-25 11:47:06 +0200123#define XMK_STR(x) #x
124#define MK_STR(x) XMK_STR(x)
Wolfgang Denked1cf842006-08-24 00:26:42 +0200125
126#ifdef CONFIG_PRS200
Wolfgang Denk3b0ff842006-08-25 11:47:06 +0200127# define CFG__BOARDNAME "prs200"
128# define CFG__LINUX_CONSOLE "ttyS0"
Wolfgang Denked1cf842006-08-24 00:26:42 +0200129#else
Wolfgang Denk3b0ff842006-08-25 11:47:06 +0200130# define CFG__BOARDNAME "mcc200"
131# define CFG__LINUX_CONSOLE "ttyEU7"
Wolfgang Denked1cf842006-08-24 00:26:42 +0200132#endif
133
134#define CONFIG_EXTRA_ENV_SETTINGS \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100135 "netdev=eth0\0" \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200136 "hostname=" CFG__BOARDNAME "\0" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100137 "nfsargs=setenv bootargs root=/dev/nfs rw " \
138 "nfsroot=${serverip}:${rootpath}\0" \
139 "ramargs=setenv bootargs root=/dev/ram rw\0" \
140 "addip=setenv bootargs ${bootargs} " \
141 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
142 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk113f64e2006-08-25 01:38:04 +0200143 "addcons=setenv bootargs ${bootargs} " \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200144 "console=${console},${baudrate}\0" \
145 "flash_nfs=run nfsargs addip addcons;" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100146 "bootm ${kernel_addr}\0" \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200147 "flash_self=run ramargs addip addcons;" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100148 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200149 "net_nfs=tftp 200000 ${bootfile};" \
150 "run nfsargs addip addcons;bootm\0" \
Wolfgang Denk21a9cc02006-08-29 10:49:11 +0200151 "console=" CFG__LINUX_CONSOLE "\0" \
Wolfgang Denk82f2e332006-02-28 18:39:20 +0100152 "rootpath=/opt/eldk/ppc_6xx\0" \
Wolfgang Denked1cf842006-08-24 00:26:42 +0200153 "bootfile=/tftpboot/" CFG__BOARDNAME "/uImage\0" \
154 "load=tftp 200000 /tftpboot/" CFG__BOARDNAME "/u-boot.bin\0" \
155 "text_base=" MK_STR(TEXT_BASE) "\0" \
156 "update=protect off ${text_base} +${filesize};" \
157 "era ${text_base} +${filesize};" \
158 "cp.b 200000 ${text_base} ${filesize}\0" \
Stefan Roese58ad4972006-02-28 15:33:28 +0100159 "unlock=yes\0" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100160 ""
Wolfgang Denked1cf842006-08-24 00:26:42 +0200161#undef MK_STR
162#undef XMK_STR
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100163
164#define CONFIG_BOOTCOMMAND "run flash_self"
165
Wolfgang Denk82f2e332006-02-28 18:39:20 +0100166#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
167#define CFG_PROMPT_HUSH_PS2 "> "
168
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100169/*
170 * IPB Bus clocking configuration.
171 */
Wolfgang Denk360b4102006-09-03 18:17:46 +0200172#define CFG_IPBSPEED_133 /* define for 133MHz speed */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100173
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100174/*
175 * I2C configuration
176 */
177#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Andrei Safronovcdb97a62006-12-08 16:23:08 +0100178#define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100179
180#define CFG_I2C_SPEED 100000 /* 100 kHz */
181#define CFG_I2C_SLAVE 0x7F
182
183/*
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100184 * Flash configuration (8,16 or 32 MB)
185 * TEXT base always at 0xFFF00000
186 * ENV_ADDR always at 0xFFF40000
Stefan Roese58ad4972006-02-28 15:33:28 +0100187 * FLASH_BASE at 0xFC000000 for 64 MB (only 32MB are supported, not enough addr lines!!!)
Wolfgang Denk360b4102006-09-03 18:17:46 +0200188 * 0xFE000000 for 32 MB
189 * 0xFF000000 for 16 MB
190 * 0xFF800000 for 8 MB
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100191 */
Stefan Roese58ad4972006-02-28 15:33:28 +0100192#define CFG_FLASH_BASE 0xfc000000
193#define CFG_FLASH_SIZE 0x04000000
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100194
Stefan Roese58ad4972006-02-28 15:33:28 +0100195#define CFG_FLASH_CFI /* The flash is CFI compatible */
196#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100197
Stefan Roese58ad4972006-02-28 15:33:28 +0100198#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100199
Stefan Roese58ad4972006-02-28 15:33:28 +0100200#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
201#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100202
Stefan Roese58ad4972006-02-28 15:33:28 +0100203#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
204#define CFG_FLASH_PROTECTION 1 /* hardware flash protection */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100205
Stefan Roese58ad4972006-02-28 15:33:28 +0100206#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
207#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100208
Stefan Roese58ad4972006-02-28 15:33:28 +0100209#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
210#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
211
Wolfgang Denk360b4102006-09-03 18:17:46 +0200212#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
Stefan Roese58ad4972006-02-28 15:33:28 +0100213
Wolfgang Denk360b4102006-09-03 18:17:46 +0200214#define CFG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */
Stefan Roese58ad4972006-02-28 15:33:28 +0100215#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
216#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
217
218/* Address and size of Redundant Environment Sector */
219#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
220#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
221
222#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100223
Wolfgang Denkf149d862006-05-05 00:59:28 +0200224#if TEXT_BASE == CFG_FLASH_BASE
225#define CFG_LOWBOOT 1
226#endif
227
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100228/*
229 * Memory map
230 */
231#define CFG_MBAR 0xf0000000
232#define CFG_SDRAM_BASE 0x00000000
233#define CFG_DEFAULT_MBAR 0x80000000
234
235/* Use SRAM until RAM will be available */
236#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
237#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
238
239
240#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
241#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
242#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
243
Wolfgang Denk360b4102006-09-03 18:17:46 +0200244#define CFG_MONITOR_BASE TEXT_BASE
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100245#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
246# define CFG_RAMBOOT 1
247#endif
248
249#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
Stefan Roese58ad4972006-02-28 15:33:28 +0100250#define CFG_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100251#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
252
253/*
254 * Ethernet configuration
255 */
256#define CONFIG_MPC5xxx_FEC 1
257/*
258 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
259 */
260/* #define CONFIG_FEC_10MBIT 1 */
Stefan Roese58ad4972006-02-28 15:33:28 +0100261#define CONFIG_PHY_ADDR 1
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100262
263/*
Wolfgang Denke8143e72006-08-30 23:09:00 +0200264 * LCD Splash Screen
265 */
Wolfgang Denk360b4102006-09-03 18:17:46 +0200266#if !defined(CONFIG_PRS200)
Wolfgang Denke8143e72006-08-30 23:09:00 +0200267#define CONFIG_LCD 1
Wolfgang Denk360b4102006-09-03 18:17:46 +0200268#endif
269
Wolfgang Denke8143e72006-08-30 23:09:00 +0200270#if defined(CONFIG_LCD)
271#define CONFIG_SPLASH_SCREEN 1
272#define CFG_CONSOLE_IS_IN_ENV 1
Wolfgang Denk360b4102006-09-03 18:17:46 +0200273#define LCD_BPP LCD_MONOCHROME
Wolfgang Denke8143e72006-08-30 23:09:00 +0200274#endif
275
276/*
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100277 * GPIO configuration
278 */
Wolfgang Denkbfc81252006-03-06 13:03:37 +0100279/* 0x10000004 = 32MB SDRAM */
280/* 0x90000004 = 64MB SDRAM */
Wolfgang Denke8143e72006-08-30 23:09:00 +0200281#if defined(CONFIG_LCD)
282/* set PSC2 in UART mode */
283#define CFG_GPS_PORT_CONFIG 0x00000044
284#else
Wolfgang Denk5725f942006-03-21 01:58:07 +0100285#define CFG_GPS_PORT_CONFIG 0x00000004
Wolfgang Denke8143e72006-08-30 23:09:00 +0200286#endif
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100287
288/*
289 * Miscellaneous configurable options
290 */
Wolfgang Denk360b4102006-09-03 18:17:46 +0200291#define CFG_LONGHELP /* undef to save memory */
292#define CFG_PROMPT "=> " /* Monitor Command Prompt */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100293#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Wolfgang Denk360b4102006-09-03 18:17:46 +0200294#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100295#else
Wolfgang Denk360b4102006-09-03 18:17:46 +0200296#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100297#endif
Wolfgang Denk360b4102006-09-03 18:17:46 +0200298#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100299#define CFG_MAXARGS 16 /* max number of command args */
300#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
301
Wolfgang Denk360b4102006-09-03 18:17:46 +0200302#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100303#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
304
305#define CFG_LOAD_ADDR 0x100000 /* default load address */
306
307#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
308
309/*
310 * Various low-level settings
311 */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100312#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
313#define CFG_HID0_FINAL HID0_ICE
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100314
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100315#define CFG_BOOTCS_START CFG_FLASH_BASE
316#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
317#define CFG_BOOTCS_CFG 0x0004fb00
318#define CFG_CS0_START CFG_FLASH_BASE
319#define CFG_CS0_SIZE CFG_FLASH_SIZE
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100320
Wolfgang Denk05d8dce2006-03-23 17:10:30 +0100321/* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */
322#define CFG_CS2_START 0x80000000
323#define CFG_CS2_SIZE 0x00001000
Wolfgang Denkb81a4632006-04-13 16:35:22 +0200324#define CFG_CS2_CFG 0x1d300
Wolfgang Denk05d8dce2006-03-23 17:10:30 +0100325
Wolfgang Denka874c8c2006-07-06 22:31:16 +0200326/* Second Quad UART @0x80010000 */
327#define CFG_CS1_START 0x80010000
328#define CFG_CS1_SIZE 0x00001000
329#define CFG_CS1_CFG 0x1d300
330
Wolfgang Denk87791f32006-07-11 00:23:54 +0200331/*
332 * Select one of quarts as a default
333 * console. If undefined - PSC console
334 * wil be default
335 */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100336#define CFG_CS_BURST 0x00000000
337#define CFG_CS_DEADCYCLE 0x33333333
338
339#define CFG_RESET_ADDRESS 0xff000000
340
Wolfgang Denk87791f32006-07-11 00:23:54 +0200341/*
342 * QUART Expanders support
343 */
344#if defined(CONFIG_QUART_CONSOLE)
345/*
346 * We'll use NS16550 chip routines,
347 */
348#define CFG_NS16550 1
349#define CFG_NS16550_SERIAL 1
350#define CONFIG_CONS_INDEX 1
351/*
352 * To achieve necessary offset on SC16C554
353 * A0-A2 (register select) pins with NS16550
354 * functions (in struct NS16550), REG_SIZE
355 * should be 4, because A0-A2 pins are connected
356 * to DA2-DA4 address bus lines.
357 */
358#define CFG_NS16550_REG_SIZE 4
359/*
360 * LocalPlus Bus already inited in cpu_init_f(),
361 * so can work with QUART's chip selects.
362 * One of four SC16C554 UARTs is selected with
363 * A3-A4 (DA5-DA6) lines.
364 */
Wolfgang Denked1cf842006-08-24 00:26:42 +0200365#if (CONFIG_QUART_CONSOLE > 0) && (CONFIG_QUART_CONSOLE < 5) && !defined(CONFIG_PRS200)
Wolfgang Denk87791f32006-07-11 00:23:54 +0200366#define CFG_NS16550_COM1 (CFG_CS2_START | (CONFIG_QUART_CONSOLE - 1)<<5)
367#elif (CONFIG_QUART_CONSOLE > 4) && (CONFIG_QUART_CONSOLE < 9)
368#define CFG_NS16550_COM1 (CFG_CS1_START | (CONFIG_QUART_CONSOLE - 5)<<5)
369#elif
370#error "Wrong QUART expander number."
371#endif
372
373/*
374 * SC16C554 chip's external crystal oscillator frequency
375 * is 7.3728 MHz
376 */
377#define CFG_NS16550_CLK 7372800
378#endif /* CONFIG_QUART_CONSOLE */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100379/*-----------------------------------------------------------------------
380 * USB stuff
381 *-----------------------------------------------------------------------
382 */
383#define CONFIG_USB_CLOCK 0x0001BBBB
384#define CONFIG_USB_CONFIG 0x00005000
385
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100386#endif /* __CONFIG_H */