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Wolfgang Denk86ea5f92006-02-22 00:43:16 +01001/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 * (easy to change)
30 */
31
32#define CONFIG_MPC5200
33#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
34#define CONFIG_MCC200 1 /* ... on MCC200 board */
35
36#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
37
38#define CONFIG_MISC_INIT_R
39
40#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
41#define BOOTFLAG_WARM 0x02 /* Software reboot */
42
43#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
46#endif
47
48/*
49 * Serial console configuration
50 */
51#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
52#define CONFIG_BAUDRATE 115200
53#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
54
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010055#define CONFIG_MII 1
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010056
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010057#define CONFIG_DOS_PARTITION
58
59/* USB */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010060#define CONFIG_USB_OHCI
61#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
62#define CONFIG_USB_STORAGE
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010063
64/*
65 * Supported commands
66 */
67#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010068 ADD_USB_CMD | \
69 CFG_CMD_BEDBUG | \
70 CFG_CMD_DATE | \
71 CFG_CMD_DHCP | \
72 CFG_CMD_EEPROM | \
73 CFG_CMD_FAT | \
74 CFG_CMD_I2C | \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010075 CFG_CMD_NFS | \
76 CFG_CMD_SNTP )
77
78/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
79#include <cmd_confdefs.h>
80
81/*
82 * Autobooting
83 */
84#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
85
86#define CONFIG_PREBOOT "echo;" \
87 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
88 "echo"
89
90#undef CONFIG_BOOTARGS
91
92#define CONFIG_EXTRA_ENV_SETTINGS \
93 "netdev=eth0\0" \
Stefan Roese58ad4972006-02-28 15:33:28 +010094 "hostname=mcc200\0" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +010095 "nfsargs=setenv bootargs root=/dev/nfs rw " \
96 "nfsroot=${serverip}:${rootpath}\0" \
97 "ramargs=setenv bootargs root=/dev/ram rw\0" \
98 "addip=setenv bootargs ${bootargs} " \
99 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
100 ":${hostname}:${netdev}:off panic=1\0" \
101 "flash_nfs=run nfsargs addip;" \
102 "bootm ${kernel_addr}\0" \
103 "flash_self=run ramargs addip;" \
104 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
105 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
Wolfgang Denk82f2e332006-02-28 18:39:20 +0100106 "rootpath=/opt/eldk/ppc_6xx\0" \
Stefan Roese58ad4972006-02-28 15:33:28 +0100107 "bootfile=/tftpboot/mcc200/uImage\0" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100108 "baudrate=115200\0" \
Wolfgang Denk82f2e332006-02-28 18:39:20 +0100109 "load=tftp 200000 /tftpboot/mcc200/u-boot.bin\0" \
110 "update=protect off FFF00000 +${filesize};" \
111 "era FFF00000 +${filesize};" \
112 "cp.b 200000 FFF00000 ${filesize}\0" \
Stefan Roese58ad4972006-02-28 15:33:28 +0100113 "serverip=192.168.1.1\0" \
114 "ipaddr=192.168.133.144\0" \
115 "netmask=255.255.0.0\0" \
116 "unlock=yes\0" \
Wolfgang Denk82f2e332006-02-28 18:39:20 +0100117 "ethaddr=00:02:44:7D:73:3B\0" \
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100118 ""
119
120#define CONFIG_BOOTCOMMAND "run flash_self"
121
Wolfgang Denk82f2e332006-02-28 18:39:20 +0100122#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
123#define CFG_PROMPT_HUSH_PS2 "> "
124
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100125/*
126 * IPB Bus clocking configuration.
127 */
Wolfgang Denk82f2e332006-02-28 18:39:20 +0100128#define CFG_IPBSPEED_133 /* define for 133MHz speed */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100129
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100130/*
131 * I2C configuration
132 */
133#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
134#define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */
135
136#define CFG_I2C_SPEED 100000 /* 100 kHz */
137#define CFG_I2C_SLAVE 0x7F
138
139/*
140 * EEPROM configuration
141 */
142#define CFG_I2C_EEPROM_ADDR 0x58
143#define CFG_I2C_EEPROM_ADDR_LEN 1
144#define CFG_EEPROM_PAGE_WRITE_BITS 4
145#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
146
147/*
148 * RTC configuration
149 */
150#define CONFIG_RTC_PCF8563
151#define CFG_I2C_RTC_ADDR 0x51
152
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100153/*
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100154 * Flash configuration (8,16 or 32 MB)
155 * TEXT base always at 0xFFF00000
156 * ENV_ADDR always at 0xFFF40000
Stefan Roese58ad4972006-02-28 15:33:28 +0100157 * FLASH_BASE at 0xFC000000 for 64 MB (only 32MB are supported, not enough addr lines!!!)
158 * 0xFE000000 for 32 MB
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100159 * 0xFF000000 for 16 MB
160 * 0xFF800000 for 8 MB
161 */
Stefan Roese58ad4972006-02-28 15:33:28 +0100162#define CFG_FLASH_BASE 0xfc000000
163#define CFG_FLASH_SIZE 0x04000000
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100164
Stefan Roese58ad4972006-02-28 15:33:28 +0100165#define CFG_FLASH_CFI /* The flash is CFI compatible */
166#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100167
Stefan Roese58ad4972006-02-28 15:33:28 +0100168#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100169
Stefan Roese58ad4972006-02-28 15:33:28 +0100170#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
171#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100172
Stefan Roese58ad4972006-02-28 15:33:28 +0100173#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
174#define CFG_FLASH_PROTECTION 1 /* hardware flash protection */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100175
Stefan Roese58ad4972006-02-28 15:33:28 +0100176#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
177#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100178
Stefan Roese58ad4972006-02-28 15:33:28 +0100179#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
180#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
181
182#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
183
184#define CFG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */
185#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
186#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
187
188/* Address and size of Redundant Environment Sector */
189#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
190#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
191
192#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100193
194/*
195 * Memory map
196 */
197#define CFG_MBAR 0xf0000000
198#define CFG_SDRAM_BASE 0x00000000
199#define CFG_DEFAULT_MBAR 0x80000000
200
201/* Use SRAM until RAM will be available */
202#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
203#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
204
205
206#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
207#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
208#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
209
210#define CFG_MONITOR_BASE TEXT_BASE
211#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
212# define CFG_RAMBOOT 1
213#endif
214
215#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
Stefan Roese58ad4972006-02-28 15:33:28 +0100216#define CFG_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100217#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
218
219/*
220 * Ethernet configuration
221 */
222#define CONFIG_MPC5xxx_FEC 1
223/*
224 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
225 */
226/* #define CONFIG_FEC_10MBIT 1 */
Stefan Roese58ad4972006-02-28 15:33:28 +0100227#define CONFIG_PHY_ADDR 1
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100228
229/*
230 * GPIO configuration
231 */
232//###CHD: MSB = 1 -> 64MB: funktioniert nicht: ERRATA - BUG?
233//###CHD: 0x10000004 = 32MB SDRAM
234//###CHD: 0x90000004 = 64MB SDRAM
235#define CFG_GPS_PORT_CONFIG 0x10000004
236
237/*
238 * Miscellaneous configurable options
239 */
240#define CFG_LONGHELP /* undef to save memory */
241#define CFG_PROMPT "=> " /* Monitor Command Prompt */
242#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
243#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
244#else
245#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
246#endif
247#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
248#define CFG_MAXARGS 16 /* max number of command args */
249#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
250
251#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
252#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
253
254#define CFG_LOAD_ADDR 0x100000 /* default load address */
255
256#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
257
258/*
259 * Various low-level settings
260 */
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100261#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
262#define CFG_HID0_FINAL HID0_ICE
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100263
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100264#define CFG_BOOTCS_START CFG_FLASH_BASE
265#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
266#define CFG_BOOTCS_CFG 0x0004fb00
267#define CFG_CS0_START CFG_FLASH_BASE
268#define CFG_CS0_SIZE CFG_FLASH_SIZE
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100269
270#define CFG_CS_BURST 0x00000000
271#define CFG_CS_DEADCYCLE 0x33333333
272
273#define CFG_RESET_ADDRESS 0xff000000
274
275/*-----------------------------------------------------------------------
276 * USB stuff
277 *-----------------------------------------------------------------------
278 */
279#define CONFIG_USB_CLOCK 0x0001BBBB
280#define CONFIG_USB_CONFIG 0x00005000
281
Wolfgang Denk86ea5f92006-02-22 00:43:16 +0100282#endif /* __CONFIG_H */