blob: 0f045972b72950d18651b97faa88998bc4f11673 [file] [log] [blame]
Chander Kashyape21185b2011-05-24 20:02:56 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
Chander Kashyap393cb362011-12-06 23:34:12 +00004 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
Chander Kashyape21185b2011-05-24 20:02:56 +00005 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28/* High Level Configuration Options */
Chander Kashyape21185b2011-05-24 20:02:56 +000029#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
30#define CONFIG_S5P 1 /* S5P Family */
Chander Kashyap393cb362011-12-06 23:34:12 +000031#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyape21185b2011-05-24 20:02:56 +000032#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
33
34#include <asm/arch/cpu.h> /* get chip and board defs */
35
36#define CONFIG_ARCH_CPU_INIT
37#define CONFIG_DISPLAY_CPUINFO
38#define CONFIG_DISPLAY_BOARDINFO
Rajeshwari Shinde198a40b2013-07-04 12:29:16 +053039#define CONFIG_BOARD_EARLY_INIT_F
Chander Kashyape21185b2011-05-24 20:02:56 +000040
Chander Kashyapb3c5a492011-09-20 21:25:01 +000041/* Mach Type */
42#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
43
Chander Kashyape21185b2011-05-24 20:02:56 +000044/* Keep L2 Cache Disabled */
45#define CONFIG_L2_OFF 1
46
47#define CONFIG_SYS_SDRAM_BASE 0x40000000
48#define CONFIG_SYS_TEXT_BASE 0x43E00000
49
50/* input clock of PLL: SMDKV310 has 24MHz input clock */
51#define CONFIG_SYS_CLK_FREQ 24000000
52
53#define CONFIG_SETUP_MEMORY_TAGS
54#define CONFIG_CMDLINE_TAG
55#define CONFIG_INITRD_TAG
56#define CONFIG_CMDLINE_EDITING
57
58/* Handling Sleep Mode*/
59#define S5P_CHECK_SLEEP 0x00000BAD
60#define S5P_CHECK_DIDLE 0xBAD00000
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +053061#define S5P_CHECK_LPA 0xABAD0000
Chander Kashyape21185b2011-05-24 20:02:56 +000062
63/* Size of malloc() pool */
64#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
65
66/* select serial console configuration */
Chander Kashyape21185b2011-05-24 20:02:56 +000067#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
68#define CONFIG_BAUDRATE 115200
Chander Kashyap393cb362011-12-06 23:34:12 +000069#define EXYNOS4_DEFAULT_UART_OFFSET 0x010000
Chander Kashyape21185b2011-05-24 20:02:56 +000070
71/* SD/MMC configuration */
Jaehoon Chung7d2d58b2012-04-23 02:36:29 +000072#define CONFIG_GENERIC_MMC
73#define CONFIG_MMC
74#define CONFIG_SDHCI
75#define CONFIG_S5P_SDHCI
Chander Kashyape21185b2011-05-24 20:02:56 +000076
77/* PWM */
78#define CONFIG_PWM 1
79
80/* allow to overwrite serial and ethaddr */
81#define CONFIG_ENV_OVERWRITE
82
83/* Command definition*/
84#include <config_cmd_default.h>
85
86#define CONFIG_CMD_PING
87#define CONFIG_CMD_ELF
88#define CONFIG_CMD_DHCP
89#define CONFIG_CMD_MMC
90#define CONFIG_CMD_NET
91#define CONFIG_CMD_FAT
92
93#define CONFIG_BOOTDELAY 3
94#define CONFIG_ZERO_BOOTDELAY_CHECK
Chander Kashyap5187d8d2011-09-20 21:25:03 +000095
96/* MMC SPL */
97#define CONFIG_SPL
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +053098#define CONFIG_SKIP_LOWLEVEL_INIT
Chander Kashyap9b3ab1c2011-09-20 21:25:04 +000099#define COPY_BL2_FNPTR_ADDR 0x00002488
Chander Kashyape21185b2011-05-24 20:02:56 +0000100
Inderpal Singh8a000612013-04-04 23:09:21 +0000101#define CONFIG_SPL_TEXT_BASE 0x02021410
102
Chander Kashyape21185b2011-05-24 20:02:56 +0000103#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
104
105/* Miscellaneous configurable options */
106#define CONFIG_SYS_LONGHELP /* undef to save memory */
107#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Chander Kashyape21185b2011-05-24 20:02:56 +0000108#define CONFIG_SYS_PROMPT "SMDKV310 # "
109#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
110#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
111#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
112#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
113/* Boot Argument Buffer Size */
114#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
115/* memtest works on */
116#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
117#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
118#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
119
120#define CONFIG_SYS_HZ 1000
121
Chander Kashyape21185b2011-05-24 20:02:56 +0000122/* SMDKV310 has 4 bank of DRAM */
123#define CONFIG_NR_DRAM_BANKS 4
124#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
125#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
126#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
127#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
128#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
129#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
130#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
131#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
132#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
133
134/* FLASH and environment organization */
135#define CONFIG_SYS_NO_FLASH 1
136#undef CONFIG_CMD_IMLS
137#define CONFIG_IDENT_STRING " for SMDKC210/V310"
138
Chander Kashyape21185b2011-05-24 20:02:56 +0000139#define CONFIG_CLK_1000_400_200
140
141/* MIU (Memory Interleaving Unit) */
142#define CONFIG_MIU_2BIT_INTERLEAVED
143
144#define CONFIG_ENV_IS_IN_MMC 1
145#define CONFIG_SYS_MMC_ENV_DEV 0
146#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
147#define RESERVE_BLOCK_SIZE (512)
148#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
149#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
150#define CONFIG_DOS_PARTITION 1
151
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +0530152#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
153#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
154
155#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyape21185b2011-05-24 20:02:56 +0000156
157/* U-boot copy size from boot Media to DRAM.*/
158#define COPY_BL2_SIZE 0x80000
159#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
160#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
161
162/* Ethernet Controllor Driver */
163#ifdef CONFIG_CMD_NET
Chander Kashyape21185b2011-05-24 20:02:56 +0000164#define CONFIG_SMC911X
165#define CONFIG_SMC911X_BASE 0x5000000
166#define CONFIG_SMC911X_16_BIT
167#define CONFIG_ENV_SROM_BANK 1
168#endif /*CONFIG_CMD_NET*/
Thomas Abraham07407d92011-06-03 22:52:17 +0000169
170/* Enable devicetree support */
171#define CONFIG_OF_LIBFDT
Chander Kashyape21185b2011-05-24 20:02:56 +0000172#endif /* __CONFIG_H */