Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Nobuhiro Iwamatsu | f4ec452 | 2013-11-21 17:06:46 +0900 | [diff] [blame] | 2 | /* |
| 3 | * include/configs/lager.h |
| 4 | * This file is lager board configuration. |
| 5 | * |
Nobuhiro Iwamatsu | 5ca6dfe | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 6 | * Copyright (C) 2013, 2014 Renesas Electronics Corporation |
Nobuhiro Iwamatsu | f4ec452 | 2013-11-21 17:06:46 +0900 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __LAGER_H |
| 10 | #define __LAGER_H |
| 11 | |
Nobuhiro Iwamatsu | 5ca6dfe | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 12 | #include "rcar-gen2-common.h" |
Nobuhiro Iwamatsu | d80149b | 2014-03-31 15:22:31 +0900 | [diff] [blame] | 13 | |
Marek Vasut | e6027e6 | 2018-04-23 20:24:06 +0200 | [diff] [blame] | 14 | #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 |
| 15 | #define STACK_AREA_SIZE 0x00100000 |
| 16 | #define LOW_LEVEL_MERAM_STACK \ |
Nobuhiro Iwamatsu | f4ec452 | 2013-11-21 17:06:46 +0900 | [diff] [blame] | 17 | (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) |
| 18 | |
| 19 | /* MEMORY */ |
Nobuhiro Iwamatsu | 5ca6dfe | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 20 | #define RCAR_GEN2_SDRAM_BASE 0x40000000 |
| 21 | #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) |
| 22 | #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) |
Nobuhiro Iwamatsu | f4ec452 | 2013-11-21 17:06:46 +0900 | [diff] [blame] | 23 | |
Nobuhiro Iwamatsu | 23565c6 | 2013-10-20 20:28:24 +0900 | [diff] [blame] | 24 | /* SH Ether */ |
Nobuhiro Iwamatsu | 23565c6 | 2013-10-20 20:28:24 +0900 | [diff] [blame] | 25 | #define CONFIG_SH_ETHER_USE_PORT 0 |
| 26 | #define CONFIG_SH_ETHER_PHY_ADDR 0x1 |
| 27 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII |
Nobuhiro Iwamatsu | 23565c6 | 2013-10-20 20:28:24 +0900 | [diff] [blame] | 28 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK |
| 29 | #define CONFIG_SH_ETHER_CACHE_INVALIDATE |
Marek Vasut | e6027e6 | 2018-04-23 20:24:06 +0200 | [diff] [blame] | 30 | #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 |
Nobuhiro Iwamatsu | 23565c6 | 2013-10-20 20:28:24 +0900 | [diff] [blame] | 31 | #define CONFIG_BITBANGMII_MULTI |
| 32 | |
Nobuhiro Iwamatsu | f4ec452 | 2013-11-21 17:06:46 +0900 | [diff] [blame] | 33 | /* Board Clock */ |
Nobuhiro Iwamatsu | b1f78a2 | 2014-03-31 14:03:07 +0900 | [diff] [blame] | 34 | #define RMOBILE_XTAL_CLK 20000000u |
| 35 | #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK |
Nobuhiro Iwamatsu | f4ec452 | 2013-11-21 17:06:46 +0900 | [diff] [blame] | 36 | |
Marek Vasut | e6027e6 | 2018-04-23 20:24:06 +0200 | [diff] [blame] | 37 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Marek Vasut | 07a8060 | 2018-11-27 00:19:03 +0100 | [diff] [blame] | 38 | "bootm_size=0x10000000\0" |
Nobuhiro Iwamatsu | 5c4bb96 | 2014-03-27 14:14:58 +0900 | [diff] [blame] | 39 | |
Marek Vasut | e6027e6 | 2018-04-23 20:24:06 +0200 | [diff] [blame] | 40 | /* SPL support */ |
Marek Vasut | e6027e6 | 2018-04-23 20:24:06 +0200 | [diff] [blame] | 41 | #define CONFIG_SPL_STACK 0xe6340000 |
| 42 | #define CONFIG_SPL_MAX_SIZE 0x4000 |
Marek Vasut | e6027e6 | 2018-04-23 20:24:06 +0200 | [diff] [blame] | 43 | #ifdef CONFIG_SPL_BUILD |
| 44 | #define CONFIG_CONS_SCIF0 |
| 45 | #define CONFIG_SH_SCIF_CLK_FREQ 65000000 |
| 46 | #endif |
Nobuhiro Iwamatsu | acdfecb | 2014-11-21 10:19:32 +0900 | [diff] [blame] | 47 | |
Nobuhiro Iwamatsu | f4ec452 | 2013-11-21 17:06:46 +0900 | [diff] [blame] | 48 | #endif /* __LAGER_H */ |