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stroesea65cb682003-09-12 08:41:39 +00001/*
2 * (C) Copyright 2001-2003
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/processor.h>
Matthias Fuchsbb57ad42009-02-20 10:19:19 +010026#include <asm/io.h>
stroesea65cb682003-09-12 08:41:39 +000027#include <command.h>
28#include <malloc.h>
29
Wolfgang Denkd87080b2006-03-31 18:32:53 +020030DECLARE_GLOBAL_DATA_PTR;
stroese31193c22004-12-16 18:37:08 +000031
32extern void lxt971_no_sleep(void);
stroesea65cb682003-09-12 08:41:39 +000033
stroese47b1e3d2005-03-01 17:26:39 +000034int board_revision(void)
35{
36 unsigned long osrl_reg;
37 unsigned long isr1l_reg;
38 unsigned long tcr_reg;
39 unsigned long value;
40
41 /*
42 * Get version of HUB405 board from GPIO's
43 */
44
45 /*
46 * Setup GPIO pin(s) (IRQ6/GPIO23)
47 */
Matthias Fuchsbb57ad42009-02-20 10:19:19 +010048 osrl_reg = in_be32((void *)GPIO0_OSRH);
49 isr1l_reg = in_be32((void *)GPIO0_ISR1H);
50 tcr_reg = in_be32((void *)GPIO0_TCR);
51 out_be32((void *)GPIO0_OSRH, osrl_reg & ~0x00030000); /* output select */
52 out_be32((void *)GPIO0_ISR1H, isr1l_reg | 0x00030000); /* input select */
53 out_be32((void *)GPIO0_TCR, tcr_reg & ~0x00000100); /* select input */
stroese47b1e3d2005-03-01 17:26:39 +000054
55 udelay(1000); /* wait some time before reading input */
Matthias Fuchsbb57ad42009-02-20 10:19:19 +010056 value = in_be32((void *)GPIO0_IR) & 0x00000100; /* get config bits */
stroese47b1e3d2005-03-01 17:26:39 +000057
58 /*
59 * Restore GPIO settings
60 */
Matthias Fuchsbb57ad42009-02-20 10:19:19 +010061 out_be32((void *)GPIO0_OSRH, osrl_reg); /* output select */
62 out_be32((void *)GPIO0_ISR1H, isr1l_reg); /* input select */
63 out_be32((void *)GPIO0_TCR, tcr_reg); /* enable output driver for outputs */
stroese47b1e3d2005-03-01 17:26:39 +000064
65 if (value & 0x00000100) {
66 /* Revision 1.1 or 1.2 detected */
67 return 1;
68 }
69
70 /* Revision 1.0 */
71 return 0;
72}
73
74
wdenkc837dcb2004-01-20 23:12:12 +000075int board_early_init_f (void)
stroesea65cb682003-09-12 08:41:39 +000076{
77 /*
78 * IRQ 0-15 405GP internally generated; active high; level sensitive
79 * IRQ 16 405GP internally generated; active low; level sensitive
80 * IRQ 17-24 RESERVED
81 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
82 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
83 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
84 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
85 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
86 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
87 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
88 */
Stefan Roese952e7762009-09-24 09:55:50 +020089 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
90 mtdcr(UIC0ER, 0x00000000); /* disable all ints */
91 mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/
92 mtdcr(UIC0PR, 0xFFFFFF9F); /* set int polarities */
93 mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */
94 mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority*/
95 mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
stroesea65cb682003-09-12 08:41:39 +000096
97 /*
98 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
99 */
Stefan Roesed1c3b272009-09-09 16:25:29 +0200100 mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
stroesea65cb682003-09-12 08:41:39 +0000101
102 return 0;
103}
104
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100105#define LED_REG (DUART0_BA + 0x20)
stroesea65cb682003-09-12 08:41:39 +0000106int misc_init_r (void)
107{
stroese31193c22004-12-16 18:37:08 +0000108 unsigned long val;
109 int delay, flashcnt;
110 char *str;
stroese47b1e3d2005-03-01 17:26:39 +0000111 char hw_rev[4];
stroesea65cb682003-09-12 08:41:39 +0000112
113 /*
114 * Enable interrupts in exar duart mcr[3]
115 */
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100116 out_8((void *)(DUART0_BA + 4), 0x08);
117 out_8((void *)(DUART1_BA + 4), 0x08);
118 out_8((void *)(DUART2_BA + 4), 0x08);
119 out_8((void *)(DUART3_BA + 4), 0x08);
stroesea65cb682003-09-12 08:41:39 +0000120
wdenkefe2a4d2004-12-16 21:44:03 +0000121 /*
stroese31193c22004-12-16 18:37:08 +0000122 * Set RS232/RS422 control (RS232 = high on GPIO)
123 */
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100124 val = in_be32((void *)GPIO0_OR);
125 val &= ~(CONFIG_SYS_UART2_RS232 | CONFIG_SYS_UART3_RS232 |
126 CONFIG_SYS_UART4_RS232 | CONFIG_SYS_UART5_RS232);
stroese31193c22004-12-16 18:37:08 +0000127
128 str = getenv("phys0");
129 if (!str || (str && (str[0] == '0')))
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200130 val |= CONFIG_SYS_UART2_RS232;
stroese31193c22004-12-16 18:37:08 +0000131
132 str = getenv("phys1");
133 if (!str || (str && (str[0] == '0')))
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134 val |= CONFIG_SYS_UART3_RS232;
stroese31193c22004-12-16 18:37:08 +0000135
136 str = getenv("phys2");
137 if (!str || (str && (str[0] == '0')))
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200138 val |= CONFIG_SYS_UART4_RS232;
stroese31193c22004-12-16 18:37:08 +0000139
140 str = getenv("phys3");
141 if (!str || (str && (str[0] == '0')))
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142 val |= CONFIG_SYS_UART5_RS232;
stroese31193c22004-12-16 18:37:08 +0000143
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100144 out_be32((void *)GPIO0_OR, val);
stroese31193c22004-12-16 18:37:08 +0000145
stroesea65cb682003-09-12 08:41:39 +0000146 /*
stroese31193c22004-12-16 18:37:08 +0000147 * check board type and setup AP power
148 */
149 str = getenv("bd_type"); /* this is only set on non prototype hardware */
150 if (str != NULL) {
stroese47b1e3d2005-03-01 17:26:39 +0000151 if ((strcmp(str, "swch405") == 0) || ((!strcmp(str, "hub405") && (gd->board_type >= 1)))) {
stroese31193c22004-12-16 18:37:08 +0000152 unsigned char led_reg_default = 0;
153 str = getenv("ap_pwr");
154 if (!str || (str && (str[0] == '1')))
155 led_reg_default = 0x04 | 0x02 ; /* U2_LED | AP_PWR */
156
157 /*
stroese47b1e3d2005-03-01 17:26:39 +0000158 * Flash LEDs
stroese31193c22004-12-16 18:37:08 +0000159 */
160 for (flashcnt = 0; flashcnt < 3; flashcnt++) {
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100161 /* LED_A..D off */
162 out_8((void *)LED_REG, led_reg_default);
stroese31193c22004-12-16 18:37:08 +0000163 for (delay = 0; delay < 100; delay++)
164 udelay(1000);
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100165 /* LED_A..D on */
166 out_8((void *)LED_REG, led_reg_default | 0xf0);
stroese31193c22004-12-16 18:37:08 +0000167 for (delay = 0; delay < 50; delay++)
168 udelay(1000);
169 }
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100170 out_8((void *)LED_REG, led_reg_default);
stroese31193c22004-12-16 18:37:08 +0000171 }
172 }
173
174 /*
175 * Reset external DUARTs
176 */
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100177 out_be32((void *)GPIO0_OR,
178 in_be32((void *)GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */
stroese31193c22004-12-16 18:37:08 +0000179 udelay(10); /* wait 10us */
Matthias Fuchsbb57ad42009-02-20 10:19:19 +0100180 out_be32((void *)GPIO0_OR,
181 in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */
stroese31193c22004-12-16 18:37:08 +0000182 udelay(1000); /* wait 1ms */
183
stroese47b1e3d2005-03-01 17:26:39 +0000184 /*
185 * Store hardware revision in environment for further processing
186 */
187 sprintf(hw_rev, "1.%ld", gd->board_type);
188 setenv("hw_rev", hw_rev);
stroesea65cb682003-09-12 08:41:39 +0000189 return (0);
190}
191
192
193/*
194 * Check Board Identity:
195 */
stroesea65cb682003-09-12 08:41:39 +0000196int checkboard (void)
197{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200198 char str[64];
stroesea65cb682003-09-12 08:41:39 +0000199 int i = getenv_r ("serial#", str, sizeof(str));
200
201 puts ("Board: ");
202
203 if (i == -1) {
204 puts ("### No HW ID - assuming HUB405");
205 } else {
206 puts(str);
207 }
208
stroese47b1e3d2005-03-01 17:26:39 +0000209 if (getenv_r("bd_type", str, sizeof(str)) != -1) {
210 printf(" (%s", str);
211 } else {
212 puts(" (Missing bd_type!");
213 }
214
215 gd->board_type = board_revision();
216 printf(", Rev 1.%ld)\n", gd->board_type);
stroesea65cb682003-09-12 08:41:39 +0000217
stroese31193c22004-12-16 18:37:08 +0000218 /*
219 * Disable sleep mode in LXT971
220 */
221 lxt971_no_sleep();
222
stroesea65cb682003-09-12 08:41:39 +0000223 return 0;
224}