blob: fbbf94ef5594cfa95690bd41d242ef0af221bdb8 [file] [log] [blame]
Jagan Teki0d47bc72018-12-22 21:32:49 +05301config CLK_SUNXI
2 bool "Clock support for Allwinner SoCs"
3 depends on CLK && ARCH_SUNXI
Jagan Teki99ba4302019-01-18 22:18:13 +05304 select DM_RESET
Jagan Teki0d47bc72018-12-22 21:32:49 +05305 default y
6 help
7 This enables support for common clock driver API on Allwinner
8 SoCs.
9
10if CLK_SUNXI
11
Jagan Teki6590bd82018-08-02 16:52:37 +053012config CLK_SUN4I_A10
13 bool "Clock driver for Allwinner A10/A20"
14 default MACH_SUN4I || MACH_SUN7I
15 help
16 This enables common clock driver support for platforms based
17 on Allwinner A10/A20 SoC.
18
Jagan Tekie9458162018-08-02 15:43:02 +053019config CLK_SUN8I_H3
20 bool "Clock driver for Allwinner H3/H5"
21 default MACH_SUNXI_H3_H5
22 help
23 This enables common clock driver support for platforms based
24 on Allwinner H3/H5 SoC.
25
Jagan Teki0d47bc72018-12-22 21:32:49 +053026config CLK_SUN50I_A64
27 bool "Clock driver for Allwinner A64"
28 default MACH_SUN50I
29 help
30 This enables common clock driver support for platforms based
31 on Allwinner A64 SoC.
32
33endif # CLK_SUNXI