blob: 6992689001097797eb507fcedd8210199e730a1b [file] [log] [blame]
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +09001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2016-2017 Socionext Inc.
4 */
5#ifndef __CONFIG_H
6#define __CONFIG_H
7
8/* Timers for fasp(TIMCLK) */
Tom Rini65cc0e22022-11-16 13:10:41 -05009#define CFG_SYS_TIMERBASE 0x31080000 /* AP Timer 1 (ARM-SP804) */
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090010
11/*
12 * SDRAM (for initialize)
13 */
Tom Riniaa6e94d2022-11-16 13:10:37 -050014#define CFG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090015#define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */
16
17#define CONFIG_VERY_BIG_RAM /* SynQuacer supports up to 64GB */
18#define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_SIZE
19
20#define SQ_DRAMINFO_BASE (0x2e00ffc0) /* DRAM info from TF-A */
21
22/*
23 * Boot info
24 */
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090025
26/*
27 * Hardware drivers support
28 */
29
30/* RTC */
Tom Rini65cc0e22022-11-16 13:10:41 -050031#define CFG_SYS_I2C_RTC_ADDR 0x51
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090032
33/* Serial (pl011) */
34#define UART_CLK (62500000)
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090035#define CONFIG_PL011_CLOCK UART_CLK
36#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)}
37
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090038/* Support MTD */
Tom Rini65cc0e22022-11-16 13:10:41 -050039#define CFG_SYS_FLASH_BASE (0x08000000)
40#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE}
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090041
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090042/* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090043
Masami Hiramatsu3a373862021-06-04 18:45:31 +090044#define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \
Masami Hiramatsu4d492b02021-11-10 09:40:07 +090045 "mtd nor1=u-boot.bin raw 200000 100000;" \
Masami Hiramatsu3a373862021-06-04 18:45:31 +090046 "fip.bin raw 180000 78000;" \
47 "optee.bin raw 500000 100000\0"
48
Sughosh Ganu741ef862022-04-15 11:29:34 +053049/* GUIDs for capsule updatable firmware images */
50#define DEVELOPERBOX_UBOOT_IMAGE_GUID \
51 EFI_GUID(0x53a92e83, 0x4ef4, 0x473a, 0x8b, 0x0d, \
52 0xb5, 0xd8, 0xc7, 0xb2, 0xd6, 0x00)
53
54#define DEVELOPERBOX_FIP_IMAGE_GUID \
55 EFI_GUID(0x880866e9, 0x84ba, 0x4793, 0xa9, 0x08, \
56 0x33, 0xe0, 0xb9, 0x16, 0xf3, 0x98)
57
58#define DEVELOPERBOX_OPTEE_IMAGE_GUID \
59 EFI_GUID(0xc1b629f1, 0xce0e, 0x4894, 0x82, 0xbf, \
60 0xf0, 0xa3, 0x83, 0x87, 0xe6, 0x30)
61
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090062/* Distro boot settings */
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090063#ifdef CONFIG_CMD_USB
64#define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0)
65#else
66#define BOOT_TARGET_DEVICE_USB(func)
67#endif
68
69#ifdef CONFIG_CMD_MMC
70#define BOOT_TARGET_DEVICE_MMC(func) func(MMC, mmc, 0)
71#else
72#define BOOT_TARGET_DEVICE_MMC(func)
73#endif
74
75#ifdef CONFIG_CMD_NVME
76#define BOOT_TARGET_DEVICE_NVME(func) func(NVME, nvme, 0)
77#else
78#define BOOT_TARGET_DEVICE_NVME(func)
79#endif
80
81#ifdef CONFIG_CMD_SCSI
82#define BOOT_TARGET_DEVICE_SCSI(func) func(SCSI, scsi, 0) func(SCSI, scsi, 1)
83#else
84#define BOOT_TARGET_DEVICE_SCSI(func)
85#endif
86
87#define BOOT_TARGET_DEVICES(func) \
88 BOOT_TARGET_DEVICE_USB(func) \
89 BOOT_TARGET_DEVICE_MMC(func) \
90 BOOT_TARGET_DEVICE_SCSI(func) \
91 BOOT_TARGET_DEVICE_NVME(func) \
92
93#include <config_distro_bootcmd.h>
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090094
95#define CONFIG_EXTRA_ENV_SETTINGS \
96 "fdt_addr_r=0x9fe00000\0" \
97 "kernel_addr_r=0x90000000\0" \
98 "ramdisk_addr_r=0xa0000000\0" \
99 "scriptaddr=0x88000000\0" \
100 "pxefile_addr_r=0x88100000\0" \
Masami Hiramatsu3a373862021-06-04 18:45:31 +0900101 DEFAULT_DFU_ALT_INFO \
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +0900102 BOOTENV
103
104#endif /* __CONFIG_H */