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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Matthias Fuchs95c6bc72007-12-27 16:55:17 +01002/*
3 * (C) Copyright 2007
4 * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com.
Matthias Fuchs95c6bc72007-12-27 16:55:17 +01005 */
6
7/*
8 * Epson RX8025 RTC driver.
9 */
10
11#include <common.h>
12#include <command.h>
Heiko Schocher0c4e81e2019-07-16 05:31:35 +020013#include <dm.h>
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010014#include <i2c.h>
Heiko Schocher0c4e81e2019-07-16 05:31:35 +020015#include <rtc.h>
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010016
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010017/*---------------------------------------------------------------------*/
18#undef DEBUG_RTC
19
20#ifdef DEBUG_RTC
21#define DEBUGR(fmt,args...) printf(fmt ,##args)
22#else
23#define DEBUGR(fmt,args...)
24#endif
25/*---------------------------------------------------------------------*/
26
Mathew McBride9ca4ae22021-09-17 06:46:02 +000027enum rx_model {
28 model_rx_8025,
29 model_rx_8035,
30};
31
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010032/*
33 * RTC register addresses
34 */
35#define RTC_SEC_REG_ADDR 0x00
36#define RTC_MIN_REG_ADDR 0x01
37#define RTC_HR_REG_ADDR 0x02
38#define RTC_DAY_REG_ADDR 0x03
39#define RTC_DATE_REG_ADDR 0x04
40#define RTC_MON_REG_ADDR 0x05
41#define RTC_YR_REG_ADDR 0x06
Mathew McBride771fc0c2021-09-17 06:46:03 +000042#define RTC_OFFSET_REG_ADDR 0x07
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010043
44#define RTC_CTL1_REG_ADDR 0x0e
45#define RTC_CTL2_REG_ADDR 0x0f
46
47/*
48 * Control register 1 bits
49 */
50#define RTC_CTL1_BIT_2412 0x20
51
52/*
53 * Control register 2 bits
54 */
55#define RTC_CTL2_BIT_PON 0x10
56#define RTC_CTL2_BIT_VDET 0x40
57#define RTC_CTL2_BIT_XST 0x20
58#define RTC_CTL2_BIT_VDSL 0x80
59
60/*
61 * Note: the RX8025 I2C RTC requires register
62 * reads and write to consist of a single bus
63 * cycle. It is not allowed to write the register
64 * address in a first cycle that is terminated by
65 * a STOP condition. The chips needs a 'restart'
66 * sequence (start sequence without a prior stop).
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010067 */
68
Heiko Schocher0c4e81e2019-07-16 05:31:35 +020069#define rtc_read(reg) buf[(reg) & 0xf]
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010070
Mathew McBride152ef912021-09-17 06:46:01 +000071static int rtc_write(struct udevice *dev, uchar reg, uchar val);
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010072
Mathew McBride9ca4ae22021-09-17 06:46:02 +000073static int rx8025_is_osc_stopped(enum rx_model model, int ctrl2)
74{
75 int xstp = ctrl2 & RTC_CTL2_BIT_XST;
76 /* XSTP bit has different polarity on RX-8025 vs RX-8035.
77 * RX-8025: 0 == oscillator stopped
78 * RX-8035: 1 == oscillator stopped
79 */
80
81 if (model == model_rx_8025)
82 xstp = !xstp;
83
84 return xstp;
85}
86
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010087/*
88 * Get the current time from the RTC
89 */
Mathew McBride152ef912021-09-17 06:46:01 +000090static int rx8025_rtc_get(struct udevice *dev, struct rtc_time *tmp)
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010091{
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +030092 int rel = 0;
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010093 uchar sec, min, hour, mday, wday, mon, year, ctl2;
94 uchar buf[16];
95
Heiko Schocher0c4e81e2019-07-16 05:31:35 +020096 if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
Matthias Fuchs95c6bc72007-12-27 16:55:17 +010097 printf("Error reading from RTC\n");
Heiko Schocher0c4e81e2019-07-16 05:31:35 +020098 return -EIO;
99 }
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100100
101 sec = rtc_read(RTC_SEC_REG_ADDR);
102 min = rtc_read(RTC_MIN_REG_ADDR);
103 hour = rtc_read(RTC_HR_REG_ADDR);
104 wday = rtc_read(RTC_DAY_REG_ADDR);
105 mday = rtc_read(RTC_DATE_REG_ADDR);
106 mon = rtc_read(RTC_MON_REG_ADDR);
107 year = rtc_read(RTC_YR_REG_ADDR);
108
Heiko Schocherf91fb722019-07-16 05:31:34 +0200109 DEBUGR("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
110 "hr: %02x min: %02x sec: %02x\n",
111 year, mon, mday, wday, hour, min, sec);
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100112
113 /* dump status */
114 ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300115 if (ctl2 & RTC_CTL2_BIT_PON) {
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100116 printf("RTC: power-on detected\n");
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300117 rel = -1;
118 }
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100119
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300120 if (ctl2 & RTC_CTL2_BIT_VDET) {
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100121 printf("RTC: voltage drop detected\n");
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300122 rel = -1;
123 }
Mathew McBride9ca4ae22021-09-17 06:46:02 +0000124 if (rx8025_is_osc_stopped(dev->driver_data, ctl2)) {
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100125 printf("RTC: oscillator stop detected\n");
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300126 rel = -1;
127 }
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100128
Heiko Schocherf91fb722019-07-16 05:31:34 +0200129 tmp->tm_sec = bcd2bin(sec & 0x7F);
130 tmp->tm_min = bcd2bin(min & 0x7F);
Yuri Tikhonov5875d352008-08-15 15:42:09 +0200131 if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
Heiko Schocherf91fb722019-07-16 05:31:34 +0200132 tmp->tm_hour = bcd2bin(hour & 0x3F);
Yuri Tikhonov5875d352008-08-15 15:42:09 +0200133 else
Heiko Schocherf91fb722019-07-16 05:31:34 +0200134 tmp->tm_hour = bcd2bin(hour & 0x1F) % 12 +
Yuri Tikhonov5875d352008-08-15 15:42:09 +0200135 ((hour & 0x20) ? 12 : 0);
Heiko Schocherf91fb722019-07-16 05:31:34 +0200136
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100137 tmp->tm_mday = bcd2bin (mday & 0x3F);
138 tmp->tm_mon = bcd2bin (mon & 0x1F);
139 tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
140 tmp->tm_wday = bcd2bin (wday & 0x07);
141 tmp->tm_yday = 0;
142 tmp->tm_isdst= 0;
143
Heiko Schocherf91fb722019-07-16 05:31:34 +0200144 DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
145 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
146 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300147
148 return rel;
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100149}
150
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100151/*
152 * Set the RTC
153 */
Mathew McBride152ef912021-09-17 06:46:01 +0000154static int rx8025_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100155{
Mathew McBride771fc0c2021-09-17 06:46:03 +0000156 /* To work around the read/write cycle issue mentioned
157 * at the top of this file, write all the time registers
158 * in one I2C transaction
159 */
160 u8 write_op[8];
161
162 /* 2412 flag must be set before doing a RTC write,
163 * otherwise the seconds and minute register
164 * will be cleared when the flag is set
165 */
166 if (rtc_write(dev, RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412))
167 return -EIO;
168
Heiko Schocherf91fb722019-07-16 05:31:34 +0200169 DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
170 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
171 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100172
173 if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
174 printf("WARNING: year should be between 1970 and 2069!\n");
175
Mathew McBride771fc0c2021-09-17 06:46:03 +0000176 write_op[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec);
177 write_op[RTC_MIN_REG_ADDR] = bin2bcd(tmp->tm_min);
178 write_op[RTC_HR_REG_ADDR] = bin2bcd(tmp->tm_hour);
179 write_op[RTC_DAY_REG_ADDR] = bin2bcd(tmp->tm_wday);
180 write_op[RTC_DATE_REG_ADDR] = bin2bcd(tmp->tm_mday);
181 write_op[RTC_MON_REG_ADDR] = bin2bcd(tmp->tm_mon);
182 write_op[RTC_YR_REG_ADDR] = bin2bcd(tmp->tm_year % 100);
183 write_op[RTC_OFFSET_REG_ADDR] = 0;
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100184
Mathew McBride771fc0c2021-09-17 06:46:03 +0000185 return dm_i2c_write(dev, 0, &write_op[0], 8);
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100186}
187
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100188/*
Chris Packham402c8fd2018-03-21 15:40:37 +1300189 * Reset the RTC
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100190 */
Mathew McBride152ef912021-09-17 06:46:01 +0000191static int rx8025_rtc_reset(struct udevice *dev)
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100192{
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100193 uchar buf[16];
194 uchar ctl2;
195
Heiko Schocher0c4e81e2019-07-16 05:31:35 +0200196 if (dm_i2c_read(dev, 0, buf, sizeof(buf))) {
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100197 printf("Error reading from RTC\n");
Heiko Schocher0c4e81e2019-07-16 05:31:35 +0200198 return -EIO;
199 }
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100200
201 ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
202 ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);
Mathew McBride9ca4ae22021-09-17 06:46:02 +0000203
204 if (dev->driver_data == model_rx_8035)
205 ctl2 &= ~(RTC_CTL2_BIT_XST);
206 else
207 ctl2 |= RTC_CTL2_BIT_XST;
Heiko Schocher0c4e81e2019-07-16 05:31:35 +0200208
209 return rtc_write(dev, RTC_CTL2_REG_ADDR, ctl2);
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100210}
211
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100212/*
213 * Helper functions
214 */
Mathew McBride152ef912021-09-17 06:46:01 +0000215static int rtc_write(struct udevice *dev, uchar reg, uchar val)
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100216{
Mathew McBride701c04f2021-09-17 06:46:04 +0000217 /* The RX8025/RX8035 uses the top 4 bits of the
218 * 'offset' byte as the start register address,
219 * and the bottom 4 bits as a 'transfer' mode setting
220 * (only applicable for reads)
221 */
222 u8 offset = (reg << 4);
Heiko Schocher0c4e81e2019-07-16 05:31:35 +0200223
Mathew McBride701c04f2021-09-17 06:46:04 +0000224 if (dm_i2c_reg_write(dev, offset, val)) {
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100225 printf("Error writing to RTC\n");
Heiko Schocher0c4e81e2019-07-16 05:31:35 +0200226 return -EIO;
227 }
228
229 return 0;
Matthias Fuchs95c6bc72007-12-27 16:55:17 +0100230}
Heiko Schocher0c4e81e2019-07-16 05:31:35 +0200231
Heiko Schocher0c4e81e2019-07-16 05:31:35 +0200232static int rx8025_probe(struct udevice *dev)
233{
234 uchar buf[16];
235 int ret = 0;
236
237 if (i2c_get_chip_offset_len(dev) != 1)
238 ret = i2c_set_chip_offset_len(dev, 1);
239
240 if (ret)
241 return ret;
242
243 return dm_i2c_read(dev, 0, buf, sizeof(buf));
244}
245
246static const struct rtc_ops rx8025_rtc_ops = {
247 .get = rx8025_rtc_get,
248 .set = rx8025_rtc_set,
249 .reset = rx8025_rtc_reset,
250};
251
252static const struct udevice_id rx8025_rtc_ids[] = {
Mathew McBride9ca4ae22021-09-17 06:46:02 +0000253 { .compatible = "epson,rx8025", .data = model_rx_8025 },
254 { .compatible = "epson,rx8035", .data = model_rx_8035 },
Heiko Schocher0c4e81e2019-07-16 05:31:35 +0200255 { }
256};
257
Mathew McBride9ca4ae22021-09-17 06:46:02 +0000258U_BOOT_DRIVER(rx8025_rtc) = {
Heiko Schocher0c4e81e2019-07-16 05:31:35 +0200259 .name = "rx8025_rtc",
260 .id = UCLASS_RTC,
261 .probe = rx8025_probe,
262 .of_match = rx8025_rtc_ids,
263 .ops = &rx8025_rtc_ops,
264};