blob: b3402d718950f604152ffa61f09479d24edd2afa [file] [log] [blame]
Michal Simek1d6c54e2018-04-12 17:39:46 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 Xilinx, Inc. (Michal Simek)
4 */
5
6#include <common.h>
Simon Glass9a3b4ce2019-12-28 10:45:01 -07007#include <cpu_func.h>
Simon Glass691d7192020-05-10 11:40:02 -06008#include <init.h>
Michal Simek1d6c54e2018-04-12 17:39:46 +02009#include <asm/armv7_mpu.h>
10
11DECLARE_GLOBAL_DATA_PTR;
12
13struct mpu_region_config region_config[] = {
14 { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
15 O_I_WB_RD_WR_ALLOC, REGION_1GB },
16 { 0x20000000, REGION_1, XN_EN, PRIV_RO_USR_RO,
17 O_I_WB_RD_WR_ALLOC, REGION_512MB },
18 { 0x40000000, REGION_2, XN_EN, PRIV_RO_USR_RO,
19 O_I_WB_RD_WR_ALLOC, REGION_1GB },
20};
21
22int arch_cpu_init(void)
23{
24 gd->cpu_clk = CONFIG_CPU_FREQ_HZ;
25
26 setup_mpu_regions(region_config, sizeof(region_config) /
27 sizeof(struct mpu_region_config));
28
29 return 0;
30}
31
32/*
33 * Perform the low-level reset.
34 */
35void reset_cpu(ulong addr)
36{
37 while (1)
38 ;
39}