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Rajeshwari Birje76dd9b62013-12-26 09:44:26 +05301
Chander Kashyap0aee53b2012-02-05 23:01:47 +00002/*
Hatim RV540b5af2012-12-11 00:52:48 +00003 * Copyright (C) 2012 Samsung Electronics
Chander Kashyap0aee53b2012-02-05 23:01:47 +00004 *
Hatim RV540b5af2012-12-11 00:52:48 +00005 * Configuration settings for the SAMSUNG EXYNOS5250 board.
Chander Kashyap0aee53b2012-02-05 23:01:47 +00006 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Chander Kashyap0aee53b2012-02-05 23:01:47 +00008 */
9
Rajeshwari Birje76dd9b62013-12-26 09:44:26 +053010#ifndef __CONFIG_5250_H
11#define __CONFIG_5250_H
Chander Kashyap0aee53b2012-02-05 23:01:47 +000012
Simon Glass4c7bb1d2014-10-07 22:01:44 -060013#include <configs/exynos5-common.h>
Chander Kashyapad403e72013-07-25 18:28:52 +053014#define CONFIG_EXYNOS5250
Chander Kashyap0aee53b2012-02-05 23:01:47 +000015
Chander Kashyap0aee53b2012-02-05 23:01:47 +000016#define CONFIG_SYS_SDRAM_BASE 0x40000000
17#define CONFIG_SYS_TEXT_BASE 0x43E00000
18
Chander Kashyap0aee53b2012-02-05 23:01:47 +000019/* MACH_TYPE_SMDK5250 macro will be removed once added to mach-types */
20#define MACH_TYPE_SMDK5250 3774
21#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5250
22
Akshay Saraswatd2fe10f2014-06-18 17:54:00 +053023#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
24
Rajeshwari Shinde78fbcc92012-07-03 20:02:53 +000025#define CONFIG_SPL_TEXT_BASE 0x02023400
Rajeshwari Shinde78fbcc92012-07-03 20:02:53 +000026
Chander Kashyap0aee53b2012-02-05 23:01:47 +000027#define CONFIG_IRAM_STACK 0x02050000
28
Rajeshwari Shinde643be9c2013-07-04 12:29:17 +053029#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK
Chander Kashyap0aee53b2012-02-05 23:01:47 +000030
Rajeshwari Birje76dd9b62013-12-26 09:44:26 +053031/* I2C */
32#define CONFIG_MAX_I2C_NUM 8
Simon Glass23b479b2012-12-05 14:46:45 +000033
Ajay Kumar9b572852013-01-08 20:42:26 +000034/* Display */
35#define CONFIG_LCD
Ajay Kumar99e51622013-01-10 21:06:10 +000036#ifdef CONFIG_LCD
Ajay Kumar9b572852013-01-08 20:42:26 +000037#define CONFIG_EXYNOS_FB
38#define CONFIG_EXYNOS_DP
Ajay Kumar9b572852013-01-08 20:42:26 +000039#define LCD_BPP LCD_COLOR16
Ajay Kumar99e51622013-01-10 21:06:10 +000040#endif
Michael Pratt0cf7e182014-06-18 17:54:02 +053041
42/* DRAM Memory Banks */
43#define CONFIG_NR_DRAM_BANKS 8
44#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
45
Rajeshwari Birje76dd9b62013-12-26 09:44:26 +053046#endif /* __CONFIG_5250_H */