Wolfgang Denk | 6cb142f | 2006-03-12 02:12:27 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * U-boot - ezkit533.c |
| 3 | * |
| 4 | * Copyright (c) 2005 blackfin.uclinux.org |
| 5 | * |
| 6 | * (C) Copyright 2000-2004 |
| 7 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | */ |
| 27 | |
| 28 | #include <common.h> |
| 29 | #if defined(CONFIG_MISC_INIT_R) |
| 30 | #include "psd4256.h" |
| 31 | #endif |
| 32 | |
| 33 | int checkboard(void) |
| 34 | { |
| 35 | printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28); |
| 36 | printf("Board: ADI BF533 EZ-Kit Lite board\n"); |
| 37 | printf(" Support: http://blackfin.uclinux.org/\n"); |
| 38 | printf(" Richard Klingler <richard@uclinux.net>\n"); |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | long int initdram(int board_type) |
| 43 | { |
| 44 | DECLARE_GLOBAL_DATA_PTR; |
| 45 | #ifdef DEBUG |
| 46 | int brate; |
| 47 | char *tmp = getenv("baudrate"); |
| 48 | brate = simple_strtoul(tmp, NULL, 16); |
| 49 | printf("Serial Port initialized with Baud rate = %x\n",brate); |
| 50 | printf("SDRAM attributes:\n"); |
| 51 | printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles" |
| 52 | "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n", |
| 53 | 3, 3, 6, 2, 3); |
| 54 | printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE); |
| 55 | printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE >> 20); |
| 56 | #endif |
| 57 | gd->bd->bi_memstart = CFG_SDRAM_BASE; |
| 58 | gd->bd->bi_memsize = CFG_MAX_RAM_SIZE; |
| 59 | return CFG_MAX_RAM_SIZE; |
| 60 | } |
| 61 | |
| 62 | #if defined(CONFIG_MISC_INIT_R) |
| 63 | /* miscellaneous platform dependent initialisations */ |
| 64 | int misc_init_r(void) |
| 65 | { |
| 66 | /* Set direction bits for Video en/decoder reset as output */ |
| 67 | *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DIR) = PSDA_VDEC_RST | PSDA_VENC_RST; |
| 68 | /* Deactivate Video en/decoder reset lines */ |
| 69 | *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DOUT) = PSDA_VDEC_RST | PSDA_VENC_RST; |
| 70 | } |
| 71 | #endif |