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Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +02001/*
2 * (C) Copyright 2007-2008
Stelian Popc9e798d2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +00006 * (C) Copyright 2009-2011
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +02007 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
8 * esd electronic system design gmbh <www.esd.eu>
9 *
10 * Configuation settings for the esd MEESC board.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#ifndef __CONFIG_H
32#define __CONFIG_H
33
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +000034/*
35 * SoC must be defined first, before hardware.h is included.
36 * In this case SoC is defined in boards.cfg.
37 */
38#include <asm/hardware.h>
39
40/*
41 * Warning: changing CONFIG_SYS_TEXT_BASE requires
42 * adapting the initial boot program.
43 * Since the linker has to swallow that define, we must use a pure
44 * hex number here!
45 */
46#define CONFIG_SYS_TEXT_BASE 0x20002000
47
Daniel Gorsulowski18b6ddfd2011-10-30 22:52:28 +000048/*
49 * since a number of boards are not being listed in linux
50 * arch/arm/tools/mach-types any more, the mach-types have to be
51 * defined here
52 */
53#define MACH_TYPE_MEESC 2165
54#define MACH_TYPE_ETHERCAN2 2407
55
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +000056/* ARM asynchronous clock */
57#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
Daniel Gorsulowski9f07ded2010-08-09 11:17:13 +020058#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
Daniel Gorsulowskid4562e02010-08-09 11:17:14 +020059#define CONFIG_SYS_HZ 1000 /* decrementer freq */
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +000060
61/* Misc CPU related */
62#define CONFIG_SKIP_LOWLEVEL_INIT
63#define CONFIG_ARCH_CPU_INIT
64#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
65#define CONFIG_SETUP_MEMORY_TAGS
66#define CONFIG_INITRD_TAG
67#define CONFIG_SERIAL_TAG
68#define CONFIG_REVISION_TAG
69#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
70#define CONFIG_MISC_INIT_R /* Call misc_init_r */
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +020071#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
72
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +000073#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
74#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
75#define CONFIG_PREBOOT /* enable preboot variable */
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +020076
77/*
78 * Hardware drivers
79 */
80
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +000081/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
82#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +020083
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +000084/* general purpose I/O */
85#define CONFIG_AT91_GPIO
86
87/* Console output */
88#define CONFIG_ATMEL_USART
89#define CONFIG_USART_BASE ATMEL_BASE_DBGU
90#define CONFIG_USART_ID ATMEL_ID_SYS
91#define CONFIG_BAUDRATE 115200
92#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600}
93
94#define CONFIG_BOOTDELAY 3
95#define CONFIG_ZERO_BOOTDELAY_CHECK
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +020096
97/*
98 * BOOTP options
99 */
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000100#define CONFIG_BOOTP_BOOTFILESIZE
101#define CONFIG_BOOTP_BOOTPATH
102#define CONFIG_BOOTP_GATEWAY
103#define CONFIG_BOOTP_HOSTNAME
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200104
105/*
106 * Command line configuration.
107 */
108#include <config_cmd_default.h>
109#undef CONFIG_CMD_BDI
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200110#undef CONFIG_CMD_FPGA
111#undef CONFIG_CMD_LOADS
112#undef CONFIG_CMD_IMLS
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200113
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000114#define CONFIG_CMD_PING
115#define CONFIG_CMD_DHCP
116#define CONFIG_CMD_NAND
117#define CONFIG_CMD_USB
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200118
119/* LED */
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000120#define CONFIG_AT91_LED
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200121
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000122/*
123 * SDRAM: 1 bank, min 32, max 128 MB
124 * Initialized before u-boot gets started.
125 */
126#define CONFIG_NR_DRAM_BANKS 1
127#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
128#define CONFIG_SYS_SDRAM_SIZE 0x02000000
129
130#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
131#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
132#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
133
134/*
135 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
136 * leaving the correct space for initial global data structure above
137 * that address while providing maximum stack area below.
138 */
139#define CONFIG_SYS_INIT_SP_ADDR \
140 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200141
142/* DataFlash */
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000143#ifdef CONFIG_SYS_USE_DATAFLASH
144# define CONFIG_ATMEL_DATAFLASH_SPI
145# define CONFIG_HAS_DATAFLASH
146# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
147# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
148# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
149# define AT91_SPI_CLK 15000000
150# define DATAFLASH_TCSS (0x1a << 16)
151# define DATAFLASH_TCHS (0x1 << 24)
152#endif
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200153
154/* NOR flash is not populated, disable it */
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000155#define CONFIG_SYS_NO_FLASH
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200156
157/* NAND flash */
158#ifdef CONFIG_CMD_NAND
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000159# define CONFIG_NAND_ATMEL
160# define CONFIG_SYS_MAX_NAND_DEVICE 1
161# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
162# define CONFIG_SYS_NAND_DBW_8
163# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
164# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
165# define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
166# define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
167# define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200168#endif
169
170/* Ethernet */
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000171#define CONFIG_MACB
172#define CONFIG_RMII
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000173#define CONFIG_FIT
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200174#define CONFIG_NET_RETRY_COUNT 20
175#undef CONFIG_RESET_PHY_R
176
Daniel Gorsulowski64037fb2010-08-09 11:17:15 +0200177/* USB */
178#define CONFIG_USB_ATMEL
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000179#define CONFIG_USB_OHCI_NEW
180#define CONFIG_DOS_PARTITION
181#define CONFIG_SYS_USB_OHCI_CPU_INIT
Daniel Gorsulowski64037fb2010-08-09 11:17:15 +0200182#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
183#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
184#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200185
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200186/* CAN */
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000187#define CONFIG_AT91_CAN
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200188
Daniel Gorsulowskia3802792009-09-29 08:03:12 +0200189/* hw-controller addresses */
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000190#define CONFIG_ET1100_BASE 0x70000000
191
192#ifdef CONFIG_SYS_USE_DATAFLASH
Daniel Gorsulowskia3802792009-09-29 08:03:12 +0200193
194/* bootstrap + u-boot + env in dataflash on CS0 */
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000195# define CONFIG_ENV_IS_IN_DATAFLASH
196# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200197 0x8400)
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000198# define CONFIG_ENV_OFFSET 0x4200
199# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200200 CONFIG_ENV_OFFSET)
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000201# define CONFIG_ENV_SIZE 0x4200
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200202
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000203#elif CONFIG_SYS_USE_NANDFLASH
204
205/* bootstrap + u-boot + env + linux in nandflash */
206# define CONFIG_ENV_IS_IN_NAND 1
207# define CONFIG_ENV_OFFSET 0xC0000
208# define CONFIG_ENV_SIZE 0x20000
209
210#endif
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200211
212#define CONFIG_SYS_PROMPT "=> "
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000213#define CONFIG_SYS_CBSIZE 512
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200214#define CONFIG_SYS_MAXARGS 16
215#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
216 sizeof(CONFIG_SYS_PROMPT) + 16)
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000217#define CONFIG_SYS_LONGHELP
218#define CONFIG_CMDLINE_EDITING
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200219
220/*
221 * Size of malloc() pool
222 */
Daniel Gorsulowskia3802792009-09-29 08:03:12 +0200223#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
224 128*1024, 0x1000)
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200225
226#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
227
228#ifdef CONFIG_USE_IRQ
Matthias Fuchs0cb77bf2011-07-19 01:56:06 +0000229# error CONFIG_USE_IRQ not supported
Daniel Gorsulowski33b1d3f2009-06-30 21:03:37 +0200230#endif
231
232#endif