Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 703c170b40f2ad5f37dea899c4fd69fc405690c3 / . / configs / evb-rk3568_defconfig
blob: 0b4fc52e263d796594fce7f2161514e123fa7147 [file] [log] [blame]
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinia2ac2b92021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanabf8d962022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass98463902022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x00a00000
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]8CONFIG_NR_DRAM_BANKS=2
Tom Rinifcb51172023-02-17 09:58:06 -0500[diff] [blame]9CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
10CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
Tom Rini54c5c2b2022-01-24 21:08:41 +0000[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]12CONFIG_ROCKCHIP_RK3568=y
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]13CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]14CONFIG_SPL_SERIAL=y
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]15CONFIG_SPL_STACK_R_ADDR=0x600000
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]16CONFIG_TARGET_EVB_RK3568=y
Tom Rinifcb51172023-02-17 09:58:06 -0500[diff] [blame]17CONFIG_SPL_STACK=0x400000
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]18CONFIG_DEBUG_UART_BASE=0xFE660000
19CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini49c8ef02021-08-23 10:25:31 -0400[diff] [blame]20CONFIG_SYS_LOAD_ADDR=0xc00800
Tom Rinid46e86d2022-04-08 13:36:51 -0400[diff] [blame]21CONFIG_DEBUG_UART=y
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]22CONFIG_FIT=y
23CONFIG_FIT_VERBOSE=y
Jonas Karlman703c1702023-05-17 18:26:32 +0000[diff] [blame^]24CONFIG_SPL_FIT_SIGNATURE=y
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]25CONFIG_SPL_LOAD_FIT=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]26CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb"
27# CONFIG_DISPLAY_CPUINFO is not set
28CONFIG_DISPLAY_BOARDINFO_LATE=y
Jonas Karlman703c1702023-05-17 18:26:32 +0000[diff] [blame^]29CONFIG_SPL_MAX_SIZE=0x40000
Tom Rinica8a3292022-05-16 17:20:26 -0400[diff] [blame]30CONFIG_SPL_PAD_TO=0x7f8000
Tom Rini6600b352022-05-27 10:19:45 -0400[diff] [blame]31CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
32CONFIG_SPL_BSS_START_ADDR=0x4000000
Tom Rini9b5f9ae2022-05-19 15:09:22 -0400[diff] [blame]33CONFIG_SPL_BSS_MAX_SIZE=0x4000
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]34# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Tom Rinif113d7d2022-05-26 13:13:21 -0400[diff] [blame]35# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]36CONFIG_SPL_STACK_R=y
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]37CONFIG_SPL_ATF=y
Jonas Karlman703c1702023-05-17 18:26:32 +0000[diff] [blame^]38CONFIG_CMD_GPIO=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]39CONFIG_CMD_GPT=y
Jonas Karlman703c1702023-05-17 18:26:32 +0000[diff] [blame^]40CONFIG_CMD_I2C=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]41CONFIG_CMD_MMC=y
42# CONFIG_CMD_SETEXPR is not set
Jonas Karlman703c1702023-05-17 18:26:32 +0000[diff] [blame^]43CONFIG_CMD_PMIC=y
44CONFIG_CMD_REGULATOR=y
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]45# CONFIG_SPL_DOS_PARTITION is not set
46CONFIG_SPL_OF_CONTROL=y
47CONFIG_OF_LIVE=y
Jonas Karlman703c1702023-05-17 18:26:32 +0000[diff] [blame^]48CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]49CONFIG_SPL_REGMAP=y
50CONFIG_SPL_SYSCON=y
51CONFIG_SPL_CLK=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]52CONFIG_ROCKCHIP_GPIO=y
53CONFIG_SYS_I2C_ROCKCHIP=y
54CONFIG_MISC=y
Tom Rinid5bfef22021-12-11 14:55:53 -0500[diff] [blame]55CONFIG_SUPPORT_EMMC_RPMB=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]56CONFIG_MMC_DW=y
57CONFIG_MMC_DW_ROCKCHIP=y
58CONFIG_MMC_SDHCI=y
59CONFIG_MMC_SDHCI_SDMA=y
60CONFIG_MMC_SDHCI_ROCKCHIP=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]61CONFIG_ETH_DESIGNWARE=y
62CONFIG_GMAC_ROCKCHIP=y
Jonas Karlman703c1702023-05-17 18:26:32 +0000[diff] [blame^]63CONFIG_DM_PMIC=y
64CONFIG_PMIC_RK8XX=y
65CONFIG_REGULATOR_RK8XX=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]66CONFIG_PWM_ROCKCHIP=y
Nico Chengdaec31e2021-10-26 10:42:19 +0800[diff] [blame]67CONFIG_SPL_RAM=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]68CONFIG_BAUDRATE=1500000
69CONFIG_DEBUG_UART_SHIFT=2
Tom Rini9591b632022-12-04 09:39:03 -0500[diff] [blame]70CONFIG_SYS_NS16550_MEM32=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]71CONFIG_SYSRESET=y
Joseph Chen695693b2021-06-02 16:13:46 +0800[diff] [blame]72CONFIG_ERRNO_STR=y