Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> |
| 4 | * |
| 5 | * (C) Copyright 2007-2011 |
| 6 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> |
| 7 | * Tom Cubie <tangliang@allwinnertech.com> |
| 8 | * |
| 9 | * Configuration settings for the Allwinner sunxi series of boards. |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #ifndef _SUNXI_COMMON_CONFIG_H |
| 13 | #define _SUNXI_COMMON_CONFIG_H |
| 14 | |
Hans de Goede | daf6d39 | 2015-09-13 17:29:33 +0200 | [diff] [blame] | 15 | #include <asm/arch/cpu.h> |
Hans de Goede | e049fe2 | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 16 | #include <linux/stringify.h> |
| 17 | |
Siarhei Siamashka | 77ef136 | 2015-02-21 07:34:09 +0200 | [diff] [blame] | 18 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
| 19 | /* |
| 20 | * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the |
| 21 | * expense of restricting some features, so the regular machine id values can |
| 22 | * be used. |
| 23 | */ |
| 24 | # define CONFIG_MACH_TYPE_COMPAT_REV 0 |
| 25 | #else |
| 26 | /* |
| 27 | * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. |
| 28 | * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass |
| 29 | * beyond the machine id check. |
| 30 | */ |
| 31 | # define CONFIG_MACH_TYPE_COMPAT_REV 1 |
| 32 | #endif |
| 33 | |
Andre Przywara | d29adf8 | 2017-04-26 01:32:48 +0100 | [diff] [blame] | 34 | #ifdef CONFIG_ARM64 |
Jagan Teki | e628f00 | 2017-11-10 22:21:09 +0530 | [diff] [blame] | 35 | #define CONFIG_SYS_BOOTM_LEN (32 << 20) |
Andre Przywara | d29adf8 | 2017-04-26 01:32:48 +0100 | [diff] [blame] | 36 | #endif |
| 37 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 38 | /* Serial & console */ |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 39 | #define CONFIG_SYS_NS16550_SERIAL |
| 40 | /* ns16550 reg in the low bits of cpu reg */ |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 41 | #define CONFIG_SYS_NS16550_CLK 24000000 |
Thomas Chou | 4fb6055 | 2015-11-19 21:48:13 +0800 | [diff] [blame] | 42 | #ifndef CONFIG_DM_SERIAL |
Simon Glass | 1a81cf83 | 2014-10-30 20:25:50 -0600 | [diff] [blame] | 43 | # define CONFIG_SYS_NS16550_REG_SIZE -4 |
| 44 | # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE |
| 45 | # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE |
| 46 | # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE |
| 47 | # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE |
| 48 | # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE |
| 49 | #endif |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 50 | |
Paul Kocialkowski | 8a65f69 | 2015-05-16 19:52:11 +0200 | [diff] [blame] | 51 | /* CPU */ |
Andre Przywara | e4916e8 | 2017-02-16 01:20:19 +0000 | [diff] [blame] | 52 | #define COUNTER_FREQUENCY 24000000 |
Paul Kocialkowski | 8a65f69 | 2015-05-16 19:52:11 +0200 | [diff] [blame] | 53 | |
Hans de Goede | e049fe2 | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 54 | /* |
| 55 | * The DRAM Base differs between some models. We cannot use macros for the |
| 56 | * CONFIG_FOO defines which contain the DRAM base address since they end |
| 57 | * up unexpanded in include/autoconf.mk . |
| 58 | * |
| 59 | * So we have to have this #ifdef #else #endif block for these. |
| 60 | */ |
| 61 | #ifdef CONFIG_MACH_SUN9I |
| 62 | #define SDRAM_OFFSET(x) 0x2##x |
| 63 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 64 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ |
Jernej Skrabec | 17d6ece | 2021-03-23 21:27:31 +0100 | [diff] [blame] | 65 | /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here |
Hans de Goede | ff42d10 | 2015-09-13 13:02:48 +0200 | [diff] [blame] | 66 | * since it needs to fit in with the other values. By also #defining it |
| 67 | * we get warnings if the Kconfig value mismatches. */ |
| 68 | #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 |
Hans de Goede | e049fe2 | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 69 | #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 |
| 70 | #else |
| 71 | #define SDRAM_OFFSET(x) 0x4##x |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 72 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
Hans de Goede | e049fe2 | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 73 | #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ |
Icenowy Zheng | c199489 | 2017-04-08 15:30:12 +0800 | [diff] [blame] | 74 | /* V3s do not have enough memory to place code at 0x4a000000 */ |
Jernej Skrabec | 17d6ece | 2021-03-23 21:27:31 +0100 | [diff] [blame] | 75 | /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here |
Hans de Goede | ff42d10 | 2015-09-13 13:02:48 +0200 | [diff] [blame] | 76 | * since it needs to fit in with the other values. By also #defining it |
| 77 | * we get warnings if the Kconfig value mismatches. */ |
| 78 | #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 |
Hans de Goede | e049fe2 | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 79 | #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 |
| 80 | #endif |
| 81 | |
| 82 | #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ |
Hans de Goede | e049fe2 | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 83 | |
Hans de Goede | 77fe988 | 2015-05-20 15:27:16 +0200 | [diff] [blame] | 84 | /* |
| 85 | * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is |
| 86 | * slightly bigger. Note that it is possible to map the first 32 KiB of the |
| 87 | * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the |
| 88 | * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and |
| 89 | * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. |
Icenowy Zheng | cadc7c2 | 2018-07-21 16:20:20 +0800 | [diff] [blame] | 90 | * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register |
| 91 | * is known yet. |
| 92 | * H6 has SRAM A1 at 0x00020000. |
Hans de Goede | 77fe988 | 2015-05-20 15:27:16 +0200 | [diff] [blame] | 93 | */ |
Icenowy Zheng | cadc7c2 | 2018-07-21 16:20:20 +0800 | [diff] [blame] | 94 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS |
| 95 | /* FIXME: this may be larger on some SoCs */ |
| 96 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 97 | |
| 98 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 99 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 100 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 101 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 102 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 103 | #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE |
| 104 | #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ |
| 105 | |
Ian Campbell | a6e50a8 | 2014-07-18 20:38:41 +0100 | [diff] [blame] | 106 | #ifdef CONFIG_AHCI |
Bernhard Nortmann | 0751b13 | 2015-06-10 10:51:40 +0200 | [diff] [blame] | 107 | #define CONFIG_SYS_64BIT_LBA |
Ian Campbell | a6e50a8 | 2014-07-18 20:38:41 +0100 | [diff] [blame] | 108 | #endif |
| 109 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 110 | #define CONFIG_SETUP_MEMORY_TAGS |
| 111 | #define CONFIG_CMDLINE_TAG |
| 112 | #define CONFIG_INITRD_TAG |
Paul Kocialkowski | 9f85221 | 2015-03-28 18:35:36 +0100 | [diff] [blame] | 113 | #define CONFIG_SERIAL_TAG |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 114 | |
Hans de Goede | e526861 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 115 | #ifdef CONFIG_NAND_SUNXI |
Boris Brezillon | a0dfa88 | 2016-06-15 21:09:27 +0200 | [diff] [blame] | 116 | #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 |
Boris Brezillon | 4ccae81 | 2016-06-15 21:09:23 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 118 | #define CONFIG_SYS_MAX_NAND_DEVICE 8 |
Piotr Zierhoffer | 960caeb | 2015-07-23 14:33:03 +0200 | [diff] [blame] | 119 | #endif |
| 120 | |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 121 | /* mmc config */ |
Maxime Ripard | 44c7987 | 2015-10-15 22:04:07 +0200 | [diff] [blame] | 122 | #ifdef CONFIG_MMC |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 123 | #define CONFIG_MMC_SUNXI_SLOT 0 |
Maxime Ripard | fb1c43c | 2017-02-27 18:22:03 +0100 | [diff] [blame] | 124 | #endif |
| 125 | |
| 126 | #if defined(CONFIG_ENV_IS_IN_MMC) |
Maxime Ripard | 9921966 | 2018-01-16 09:44:24 +0100 | [diff] [blame] | 127 | |
| 128 | #ifdef CONFIG_ARM64 |
| 129 | /* |
| 130 | * This is actually (CONFIG_ENV_OFFSET - |
| 131 | * (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)), but the value will be used |
| 132 | * directly in a makefile, without the preprocessor expansion. |
| 133 | */ |
| 134 | #define CONFIG_BOARD_SIZE_LIMIT 0x7e000 |
| 135 | #endif |
| 136 | |
Emmanuel Vadot | ae042be | 2016-11-05 20:51:11 +0100 | [diff] [blame] | 137 | #define CONFIG_SYS_MMC_MAX_DEVICE 4 |
Chen-Yu Tsai | ff2b47f | 2014-10-22 16:47:42 +0800 | [diff] [blame] | 138 | #endif |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 139 | |
Icenowy Zheng | c199489 | 2017-04-08 15:30:12 +0800 | [diff] [blame] | 140 | #ifndef CONFIG_MACH_SUN8I_V3S |
Hans de Goede | 5c965ed | 2015-09-13 17:16:54 +0200 | [diff] [blame] | 141 | /* 64MB of malloc() pool */ |
| 142 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) |
Icenowy Zheng | c199489 | 2017-04-08 15:30:12 +0800 | [diff] [blame] | 143 | #else |
| 144 | /* 2MB of malloc() pool */ |
| 145 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20)) |
| 146 | #endif |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 147 | |
| 148 | /* |
| 149 | * Miscellaneous configurable options |
| 150 | */ |
Ian Campbell | 06beadb | 2014-10-07 14:20:30 +0100 | [diff] [blame] | 151 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 152 | #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 153 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 154 | /* standalone support */ |
Hans de Goede | e049fe2 | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 155 | #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 156 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 157 | /* FLASH and environment organization */ |
| 158 | |
Boris Brezillon | fa5e102 | 2015-07-27 16:21:26 +0200 | [diff] [blame] | 159 | #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 160 | |
Simon Glass | 942cb0b | 2015-02-07 10:47:30 -0700 | [diff] [blame] | 161 | #define CONFIG_SPL_BOARD_LOAD_IMAGE |
| 162 | |
Icenowy Zheng | cadc7c2 | 2018-07-21 16:20:20 +0800 | [diff] [blame] | 163 | /* |
| 164 | * We cannot use expressions here, because expressions won't be evaluated in |
| 165 | * autoconf.mk. |
| 166 | */ |
| 167 | #if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000 |
Siarhei Siamashka | 7f0ef5a | 2017-04-26 01:32:49 +0100 | [diff] [blame] | 168 | #define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */ |
Andre Przywara | 54522c9 | 2017-04-26 01:32:42 +0100 | [diff] [blame] | 169 | #ifdef CONFIG_ARM64 |
| 170 | /* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */ |
| 171 | #define LOW_LEVEL_SRAM_STACK 0x00054000 |
| 172 | #else |
Andre Przywara | bc613d8 | 2017-02-16 01:20:23 +0000 | [diff] [blame] | 173 | #define LOW_LEVEL_SRAM_STACK 0x00018000 |
Andre Przywara | 54522c9 | 2017-04-26 01:32:42 +0100 | [diff] [blame] | 174 | #endif /* !CONFIG_ARM64 */ |
Icenowy Zheng | e5715e7 | 2018-07-21 16:20:24 +0800 | [diff] [blame] | 175 | #elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000 |
Jernej Skrabec | 8ec293e | 2021-01-11 21:11:46 +0100 | [diff] [blame] | 176 | #ifdef CONFIG_MACH_SUN50I_H616 |
| 177 | #define CONFIG_SPL_MAX_SIZE 0xbfa0 /* 48 KiB */ |
| 178 | #define LOW_LEVEL_SRAM_STACK 0x58000 |
| 179 | #else |
Icenowy Zheng | e5715e7 | 2018-07-21 16:20:24 +0800 | [diff] [blame] | 180 | #define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */ |
| 181 | /* end of SRAM A2 on H6 for now */ |
| 182 | #define LOW_LEVEL_SRAM_STACK 0x00118000 |
Jernej Skrabec | 8ec293e | 2021-01-11 21:11:46 +0100 | [diff] [blame] | 183 | #endif |
Siarhei Siamashka | d96ebc4 | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 184 | #else |
Siarhei Siamashka | 7f0ef5a | 2017-04-26 01:32:49 +0100 | [diff] [blame] | 185 | #define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */ |
Andre Przywara | bc613d8 | 2017-02-16 01:20:23 +0000 | [diff] [blame] | 186 | #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ |
Siarhei Siamashka | d96ebc4 | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 187 | #endif |
Ian Campbell | 50827a5 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 188 | |
Andre Przywara | bc613d8 | 2017-02-16 01:20:23 +0000 | [diff] [blame] | 189 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK |
| 190 | |
Jernej Skrabec | 8ec293e | 2021-01-11 21:11:46 +0100 | [diff] [blame] | 191 | #ifndef CONFIG_MACH_SUN50I_H616 |
Ian Campbell | 50827a5 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 192 | #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ |
Jernej Skrabec | 8ec293e | 2021-01-11 21:11:46 +0100 | [diff] [blame] | 193 | #endif |
Ian Campbell | 50827a5 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 194 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 195 | |
Hans de Goede | 6620377 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 196 | /* I2C */ |
Paul Kocialkowski | 6c739c5 | 2015-04-10 23:09:52 +0200 | [diff] [blame] | 197 | #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ |
| 198 | defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ |
Jelle van der Waa | 9d08268 | 2016-01-14 14:06:26 +0100 | [diff] [blame] | 199 | defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE |
Hans de Goede | 6620377 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 200 | #define CONFIG_SYS_I2C_MVTWSI |
Igor Opaniuk | 2147a16 | 2021-02-09 13:52:45 +0200 | [diff] [blame] | 201 | #if !CONFIG_IS_ENABLED(DM_I2C) |
Jernej Skrabec | a8f01cc | 2017-04-27 00:03:36 +0200 | [diff] [blame] | 202 | #define CONFIG_SYS_I2C |
Hans de Goede | 6620377 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 203 | #define CONFIG_SYS_I2C_SPEED 400000 |
| 204 | #define CONFIG_SYS_I2C_SLAVE 0x7f |
Hans de Goede | 8b2db32 | 2015-04-23 17:47:22 +0200 | [diff] [blame] | 205 | #endif |
Jernej Skrabec | a8f01cc | 2017-04-27 00:03:36 +0200 | [diff] [blame] | 206 | #endif |
Hans de Goede | 5541008 | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 207 | |
| 208 | #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) |
| 209 | #define CONFIG_SYS_I2C_SOFT |
| 210 | #define CONFIG_SYS_I2C_SOFT_SPEED 50000 |
| 211 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 |
Hans de Goede | 5541008 | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 212 | /* We use pin names in Kconfig and sunxi_name_to_gpio() */ |
| 213 | #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda |
| 214 | #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl |
| 215 | #ifndef __ASSEMBLY__ |
| 216 | extern int soft_i2c_gpio_sda; |
| 217 | extern int soft_i2c_gpio_scl; |
| 218 | #endif |
Hans de Goede | 1fc4201 | 2015-03-07 12:00:02 +0100 | [diff] [blame] | 219 | #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ |
| 220 | #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ |
| 221 | #else |
| 222 | #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ |
| 223 | #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ |
Hans de Goede | 5541008 | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 224 | #endif |
| 225 | |
Hans de Goede | c26fb9d | 2014-06-09 11:37:00 +0200 | [diff] [blame] | 226 | /* Ethernet support */ |
Hans de Goede | c26fb9d | 2014-06-09 11:37:00 +0200 | [diff] [blame] | 227 | |
Paul Kocialkowski | 2582ca0 | 2015-08-04 17:04:09 +0200 | [diff] [blame] | 228 | #ifdef CONFIG_USB_EHCI_HCD |
Hans de Goede | 6a72e80 | 2015-05-10 14:10:27 +0200 | [diff] [blame] | 229 | #define CONFIG_USB_OHCI_NEW |
Hans de Goede | 6a72e80 | 2015-05-10 14:10:27 +0200 | [diff] [blame] | 230 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
Hans de Goede | 1a800f7 | 2015-01-11 17:17:00 +0100 | [diff] [blame] | 231 | #endif |
| 232 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 233 | #ifndef CONFIG_SPL_BUILD |
Hans de Goede | 2ec3a61 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 234 | |
Andre Przywara | 671f9ad | 2016-05-04 22:15:32 +0100 | [diff] [blame] | 235 | #ifdef CONFIG_ARM64 |
| 236 | /* |
| 237 | * Boards seem to come with at least 512MB of DRAM. |
| 238 | * The kernel should go at 512K, which is the default text offset (that will |
| 239 | * be adjusted at runtime if needed). |
| 240 | * There is no compression for arm64 kernels (yet), so leave some space |
| 241 | * for really big kernels, say 256MB for now. |
| 242 | * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd. |
Andre Przywara | 671f9ad | 2016-05-04 22:15:32 +0100 | [diff] [blame] | 243 | */ |
Jernej Skrabec | 17d6ece | 2021-03-23 21:27:31 +0100 | [diff] [blame] | 244 | #define BOOTM_SIZE __stringify(0xa000000) |
| 245 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) |
Arnaud Ferraris | 747c242 | 2021-02-20 13:14:15 +0100 | [diff] [blame^] | 246 | #define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000)) |
| 247 | #define KERNEL_COMP_SIZE __stringify(0xb000000) |
Jernej Skrabec | 17d6ece | 2021-03-23 21:27:31 +0100 | [diff] [blame] | 248 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) |
| 249 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) |
| 250 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) |
| 251 | #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) |
| 252 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000)) |
Andre Przywara | 671f9ad | 2016-05-04 22:15:32 +0100 | [diff] [blame] | 253 | |
| 254 | #else |
Hans de Goede | 8c95c55 | 2014-12-24 16:08:30 +0100 | [diff] [blame] | 255 | /* |
Hans de Goede | 5c965ed | 2015-09-13 17:16:54 +0200 | [diff] [blame] | 256 | * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. |
Hans de Goede | 8c95c55 | 2014-12-24 16:08:30 +0100 | [diff] [blame] | 257 | * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, |
Jernej Skrabec | 17d6ece | 2021-03-23 21:27:31 +0100 | [diff] [blame] | 258 | * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end. |
Hans de Goede | 8c95c55 | 2014-12-24 16:08:30 +0100 | [diff] [blame] | 259 | */ |
Icenowy Zheng | c199489 | 2017-04-08 15:30:12 +0800 | [diff] [blame] | 260 | #ifndef CONFIG_MACH_SUN8I_V3S |
Jernej Skrabec | 17d6ece | 2021-03-23 21:27:31 +0100 | [diff] [blame] | 261 | #define BOOTM_SIZE __stringify(0xa000000) |
| 262 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) |
| 263 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) |
| 264 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) |
| 265 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) |
| 266 | #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000)) |
| 267 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000)) |
Icenowy Zheng | c199489 | 2017-04-08 15:30:12 +0800 | [diff] [blame] | 268 | #else |
| 269 | /* |
| 270 | * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc. |
| 271 | * 16M uncompressed kernel, 8M compressed kernel, 1M fdt, |
Jernej Skrabec | 17d6ece | 2021-03-23 21:27:31 +0100 | [diff] [blame] | 272 | * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end. |
Icenowy Zheng | c199489 | 2017-04-08 15:30:12 +0800 | [diff] [blame] | 273 | */ |
Jernej Skrabec | 17d6ece | 2021-03-23 21:27:31 +0100 | [diff] [blame] | 274 | #define BOOTM_SIZE __stringify(0x2e00000) |
| 275 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) |
| 276 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000)) |
| 277 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000)) |
| 278 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000)) |
| 279 | #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000)) |
| 280 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000)) |
Icenowy Zheng | c199489 | 2017-04-08 15:30:12 +0800 | [diff] [blame] | 281 | #endif |
Andre Przywara | 671f9ad | 2016-05-04 22:15:32 +0100 | [diff] [blame] | 282 | #endif |
Siarhei Siamashka | 2a909c5 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 283 | |
Hans de Goede | 846e325 | 2014-08-01 09:37:58 +0200 | [diff] [blame] | 284 | #define MEM_LAYOUT_ENV_SETTINGS \ |
Icenowy Zheng | c199489 | 2017-04-08 15:30:12 +0800 | [diff] [blame] | 285 | "bootm_size=" BOOTM_SIZE "\0" \ |
Siarhei Siamashka | 2a909c5 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 286 | "kernel_addr_r=" KERNEL_ADDR_R "\0" \ |
| 287 | "fdt_addr_r=" FDT_ADDR_R "\0" \ |
| 288 | "scriptaddr=" SCRIPT_ADDR_R "\0" \ |
| 289 | "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ |
Jernej Skrabec | 17d6ece | 2021-03-23 21:27:31 +0100 | [diff] [blame] | 290 | "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \ |
Siarhei Siamashka | 2a909c5 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 291 | "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" |
| 292 | |
Arnaud Ferraris | 747c242 | 2021-02-20 13:14:15 +0100 | [diff] [blame^] | 293 | #ifdef CONFIG_ARM64 |
| 294 | |
| 295 | #define MEM_LAYOUT_ENV_EXTRA_SETTINGS \ |
| 296 | "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \ |
| 297 | "kernel_comp_size=" KERNEL_COMP_SIZE "\0" |
| 298 | |
| 299 | #else |
| 300 | |
| 301 | #define MEM_LAYOUT_ENV_EXTRA_SETTINGS "" |
| 302 | |
| 303 | #endif |
| 304 | |
Siarhei Siamashka | 2a909c5 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 305 | #define DFU_ALT_INFO_RAM \ |
| 306 | "dfu_alt_info_ram=" \ |
| 307 | "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ |
| 308 | "fdt ram " FDT_ADDR_R " 0x100000;" \ |
| 309 | "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" |
Hans de Goede | 846e325 | 2014-08-01 09:37:58 +0200 | [diff] [blame] | 310 | |
Chen-Yu Tsai | 41f8e9f | 2014-10-07 15:11:49 +0800 | [diff] [blame] | 311 | #ifdef CONFIG_MMC |
Karsten Merker | 5a37a40 | 2015-12-16 20:59:40 +0100 | [diff] [blame] | 312 | #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 |
Maxime Ripard | de86fc3 | 2017-08-23 10:12:22 +0200 | [diff] [blame] | 313 | #define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \ |
| 314 | BOOTENV_DEV_MMC(MMC, mmc, 0) \ |
| 315 | BOOTENV_DEV_MMC(MMC, mmc, 1) \ |
| 316 | "bootcmd_mmc_auto=" \ |
| 317 | "if test ${mmc_bootdev} -eq 1; then " \ |
| 318 | "run bootcmd_mmc1; " \ |
| 319 | "run bootcmd_mmc0; " \ |
| 320 | "elif test ${mmc_bootdev} -eq 0; then " \ |
| 321 | "run bootcmd_mmc0; " \ |
| 322 | "run bootcmd_mmc1; " \ |
| 323 | "fi\0" |
| 324 | |
| 325 | #define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \ |
| 326 | "mmc_auto " |
| 327 | |
| 328 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na) |
Karsten Merker | 5a37a40 | 2015-12-16 20:59:40 +0100 | [diff] [blame] | 329 | #else |
Maxime Ripard | de86fc3 | 2017-08-23 10:12:22 +0200 | [diff] [blame] | 330 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) |
Karsten Merker | 5a37a40 | 2015-12-16 20:59:40 +0100 | [diff] [blame] | 331 | #endif |
Chen-Yu Tsai | 41f8e9f | 2014-10-07 15:11:49 +0800 | [diff] [blame] | 332 | #else |
| 333 | #define BOOT_TARGET_DEVICES_MMC(func) |
| 334 | #endif |
| 335 | |
Hans de Goede | 2ec3a61 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 336 | #ifdef CONFIG_AHCI |
| 337 | #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) |
| 338 | #else |
| 339 | #define BOOT_TARGET_DEVICES_SCSI(func) |
| 340 | #endif |
| 341 | |
Paul Kocialkowski | 2582ca0 | 2015-08-04 17:04:09 +0200 | [diff] [blame] | 342 | #ifdef CONFIG_USB_STORAGE |
Chen-Yu Tsai | 859b3f1 | 2014-10-03 20:16:22 +0800 | [diff] [blame] | 343 | #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) |
| 344 | #else |
| 345 | #define BOOT_TARGET_DEVICES_USB(func) |
| 346 | #endif |
| 347 | |
Ondrej Jirman | 0eabec1 | 2019-02-13 18:50:36 +0100 | [diff] [blame] | 348 | #ifdef CONFIG_CMD_PXE |
| 349 | #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) |
| 350 | #else |
| 351 | #define BOOT_TARGET_DEVICES_PXE(func) |
| 352 | #endif |
| 353 | |
| 354 | #ifdef CONFIG_CMD_DHCP |
| 355 | #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na) |
| 356 | #else |
| 357 | #define BOOT_TARGET_DEVICES_DHCP(func) |
| 358 | #endif |
| 359 | |
Bernhard Nortmann | f3b589c | 2015-09-17 18:52:53 +0200 | [diff] [blame] | 360 | /* FEL boot support, auto-execute boot.scr if a script address was provided */ |
| 361 | #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ |
| 362 | "bootcmd_fel=" \ |
| 363 | "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ |
| 364 | "echo '(FEL boot)'; " \ |
| 365 | "source ${fel_scriptaddr}; " \ |
| 366 | "fi\0" |
| 367 | #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ |
| 368 | "fel " |
| 369 | |
Hans de Goede | 2ec3a61 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 370 | #define BOOT_TARGET_DEVICES(func) \ |
Bernhard Nortmann | f3b589c | 2015-09-17 18:52:53 +0200 | [diff] [blame] | 371 | func(FEL, fel, na) \ |
Chen-Yu Tsai | 41f8e9f | 2014-10-07 15:11:49 +0800 | [diff] [blame] | 372 | BOOT_TARGET_DEVICES_MMC(func) \ |
Hans de Goede | 2ec3a61 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 373 | BOOT_TARGET_DEVICES_SCSI(func) \ |
Chen-Yu Tsai | 859b3f1 | 2014-10-03 20:16:22 +0800 | [diff] [blame] | 374 | BOOT_TARGET_DEVICES_USB(func) \ |
Ondrej Jirman | 0eabec1 | 2019-02-13 18:50:36 +0100 | [diff] [blame] | 375 | BOOT_TARGET_DEVICES_PXE(func) \ |
| 376 | BOOT_TARGET_DEVICES_DHCP(func) |
Hans de Goede | 2ec3a61 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 377 | |
Hans de Goede | 3b82402 | 2015-10-09 17:11:15 +0100 | [diff] [blame] | 378 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
| 379 | #define BOOTCMD_SUNXI_COMPAT \ |
| 380 | "bootcmd_sunxi_compat=" \ |
| 381 | "setenv root /dev/mmcblk0p3 rootwait; " \ |
| 382 | "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ |
| 383 | "echo Loaded environment from uEnv.txt; " \ |
| 384 | "env import -t 0x44000000 ${filesize}; " \ |
| 385 | "fi; " \ |
| 386 | "setenv bootargs console=${console} root=${root} ${extraargs}; " \ |
| 387 | "ext2load mmc 0 0x43000000 script.bin && " \ |
| 388 | "ext2load mmc 0 0x48000000 uImage && " \ |
| 389 | "bootm 0x48000000\0" |
| 390 | #else |
| 391 | #define BOOTCMD_SUNXI_COMPAT |
| 392 | #endif |
| 393 | |
Hans de Goede | 2ec3a61 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 394 | #include <config_distro_bootcmd.h> |
| 395 | |
Hans de Goede | 86b4909 | 2014-09-18 21:03:34 +0200 | [diff] [blame] | 396 | #ifdef CONFIG_USB_KEYBOARD |
| 397 | #define CONSOLE_STDIN_SETTINGS \ |
Hans de Goede | 86b4909 | 2014-09-18 21:03:34 +0200 | [diff] [blame] | 398 | "stdin=serial,usbkbd\0" |
| 399 | #else |
Luc Verhaegen | 7f2c521 | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 400 | #define CONSOLE_STDIN_SETTINGS \ |
| 401 | "stdin=serial\0" |
Hans de Goede | 86b4909 | 2014-09-18 21:03:34 +0200 | [diff] [blame] | 402 | #endif |
Luc Verhaegen | 7f2c521 | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 403 | |
Jagan Teki | 5d23532 | 2021-02-22 00:12:34 +0000 | [diff] [blame] | 404 | #ifdef CONFIG_DM_VIDEO |
Jernej Skrabec | 5600945 | 2017-03-27 19:22:32 +0200 | [diff] [blame] | 405 | #define CONSOLE_STDOUT_SETTINGS \ |
| 406 | "stdout=serial,vidconsole\0" \ |
| 407 | "stderr=serial,vidconsole\0" |
Luc Verhaegen | 7f2c521 | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 408 | #else |
| 409 | #define CONSOLE_STDOUT_SETTINGS \ |
| 410 | "stdout=serial\0" \ |
| 411 | "stderr=serial\0" |
| 412 | #endif |
| 413 | |
Maxime Ripard | c8564b2 | 2017-02-27 18:22:11 +0100 | [diff] [blame] | 414 | #ifdef CONFIG_MTDIDS_DEFAULT |
| 415 | #define SUNXI_MTDIDS_DEFAULT \ |
| 416 | "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" |
| 417 | #else |
| 418 | #define SUNXI_MTDIDS_DEFAULT |
| 419 | #endif |
| 420 | |
| 421 | #ifdef CONFIG_MTDPARTS_DEFAULT |
| 422 | #define SUNXI_MTDPARTS_DEFAULT \ |
| 423 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" |
| 424 | #else |
| 425 | #define SUNXI_MTDPARTS_DEFAULT |
| 426 | #endif |
| 427 | |
Maxime Ripard | c53654f | 2017-11-14 21:24:00 +0100 | [diff] [blame] | 428 | #define PARTS_DEFAULT \ |
| 429 | "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \ |
| 430 | "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \ |
| 431 | "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \ |
| 432 | "name=system,size=-,uuid=${uuid_gpt_system};" |
| 433 | |
| 434 | #define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b" |
| 435 | |
| 436 | #ifdef CONFIG_ARM64 |
| 437 | #define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae" |
| 438 | #else |
| 439 | #define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3" |
| 440 | #endif |
| 441 | |
Luc Verhaegen | 7f2c521 | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 442 | #define CONSOLE_ENV_SETTINGS \ |
| 443 | CONSOLE_STDIN_SETTINGS \ |
| 444 | CONSOLE_STDOUT_SETTINGS |
| 445 | |
Andreas Färber | 2eff3b7 | 2017-04-14 18:44:47 +0200 | [diff] [blame] | 446 | #ifdef CONFIG_ARM64 |
| 447 | #define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" |
| 448 | #else |
| 449 | #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" |
| 450 | #endif |
| 451 | |
Hans de Goede | 2ec3a61 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 452 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Luc Verhaegen | 7f2c521 | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 453 | CONSOLE_ENV_SETTINGS \ |
Hans de Goede | 846e325 | 2014-08-01 09:37:58 +0200 | [diff] [blame] | 454 | MEM_LAYOUT_ENV_SETTINGS \ |
Arnaud Ferraris | 747c242 | 2021-02-20 13:14:15 +0100 | [diff] [blame^] | 455 | MEM_LAYOUT_ENV_EXTRA_SETTINGS \ |
Siarhei Siamashka | 2a909c5 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 456 | DFU_ALT_INFO_RAM \ |
Andreas Färber | 2eff3b7 | 2017-04-14 18:44:47 +0200 | [diff] [blame] | 457 | "fdtfile=" FDTFILE "\0" \ |
Hans de Goede | 846e325 | 2014-08-01 09:37:58 +0200 | [diff] [blame] | 458 | "console=ttyS0,115200\0" \ |
Maxime Ripard | c8564b2 | 2017-02-27 18:22:11 +0100 | [diff] [blame] | 459 | SUNXI_MTDIDS_DEFAULT \ |
| 460 | SUNXI_MTDPARTS_DEFAULT \ |
Maxime Ripard | c53654f | 2017-11-14 21:24:00 +0100 | [diff] [blame] | 461 | "uuid_gpt_esp=" UUID_GPT_ESP "\0" \ |
| 462 | "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \ |
| 463 | "partitions=" PARTS_DEFAULT "\0" \ |
Hans de Goede | 3b82402 | 2015-10-09 17:11:15 +0100 | [diff] [blame] | 464 | BOOTCMD_SUNXI_COMPAT \ |
Hans de Goede | 2ec3a61 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 465 | BOOTENV |
| 466 | |
| 467 | #else /* ifndef CONFIG_SPL_BUILD */ |
| 468 | #define CONFIG_EXTRA_ENV_SETTINGS |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 469 | #endif |
| 470 | |
| 471 | #endif /* _SUNXI_COMMON_CONFIG_H */ |