blob: 85f88cea77982549e2896b974877b5459a016f95 [file] [log] [blame]
Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner041cdb52016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutlaacf15002018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Cai451dcf52018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner041cdb52016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangdaeed1d2017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangdaeed1d2017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübner0a2be692017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich4d9253f2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Heiko Stübner008a6102017-04-06 00:19:36 +020037 select BOARD_LATE_INIT
Heiko Stübner0a2be692017-02-18 19:46:36 +010038 select ROCKCHIP_BROM_HELPER
39 help
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
45
Kever Yang168eef72017-06-23 17:17:52 +080046config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053048 select CPU_V7A
Kever Yang168eef72017-06-23 17:17:52 +080049 select SUPPORT_SPL
Kever Yangc34643e2019-04-02 20:41:24 +080050 select SUPPORT_TPL
Kever Yang168eef72017-06-23 17:17:52 +080051 select SPL
Kever Yangc34643e2019-04-02 20:41:24 +080052 select SPL_DM
53 select SPL_OF_LIBFDT
54 select TPL
55 select TPL_DM
56 select TPL_OF_LIBFDT
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +080062 select ROCKCHIP_BROM_HELPER
Kever Yangc34643e2019-04-02 20:41:24 +080063 select TPL_LIBCOMMON_SUPPORT
64 select TPL_LIBGENERIC_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +080065 help
66 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
67 including NEON and GPU, Mali-400 graphics, several DDR3 options
68 and video codec support. Peripherals include Gigabit Ethernet,
69 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
70
Simon Glass2444dae2015-08-30 16:55:38 -060071config ROCKCHIP_RK3288
72 bool "Support Rockchip RK3288"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053073 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080074 select SPL_BOARD_INIT if SPL
Kever Yanga381bcf2016-07-19 21:16:59 +080075 select SUPPORT_SPL
76 select SPL
Kever Yangd18ca742019-07-02 11:43:05 +080077 select SUPPORT_TPL
78 imply TPL_BOOTROM_SUPPORT
79 imply TPL_CLK
80 imply TPL_DM
81 imply TPL_DRIVERS_MISC_SUPPORT
82 imply TPL_LIBCOMMON_SUPPORT
83 imply TPL_LIBGENERIC_SUPPORT
84 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yang45290842019-07-02 11:43:06 +080085 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangd18ca742019-07-02 11:43:05 +080086 imply TPL_OF_CONTROL
87 imply TPL_OF_PLATDATA
88 imply TPL_RAM
89 imply TPL_REGMAP
90 imply TPL_SERIAL_SUPPORT
91 imply TPL_SYSCON
Eddie Caic3d098e2017-12-15 08:17:13 +080092 imply USB_FUNCTION_ROCKUSB
93 imply CMD_ROCKUSB
Simon Glass2444dae2015-08-30 16:55:38 -060094 help
95 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
96 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
97 video interfaces supporting HDMI and eDP, several DDR3 options
98 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färberef904bf2016-11-02 18:03:01 +010099 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2444dae2015-08-30 16:55:38 -0600100
Kever Yang85a3cfb2017-02-23 15:37:51 +0800101config ROCKCHIP_RK3328
102 bool "Support Rockchip RK3328"
103 select ARM64
Kever Yangc009aeb2019-06-09 00:27:15 +0300104 select SUPPORT_SPL
105 select SPL
106 imply SPL_SERIAL_SUPPORT
107 imply SPL_SEPARATE_BSS
108 select ENABLE_ARM_SOC_BOOT0_HOOK
109 select DEBUG_UART_BOARD_INIT
110 select SYS_NS16550
Kever Yang85a3cfb2017-02-23 15:37:51 +0800111 help
112 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
113 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
114 video interfaces supporting HDMI and eDP, several DDR3 options
115 and video codec support. Peripherals include Gigabit Ethernet,
116 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
117
Andreas Färber37a0c602017-05-15 17:51:18 +0800118config ROCKCHIP_RK3368
119 bool "Support Rockchip RK3368"
120 select ARM64
Philipp Tomsich50714572017-06-11 23:46:25 +0200121 select SUPPORT_SPL
122 select SUPPORT_TPL
Philipp Tomsich4cf43782017-07-28 20:03:07 +0200123 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
124 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich50714572017-06-11 23:46:25 +0200125 imply SPL_SEPARATE_BSS
126 imply SPL_SERIAL_SUPPORT
127 imply TPL_SERIAL_SUPPORT
Andreas Färber37a0c602017-05-15 17:51:18 +0800128 help
Philipp Tomsich9a8f0092017-06-10 00:47:53 +0200129 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
130 into a big and little cluster with 4 cores each) Cortex-A53 including
131 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
132 (for the little cluster), PowerVR G6110 based graphics, one video
133 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
134 video codec support.
135
136 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
137 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber37a0c602017-05-15 17:51:18 +0800138
Kever Yanga381bcf2016-07-19 21:16:59 +0800139config ROCKCHIP_RK3399
140 bool "Support Rockchip RK3399"
141 select ARM64
Kever Yang66e87cc2017-02-22 16:56:38 +0800142 select SUPPORT_SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800143 select SUPPORT_TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800144 select SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530145 select SPL_ATF
146 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekiadde32d2019-06-21 00:25:03 +0530147 select SPL_BOARD_INIT if SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530148 select SPL_LOAD_FIT
149 select SPL_CLK if SPL
150 select SPL_PINCTRL if SPL
151 select SPL_RAM if SPL
152 select SPL_REGMAP if SPL
153 select SPL_SYSCON if SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800154 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
155 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800156 select SPL_SEPARATE_BSS
Philipp Tomsichc0508e42017-07-26 12:29:01 +0200157 select SPL_SERIAL_SUPPORT
158 select SPL_DRIVERS_MISC_SUPPORT
Jagan Teki2666bd42019-05-08 11:11:43 +0530159 select CLK
160 select FIT
161 select PINCTRL
162 select RAM
163 select REGMAP
164 select SYSCON
165 select DM_PMIC
166 select DM_REGULATOR_FIXED
Andy Yane3067792017-10-11 15:00:16 +0800167 select BOARD_LATE_INIT
Andy Yanb4d23f72017-10-11 15:00:49 +0800168 select ROCKCHIP_BROM_HELPER
Kever Yang6bbf5e12018-11-09 11:18:15 +0800169 imply TPL_SERIAL_SUPPORT
170 imply TPL_LIBCOMMON_SUPPORT
171 imply TPL_LIBGENERIC_SUPPORT
172 imply TPL_SYS_MALLOC_SIMPLE
Jagan Teki4977cf62019-06-21 00:25:06 +0530173 imply TPL_BOARD_INIT
Kever Yang6bbf5e12018-11-09 11:18:15 +0800174 imply TPL_BOOTROM_SUPPORT
175 imply TPL_DRIVERS_MISC_SUPPORT
176 imply TPL_OF_CONTROL
177 imply TPL_DM
178 imply TPL_REGMAP
179 imply TPL_SYSCON
180 imply TPL_RAM
181 imply TPL_CLK
182 imply TPL_TINY_MEMSET
Kever Yanga381bcf2016-07-19 21:16:59 +0800183 help
184 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
185 and quad-core Cortex-A53.
186 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
187 video interfaces supporting HDMI and eDP, several DDR3 options
188 and video codec support. Peripherals include Gigabit Ethernet,
189 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
190
Andy Yan2c1e11d2017-06-01 18:00:55 +0800191config ROCKCHIP_RV1108
192 bool "Support Rockchip RV1108"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530193 select CPU_V7A
Andy Yan2c1e11d2017-06-01 18:00:55 +0800194 help
195 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
196 and a DSP.
197
Heiko Stuebner5b5ca4c2018-10-08 13:01:56 +0200198config ROCKCHIP_USB_UART
199 bool "Route uart output to usb pins"
200 help
201 Rockchip SoCs have the ability to route the signals of the debug
202 uart through the d+ and d- pins of a specific usb phy to enable
203 some form of closed-case debugging. With this option supported
204 SoCs will enable this routing as a debug measure.
205
Philipp Tomsichee14d292017-06-29 11:21:15 +0200206config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800207 bool "SPL returns to bootrom"
208 default y if ROCKCHIP_RK3036
Heiko Stübner1d845942017-02-18 19:46:25 +0100209 select ROCKCHIP_BROM_HELPER
Philipp Tomsichee14d292017-06-29 11:21:15 +0200210 depends on SPL
211 help
212 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
213 SPL will return to the boot rom, which will then load the U-Boot
214 binary to keep going on.
215
216config TPL_ROCKCHIP_BACK_TO_BROM
217 bool "TPL returns to bootrom"
Kever Yang6bbf5e12018-11-09 11:18:15 +0800218 default y
Philipp Tomsichee14d292017-06-29 11:21:15 +0200219 select ROCKCHIP_BROM_HELPER
220 depends on TPL
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800221 help
222 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
223 SPL will return to the boot rom, which will then load the U-Boot
224 binary to keep going on.
225
Andy Yane3067792017-10-11 15:00:16 +0800226config ROCKCHIP_BOOT_MODE_REG
227 hex "Rockchip boot mode flag register address"
Andy Yane3067792017-10-11 15:00:16 +0800228 help
Kever Yang15f09a12019-03-28 11:01:23 +0800229 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yane3067792017-10-11 15:00:16 +0800230 according to the value from this register.
231
Kever Yangfa1392a2017-04-20 17:03:46 +0800232config ROCKCHIP_SPL_RESERVE_IRAM
233 hex "Size of IRAM reserved in SPL"
Kever Yang8a8106f2017-12-18 15:13:19 +0800234 default 0
Kever Yangfa1392a2017-04-20 17:03:46 +0800235 help
236 SPL may need reserve memory for firmware loaded by SPL, whose load
237 address is in IRAM and may overlay with SPL text area if not
238 reserved.
239
Heiko Stübner1d845942017-02-18 19:46:25 +0100240config ROCKCHIP_BROM_HELPER
241 bool
242
Philipp Tomsichb377d222017-10-10 16:21:10 +0200243config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
244 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
245 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
246 help
247 Some Rockchip BROM variants (e.g. on the RK3188) load the
248 first stage in segments and enter multiple times. E.g. on
249 the RK3188, the first 1KB of the first stage are loaded
250 first and entered; after returning to the BROM, the
251 remainder of the first stage is loaded, but the BROM
252 re-enters at the same address/to the same code as previously.
253
254 This enables support code in the BOOT0 hook for the SPL stage
255 to allow multiple entries.
256
257config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
258 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
259 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
260 help
261 Some Rockchip BROM variants (e.g. on the RK3188) load the
262 first stage in segments and enter multiple times. E.g. on
263 the RK3188, the first 1KB of the first stage are loaded
264 first and entered; after returning to the BROM, the
265 remainder of the first stage is loaded, but the BROM
266 re-enters at the same address/to the same code as previously.
267
268 This enables support code in the BOOT0 hook for the TPL stage
269 to allow multiple entries.
270
Sandy Patterson230e0e02016-08-29 07:31:16 -0400271config SPL_MMC_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200272 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Patterson230e0e02016-08-29 07:31:16 -0400273
huang linbe1d5e02015-11-17 14:20:27 +0800274source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangdaeed1d2017-11-28 16:04:16 +0800275source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübner0a2be692017-02-18 19:46:36 +0100276source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yangb24a8ec2017-06-23 17:17:54 +0800277source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner041cdb52016-07-16 00:17:15 +0200278source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yang85a3cfb2017-02-23 15:37:51 +0800279source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber37a0c602017-05-15 17:51:18 +0800280source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yanga381bcf2016-07-19 21:16:59 +0800281source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2c1e11d2017-06-01 18:00:55 +0800282source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -0600283endif