blob: 70e9ce143b41c4f19a9ca010c56995529452cf79 [file] [log] [blame]
Jason Jinece92f82007-07-06 08:34:56 +08001/****************************************************************************
2*
3* BIOS emulator and interface
4* to Realmode X86 Emulator Library
5*
6* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
7* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1996-1999 SciTech Software, Inc.
10*
11* ========================================================================
12*
13* Permission to use, copy, modify, distribute, and sell this software and
14* its documentation for any purpose is hereby granted without fee,
15* provided that the above copyright notice appear in all copies and that
16* both that copyright notice and this permission notice appear in
17* supporting documentation, and that the name of the authors not be used
18* in advertising or publicity pertaining to distribution of the software
19* without specific, written prior permission. The authors makes no
20* representations about the suitability of this software for any purpose.
21* It is provided "as is" without express or implied warranty.
22*
23* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
24* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
25* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
26* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
27* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
28* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
29* PERFORMANCE OF THIS SOFTWARE.
30*
31* ========================================================================
32*
33* Language: ANSI C
34* Environment: Any
35* Developer: Kendall Bennett
36*
37* Description: Module implementing the BIOS specific functions.
38*
39* Jason ported this file to u-boot to run the ATI video card
40* video BIOS.
41*
42****************************************************************************/
43
Michal Simek78cff502007-08-16 10:46:28 +020044#include <common.h>
45
Michal Simek5b4de932007-08-15 21:15:05 +020046#if defined(CONFIG_BIOSEMU)
47
Jason Jinece92f82007-07-06 08:34:56 +080048#include "biosemui.h"
49
50/*----------------------------- Implementation ----------------------------*/
51
52/****************************************************************************
53PARAMETERS:
54intno - Interrupt number being serviced
55
56REMARKS:
57Handler for undefined interrupts.
58****************************************************************************/
59static void X86API undefined_intr(int intno)
60{
61 if (BE_rdw(intno * 4 + 2) == BIOS_SEG) {
62 DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);)
63 } else
64 X86EMU_prepareForInt(intno);
65}
66
67/****************************************************************************
68PARAMETERS:
69intno - Interrupt number being serviced
70
71REMARKS:
72This function handles the default system BIOS Int 10h (the default is stored
73in the Int 42h vector by the system BIOS at bootup). We only need to handle
74a small number of special functions used by the BIOS during POST time.
75****************************************************************************/
76static void X86API int42(int intno)
77{
78 if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
79 if (M.x86.R_AL == 0) {
80 /* Enable CPU accesses to video memory */
81 PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02);
82 return;
83 } else if (M.x86.R_AL == 1) {
84 /* Disable CPU accesses to video memory */
85 PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02);
86 return;
87 }
88#ifdef DEBUG
89 else {
90 printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",
91 M.x86.R_AL);
92 }
93#endif
94 }
95#ifdef DEBUG
96 else {
97 printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",
98 M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
99 }
100#endif
101}
102
103/****************************************************************************
104PARAMETERS:
105intno - Interrupt number being serviced
106
107REMARKS:
108This function handles the default system BIOS Int 10h. If the POST code
109has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this
110by simply calling the int42 interrupt handler above. Very early in the
111BIOS POST process, the vector gets replaced and we simply let the real
112mode interrupt handler process the interrupt.
113****************************************************************************/
114static void X86API int10(int intno)
115{
116 if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
117 int42(intno);
118 else
119 X86EMU_prepareForInt(intno);
120}
121
122/* Result codes returned by the PCI BIOS */
123
124#define SUCCESSFUL 0x00
125#define FUNC_NOT_SUPPORT 0x81
126#define BAD_VENDOR_ID 0x83
127#define DEVICE_NOT_FOUND 0x86
128#define BAD_REGISTER_NUMBER 0x87
129#define SET_FAILED 0x88
130#define BUFFER_TOO_SMALL 0x89
131
132/****************************************************************************
133PARAMETERS:
134intno - Interrupt number being serviced
135
136REMARKS:
137This function handles the default Int 1Ah interrupt handler for the real
138mode code, which provides support for the PCI BIOS functions. Since we only
139want to allow the real mode BIOS code *only* see the PCI config space for
140its own device, we only return information for the specific PCI config
141space that we have passed in to the init function. This solves problems
142when using the BIOS to warm boot a secondary adapter when there is an
143identical adapter before it on the bus (some BIOS'es get confused in this
144case).
145****************************************************************************/
146static void X86API int1A(int unused)
147{
148 u16 pciSlot;
149
150#ifdef __KERNEL__
151 u8 interface, subclass, baseclass;
152
153 /* Initialise the PCI slot number */
154 pciSlot = ((int)_BE_env.vgaInfo.bus << 8) |
155 ((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function;
156#else
157/* Fail if no PCI device information has been registered */
158 if (!_BE_env.vgaInfo.pciInfo)
159 return;
160
161 pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8);
162#endif
163 switch (M.x86.R_AX) {
164 case 0xB101: /* PCI bios present? */
165 M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
166 M.x86.R_EDX = 0x20494350; /* " ICP" */
167 M.x86.R_BX = 0x0210; /* Version 2.10 */
168 M.x86.R_CL = 0; /* Max bus number in system */
169 CLEAR_FLAG(F_CF);
170 break;
171 case 0xB102: /* Find PCI device */
172 M.x86.R_AH = DEVICE_NOT_FOUND;
173#ifdef __KERNEL__
174 if (M.x86.R_DX == _BE_env.vgaInfo.VendorID &&
175 M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) {
176#else
177 if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
178 M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
179 M.x86.R_SI == 0) {
180#endif
181 M.x86.R_AH = SUCCESSFUL;
182 M.x86.R_BX = pciSlot;
183 }
184 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
185 break;
186 case 0xB103: /* Find PCI class code */
187 M.x86.R_AH = DEVICE_NOT_FOUND;
188#ifdef __KERNEL__
189 pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
190 &interface);
191 pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
192 &subclass);
193 pci_read_config_byte(_BE_env.vgaInfo.pcidev,
194 PCI_CLASS_DEVICE + 1, &baseclass);
195 if (M.x86.R_CL == interface && M.x86.R_CH == subclass
196 && (u8) (M.x86.R_ECX >> 16) == baseclass) {
197#else
198 if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
199 M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
200 (u8) (M.x86.R_ECX >> 16) ==
201 _BE_env.vgaInfo.pciInfo->BaseClass) {
202#endif
203 M.x86.R_AH = SUCCESSFUL;
204 M.x86.R_BX = pciSlot;
205 }
206 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
207 break;
208 case 0xB108: /* Read configuration byte */
209 M.x86.R_AH = BAD_REGISTER_NUMBER;
210 if (M.x86.R_BX == pciSlot) {
211 M.x86.R_AH = SUCCESSFUL;
212#ifdef __KERNEL__
213 pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
214 &M.x86.R_CL);
215#else
216 M.x86.R_CL =
217 (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
218 _BE_env.vgaInfo.pciInfo);
219#endif
220 }
221 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
222 break;
223 case 0xB109: /* Read configuration word */
224 M.x86.R_AH = BAD_REGISTER_NUMBER;
225 if (M.x86.R_BX == pciSlot) {
226 M.x86.R_AH = SUCCESSFUL;
227#ifdef __KERNEL__
228 pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
229 &M.x86.R_CX);
230#else
231 M.x86.R_CX =
232 (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
233 _BE_env.vgaInfo.pciInfo);
234#endif
235 }
236 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
237 break;
238 case 0xB10A: /* Read configuration dword */
239 M.x86.R_AH = BAD_REGISTER_NUMBER;
240 if (M.x86.R_BX == pciSlot) {
241 M.x86.R_AH = SUCCESSFUL;
242#ifdef __KERNEL__
243 pci_read_config_dword(_BE_env.vgaInfo.pcidev,
244 M.x86.R_DI, &M.x86.R_ECX);
245#else
246 M.x86.R_ECX =
247 (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
248 _BE_env.vgaInfo.pciInfo);
249#endif
250 }
251 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
252 break;
253 case 0xB10B: /* Write configuration byte */
254 M.x86.R_AH = BAD_REGISTER_NUMBER;
255 if (M.x86.R_BX == pciSlot) {
256 M.x86.R_AH = SUCCESSFUL;
257#ifdef __KERNEL__
258 pci_write_config_byte(_BE_env.vgaInfo.pcidev,
259 M.x86.R_DI, M.x86.R_CL);
260#else
261 PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
262 _BE_env.vgaInfo.pciInfo);
263#endif
264 }
265 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
266 break;
267 case 0xB10C: /* Write configuration word */
268 M.x86.R_AH = BAD_REGISTER_NUMBER;
269 if (M.x86.R_BX == pciSlot) {
270 M.x86.R_AH = SUCCESSFUL;
271#ifdef __KERNEL__
272 pci_write_config_word(_BE_env.vgaInfo.pcidev,
273 M.x86.R_DI, M.x86.R_CX);
274#else
275 PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
276 _BE_env.vgaInfo.pciInfo);
277#endif
278 }
279 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
280 break;
281 case 0xB10D: /* Write configuration dword */
282 M.x86.R_AH = BAD_REGISTER_NUMBER;
283 if (M.x86.R_BX == pciSlot) {
284 M.x86.R_AH = SUCCESSFUL;
285#ifdef __KERNEL__
286 pci_write_config_dword(_BE_env.vgaInfo.pcidev,
287 M.x86.R_DI, M.x86.R_ECX);
288#else
289 PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
290 _BE_env.vgaInfo.pciInfo);
291#endif
292 }
293 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
294 break;
295 default:
296 printf("biosEmu/bios.int1a: unknown function AX=%#04x\n",
297 M.x86.R_AX);
298 }
299}
300
301/****************************************************************************
302REMARKS:
303This function initialises the BIOS emulation functions for the specific
304PCI display device. We insulate the real mode BIOS from any other devices
305on the bus, so that it will work correctly thinking that it is the only
306device present on the bus (ie: avoiding any adapters present in from of
307the device we are trying to control).
308****************************************************************************/
309#define BE_constLE_32(v) ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16))
310
311void _BE_bios_init(u32 * intrTab)
312{
313 int i;
314 X86EMU_intrFuncs bios_intr_tab[256];
315
316 for (i = 0; i < 256; ++i) {
317 intrTab[i] = BE_constLE_32(BIOS_SEG << 16);
318 bios_intr_tab[i] = undefined_intr;
319 }
320 bios_intr_tab[0x10] = int10;
321 bios_intr_tab[0x1A] = int1A;
322 bios_intr_tab[0x42] = int42;
323 bios_intr_tab[0x6D] = int10;
324 X86EMU_setupIntrFuncs(bios_intr_tab);
325}
Jason Jince981dc2007-08-08 08:33:11 +0800326#endif