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Daniel Hellstrom69403832008-03-26 23:34:47 +01001/* Configuration header file for Gaisler Research AB's Template
2 * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS
3 * Development board Stratix II edition, with the FPGA device
4 * EP2S60.
5 *
6 * (C) Copyright 2003-2005
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * (C) Copyright 2008
10 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
11 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020012 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom69403832008-03-26 23:34:47 +010013 */
14
15#ifndef __CONFIG_H__
16#define __CONFIG_H__
17
Francois Retiefa62bba12015-10-29 00:02:48 +020018#define CONFIG_SYS_GENERIC_BOARD
Francois Retief4c547752015-10-28 16:49:02 +020019#define CONFIG_DISPLAY_BOARDINFO
Francois Retiefa62bba12015-10-29 00:02:48 +020020
Daniel Hellstrom69403832008-03-26 23:34:47 +010021/*
22 * High Level Configuration Options
23 * (easy to change)
24 */
25
Daniel Hellstrom69403832008-03-26 23:34:47 +010026/* Altera NIOS Development board, Stratix II board */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020027#define CONFIG_GR_EP2S60 1
Daniel Hellstrom69403832008-03-26 23:34:47 +010028
29/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020030#define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */
Daniel Hellstrom69403832008-03-26 23:34:47 +010031
Daniel Hellstrom69403832008-03-26 23:34:47 +010032/* Define this is the GR-2S60-MEZZ mezzanine is available and you
33 * want to use the USB and GRETH functionality of the board
34 */
35#undef GR_2S60_MEZZ
36
37#ifdef GR_2S60_MEZZ
38#define USE_GRETH 1
39#define USE_GRUSB 1
40#endif
41
42/*
43 * Serial console configuration
44 */
45#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom69403832008-03-26 23:34:47 +010047
48/* Partitions */
49#define CONFIG_DOS_PARTITION
50#define CONFIG_MAC_PARTITION
51#define CONFIG_ISO_PARTITION
52
53/*
54 * Supported commands
55 */
Daniel Hellstrom69403832008-03-26 23:34:47 +010056#define CONFIG_CMD_REGINFO
Daniel Hellstrom69403832008-03-26 23:34:47 +010057#define CONFIG_CMD_DIAG
58#define CONFIG_CMD_IRQ
59
60/* USB support */
61#if USE_GRUSB
62#define CONFIG_USB_UHCI
63#define CONFIG_CMD_FAT
64#define CONFIG_CMD_EXT2
Daniel Hellstrom69403832008-03-26 23:34:47 +010065#define CONFIG_USB_STORAGE
66/* Enable needed helper functions */
Jean-Christophe PLAGNIOL-VILLARD52cb4d42009-05-16 12:14:54 +020067#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
Daniel Hellstrom69403832008-03-26 23:34:47 +010068#endif
69
70/*
71 * Autobooting
72 */
73#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
74
75#define CONFIG_PREBOOT "echo;" \
76 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
77 "echo"
78
79#undef CONFIG_BOOTARGS
80
81#define CONFIG_EXTRA_ENV_SETTINGS \
82 "netdev=eth0\0" \
83 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
84 "nfsroot=${serverip}:${rootpath}\0" \
85 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
86 "addip=setenv bootargs ${bootargs} " \
87 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
88 ":${hostname}:${netdev}:off panic=1\0" \
89 "flash_nfs=run nfsargs addip;" \
90 "bootm ${kernel_addr}\0" \
91 "flash_self=run ramargs addip;" \
92 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
93 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
94 "scratch=40800000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000095 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom69403832008-03-26 23:34:47 +010096 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \
97 ""
98
99#define CONFIG_NETMASK 255.255.255.0
100#define CONFIG_GATEWAYIP 192.168.0.1
101#define CONFIG_SERVERIP 192.168.0.20
102#define CONFIG_IPADDR 192.168.0.207
Joe Hershberger8b3637c2011-10-13 13:03:47 +0000103#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom69403832008-03-26 23:34:47 +0100104#define CONFIG_HOSTNAME ml401
Joe Hershbergerb3f44c22011-10-13 13:03:48 +0000105#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom69403832008-03-26 23:34:47 +0100106
107#define CONFIG_BOOTCOMMAND "run flash_self"
108
109/* Memory MAP
110 *
111 * Flash:
112 * |--------------------------------|
113 * | 0x00000000 Text & Data & BSS | *
114 * | for Monitor | *
115 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
116 * | UNUSED / Growth | * 256kb
117 * |--------------------------------|
118 * | 0x00050000 Base custom area | *
119 * | kernel / FS | *
120 * | | * Rest of Flash
121 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
122 * | END-0x00008000 Environment | * 32kb
123 * |--------------------------------|
124 *
125 *
126 *
127 * Main Memory:
128 * |--------------------------------|
129 * | UNUSED / scratch area |
130 * | |
131 * | |
132 * | |
133 * | |
134 * |--------------------------------|
135 * | Monitor .Text / .DATA / .BSS | * 512kb
136 * | Relocated! | *
137 * |--------------------------------|
138 * | Monitor Malloc | * 128kb (contains relocated environment)
139 * |--------------------------------|
140 * | Monitor/kernel STACK | * 64kb
141 * |--------------------------------|
142 * | Page Table for MMU systems | * 2k
143 * |--------------------------------|
144 * | PROM Code accessed from Linux | * 6kb-128b
145 * |--------------------------------|
146 * | Global data (avail from kernel)| * 128b
147 * |--------------------------------|
148 *
149 */
150
151/*
152 * Flash configuration (8,16 or 32 MB)
153 * TEXT base always at 0xFFF00000
154 * ENV_ADDR always at 0xFFF40000
155 * FLASH_BASE at 0xFC000000 for 64 MB
156 * 0xFE000000 for 32 MB
157 * 0xFF000000 for 16 MB
158 * 0xFF800000 for 8 MB
159 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160/*#define CONFIG_SYS_NO_FLASH 1*/
161#define CONFIG_SYS_FLASH_BASE 0x00000000
162#define CONFIG_SYS_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100163
164#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
166#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100167
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
169#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
170#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
171#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
172#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100173
174/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200175#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200176#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom69403832008-03-26 23:34:47 +0100178/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom69403832008-03-26 23:34:47 +0100180/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom69403832008-03-26 23:34:47 +0100182
183/*
184 * Environment settings
185 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200186/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200187#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200188/* CONFIG_ENV_ADDR need to be at sector boundary */
189#define CONFIG_ENV_SIZE 0x8000
190#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom69403832008-03-26 23:34:47 +0100192#define CONFIG_ENV_OVERWRITE 1
193
194/*
195 * Memory map
196 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200197#define CONFIG_SYS_SDRAM_BASE 0x40000000
198#define CONFIG_SYS_SDRAM_SIZE 0x02000000
199#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom69403832008-03-26 23:34:47 +0100200
201/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200202#undef CONFIG_SYS_SRAM_BASE
203#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstrom69403832008-03-26 23:34:47 +0100204
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200205#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
206#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
207#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom69403832008-03-26 23:34:47 +0100208
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200209#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom69403832008-03-26 23:34:47 +0100210
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200211#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom69403832008-03-26 23:34:47 +0100213
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200214#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
215#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom69403832008-03-26 23:34:47 +0100216
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200217#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
219# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom69403832008-03-26 23:34:47 +0100220#endif
221
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
223#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
224#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100225
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
227#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom69403832008-03-26 23:34:47 +0100228
229/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200230#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
231#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom69403832008-03-26 23:34:47 +0100232
233/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200234#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom69403832008-03-26 23:34:47 +0100235
236/*
237 * Ethernet configuration uses on board SMC91C111, however if a mezzanine
238 * with a PHY is attached the GRETH can be used on this board.
239 * Define USE_GRETH in order to use the mezzanine provided PHY with the
240 * onchip GRETH network MAC, note that this is not supported by the
241 * template design.
242 */
243#ifndef USE_GRETH
244
245/* USE SMC91C111 MAC */
Ben Warren7194ab82009-10-04 22:37:03 -0700246#define CONFIG_SMC91111 1
Daniel Hellstrom69403832008-03-26 23:34:47 +0100247#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
248#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
249#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
250/*#define CONFIG_SHOW_ACTIVITY*/
251#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
252
253#else
254
255/* USE GRETH Ethernet Driver */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100256#define CONFIG_GRETH 1
Masahiro Yamada1e1f3532015-05-26 10:58:31 +0900257#endif
Daniel Hellstrom69403832008-03-26 23:34:47 +0100258
Daniel Hellstrom69403832008-03-26 23:34:47 +0100259#define CONFIG_PHY_ADDR 0x00
260
261/*
262 * Miscellaneous configurable options
263 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200264#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100265#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200266#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100267#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200268#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100269#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200270#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
271#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
272#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100273
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200274#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
275#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100276
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200277#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom69403832008-03-26 23:34:47 +0100278
Daniel Hellstrom69403832008-03-26 23:34:47 +0100279/*-----------------------------------------------------------------------
280 * USB stuff
281 *-----------------------------------------------------------------------
282 */
283#define CONFIG_USB_CLOCK 0x0001BBBB
284#define CONFIG_USB_CONFIG 0x00005000
285
286/***** Gaisler GRLIB IP-Cores Config ********/
287
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200288#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom69403832008-03-26 23:34:47 +0100289
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100290/* No SDRAM Configuration */
291#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
292
Daniel Hellstrom69403832008-03-26 23:34:47 +0100293/* See, GRLIB Docs (grip.pdf) on how to set up
294 * These the memory controller registers.
295 */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100296#define CONFIG_SYS_GRLIB_ESA_MCTRL1
297#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11))
298#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x00000000
299#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00000000
Daniel Hellstrom69403832008-03-26 23:34:47 +0100300
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100301/* GRLIB FT-MCTRL configuration */
302#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
303#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11))
304#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x00000000
305#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00000000
Daniel Hellstrom69403832008-03-26 23:34:47 +0100306
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100307/* DDR controller */
308#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
309#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL 0xa900830a
Daniel Hellstrom69403832008-03-26 23:34:47 +0100310
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100311/* no DDR2 Controller */
312#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom69403832008-03-26 23:34:47 +0100313
Daniel Hellstrom69403832008-03-26 23:34:47 +0100314/* Identification string */
Francois Retief4c547752015-10-28 16:49:02 +0200315#define CONFIG_IDENT_STRING " Gaisler LEON3 EP2S60"
Daniel Hellstrom69403832008-03-26 23:34:47 +0100316
317/* default kernel command line */
318#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
319
320#endif /* __CONFIG_H */