Blame - arch/arm/mach-zynqmp/Kconfig - platform/external/u-boot

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Siva Durga Prasad Paladugu	0b54a9d	2015-06-10 15:50:57 +0530	[diff] [blame]	1	if ARCH_ZYNQMP
				2
Tien Fong Chee	0c3a9ed	2019-01-23 14:20:03 +0800	[diff] [blame]	3	config SPL_FS_FAT
Simon Glass	ae56db5	2016-09-12 23:18:38 -0600	[diff] [blame]	4	default y
				5
Simon Glass	77d2f7f	2016-09-12 23:18:41 -0600	[diff] [blame]	6	config SPL_LIBCOMMON_SUPPORT
				7	default y
				8
Simon Glass	1646eba	2016-09-12 23:18:42 -0600	[diff] [blame]	9	config SPL_LIBDISK_SUPPORT
				10	default y
				11
Simon Glass	cc4288e	2016-09-12 23:18:43 -0600	[diff] [blame]	12	config SPL_LIBGENERIC_SUPPORT
				13	default y
				14
Simon Glass	103c5f1	2021-08-08 12:20:09 -0600	[diff] [blame]	15	config SPL_MMC
Alexandru Gagniuc	0dcf18c	2017-04-04 10:02:58 -0700	[diff] [blame]	16	default y if MMC_SDHCI_ZYNQ
Simon Glass	1fdf7c6	2016-09-12 23:18:44 -0600	[diff] [blame]	17
Simon Glass	2a73606	2021-08-08 12:20:12 -0600	[diff] [blame]	18	config SPL_SERIAL
Simon Glass	e00f76c	2016-09-12 23:18:56 -0600	[diff] [blame]	19	default y
				20
Simon Glass	e404ade	2016-09-12 23:18:57 -0600	[diff] [blame]	21	config SPL_SPI_FLASH_SUPPORT
				22	default y if ZYNQ_QSPI
				23
Simon Glass	ea2ca7e	2021-08-08 12:20:14 -0600	[diff] [blame]	24	config SPL_SPI
Simon Glass	f35ed9e	2016-09-12 23:18:58 -0600	[diff] [blame]	25	default y if ZYNQ_QSPI
				26
Michal Simek	84c7204	2015-01-15 10:01:51 +0100	[diff] [blame]	27	config SYS_BOARD
Liam Beguin	1814194	2021-10-20 11:25:18 -0400	[diff] [blame]	28	string "Board name"
Michal Simek	84c7204	2015-01-15 10:01:51 +0100	[diff] [blame]	29	default "zynqmp"
				30
				31	config SYS_VENDOR
Mike Looijmans	ef4cab9	2017-01-03 09:47:52 +0100	[diff] [blame]	32	string "Vendor name"
Michal Simek	84c7204	2015-01-15 10:01:51 +0100	[diff] [blame]	33	default "xilinx"
				34
				35	config SYS_SOC
				36	default "zynqmp"
				37
				38	config SYS_CONFIG_NAME
Michal Simek	a1108da	2016-03-18 18:21:36 +0100	[diff] [blame]	39	string "Board configuration name"
				40	default "xilinx_zynqmp"
				41	help
				42	This option contains information about board configuration name.
				43	Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
				44	will be used for board configuration.
Michal Simek	84c7204	2015-01-15 10:01:51 +0100	[diff] [blame]	45
Siva Durga Prasad Paladugu	e042d36	2017-07-13 19:01:11 +0530	[diff] [blame]	46	config SYS_MEM_RSVD_FOR_MMU
				47	bool "Reserve memory for MMU Table"
				48	help
				49	If defined this option is used to setup different space for
				50	MMU table than the one which will be allocated during
				51	relocation.
				52
Mike Looijmans	3b64608	2016-09-20 11:37:24 +0200	[diff] [blame]	53	config BOOT_INIT_FILE
				54	string "boot.bin init register filename"
Michal Simek	9cf9da7	2016-12-16 13:00:26 +0100	[diff] [blame]	55	depends on SPL
Mike Looijmans	3b64608	2016-09-20 11:37:24 +0200	[diff] [blame]	56	default ""
				57	help
				58	Add register writes to boot.bin format (max 256 pairs).
				59	Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
				60
Michal Simek	c85a6b7	2016-10-21 12:58:17 +0200	[diff] [blame]	61	config PMUFW_INIT_FILE
				62	string "PMU firmware"
				63	depends on SPL
				64	default ""
				65	help
				66	Include external PMUFW (Platform Management Unit FirmWare) to
				67	a Xilinx bootable image (boot.bin).
				68
Luca Ceresoli	c28a9cf	2019-05-21 18:06:43 +0200	[diff] [blame]	69	config ZYNQMP_SPL_PM_CFG_OBJ_FILE
				70	string "PMU firmware configuration object to load at runtime by SPL"
				71	depends on SPL
				72	help
				73	Path to a binary PMU firmware configuration object to be linked
				74	into U-Boot SPL and loaded at runtime into the PMU firmware.
				75
				76	The ZynqMP Power Management Unit (PMU) needs a configuration
				77	object for most SoC peripherals to work. To have it loaded by
				78	U-Boot SPL set here the file name (absolute path or relative to
				79	the top source tree) of your configuration, which must be a
				80	binary blob. It will be linked in the SPL binary and loaded
				81	into the PMU firmware by U-Boot SPL during board
				82	initialization.
				83
				84	Leave this option empty if your PMU firmware has a hard-coded
				85	configuration object or you are loading it by any other means.
				86
Siva Durga Prasad Paladugu	16fa00a	2015-08-04 13:03:26 +0530	[diff] [blame]	87	config ZYNQMP_USB
				88	bool "Configure ZynqMP USB"
				89
Siva Durga Prasad Paladugu	3b644a3	2018-01-12 15:35:46 +0530	[diff] [blame]	90	config ZYNQMP_NO_DDR
				91	bool "Disable DDR MMU mapping"
				92	help
				93	This option configures MMU with no DDR to avoid speculative
				94	access to DDR memory where DDR is not present.
				95
Jorge Ramirez-Ortiz	01c7714	2021-06-13 20:55:53 +0200	[diff] [blame]	96	config SPL_ZYNQMP_DRAM_ECC_INIT
				97	bool "Initialize DRAM ECC"
				98	depends on SPL
				99	help
				100	This option initializes all memory to 0xdeadbeef. Must be set if your
				101	memory is of ECC type.
				102
				103	config SPL_ZYNQMP_DRAM_BANK1_BASE
				104	depends on SPL_ZYNQMP_DRAM_ECC_INIT
				105	hex "DRAM Bank1 address"
				106	default 0x00000000
				107	help
				108	Start address of DRAM ECC bank1
				109
				110	config SPL_ZYNQMP_DRAM_BANK1_LEN
				111	depends on SPL_ZYNQMP_DRAM_ECC_INIT
				112	hex "DRAM Bank1 size"
				113	default 0x80000000
				114	help
				115	Size in bytes of the DRAM ECC bank1
				116
				117	config SPL_ZYNQMP_DRAM_BANK2_BASE
				118	depends on SPL_ZYNQMP_DRAM_ECC_INIT
				119	hex "DRAM Bank2 address"
				120	default 0x800000000
				121	help
				122	Start address of DRAM ECC bank2
				123
				124	config SPL_ZYNQMP_DRAM_BANK2_LEN
				125	depends on SPL_ZYNQMP_DRAM_ECC_INIT
				126	hex "DRAM Bank2 size"
				127	default 0x0
				128	help
				129	Size in bytes of the DRAM ECC bank2. A null size takes no action.
				130
Simon Glass	04e3890	2016-07-05 17:10:13 -0600	[diff] [blame]	131	config SYS_MALLOC_F_LEN
				132	default 0x600
				133
Siva Durga Prasad Paladugu	189bec4	2017-07-13 19:01:10 +0530	[diff] [blame]	134	config DEFINE_TCM_OCM_MMAP
				135	bool "Define TCM and OCM memory in MMU Table"
Siva Durga Prasad Paladugu	8940148	2017-08-01 16:24:50 +0530	[diff] [blame]	136	default y if MP
Siva Durga Prasad Paladugu	189bec4	2017-07-13 19:01:10 +0530	[diff] [blame]	137	help
				138	This option if enabled defines the TCM and OCM memory and its
				139	memory attributes in MMU table entry.
				140
Michal Simek	fd1b635	2017-07-12 13:21:27 +0200	[diff] [blame]	141	config ZYNQMP_PSU_INIT_ENABLED
				142	bool "Include psu_init"
Michal Simek	83d2941	2022-02-17 14:28:40 +0100	[diff] [blame]	143	select BOARD_EARLY_INIT_F
Michal Simek	fd1b635	2017-07-12 13:21:27 +0200	[diff] [blame]	144	help
				145	Include psu_init to full u-boot. SPL include psu_init by default.
				146
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	147	config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
				148	bool "Overwrite SPL bootmode"
				149	depends on SPL
				150	help
				151	Overwrite bootmode selected via boot mode pins to tell SPL what should
				152	be the next boot device.
				153
Jorge Ramirez-Ortiz	398a74a	2021-10-13 15:48:00 +0200	[diff] [blame]	154	config SPL_ZYNQMP_RESTORE_JTAG
				155	bool "Restore JTAG"
				156	depends on SPL
				157	help
				158	Booting SPL in secure mode causes the CSU to disable the JTAG interface
				159	even if no eFuses were burnt. This option restores the interface if
				160	possible.
				161
Vipul Kumar	5dc5a53	2018-02-28 15:53:28 +0530	[diff] [blame]	162	config ZYNQ_SDHCI_MAX_FREQ
				163	default 200000000
				164
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	165	config SPL_ZYNQMP_ALT_BOOTMODE
				166	hex
				167	default 0x0 if JTAG_MODE
				168	default 0x1 if QSPI_MODE_24BIT
				169	default 0x2 if QSPI_MODE_32BIT
				170	default 0x3 if SD_MODE
				171	default 0x4 if NAND_MODE
				172	default 0x5 if SD_MODE1
				173	default 0x6 if EMMC_MODE
				174	default 0x7 if USB_MODE
Michal Simek	2661081	2016-10-26 09:24:32 +0200	[diff] [blame]	175	default 0xa if SW_USBHOST_MODE
				176	default 0xb if SW_SATA_MODE
Michal Simek	011f0c4	2017-02-15 09:41:53 +0100	[diff] [blame]	177	default 0xe if SD1_LSHFT_MODE
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	178
				179	choice
				180	prompt "Boot mode"
Michal Simek	e367240	2016-08-30 16:17:27 +0200	[diff] [blame]	181	depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Ulf Magnusson	e7563c2	2018-01-30 14:02:01 +0100	[diff] [blame]	182	default JTAG_MODE
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	183
				184	config JTAG_MODE
				185	bool "JTAG_MODE"
				186
				187	config QSPI_MODE_24BIT
				188	bool "QSPI_MODE_24BIT"
				189
				190	config QSPI_MODE_32BIT
				191	bool "QSPI_MODE_32BIT"
				192
				193	config SD_MODE
				194	bool "SD_MODE"
				195
				196	config SD_MODE1
				197	bool "SD_MODE1"
				198
				199	config NAND_MODE
				200	bool "NAND_MODE"
				201
				202	config EMMC_MODE
				203	bool "EMMC_MODE"
				204
				205	config USB_MODE
				206	bool "USB"
				207
Michal Simek	2661081	2016-10-26 09:24:32 +0200	[diff] [blame]	208	config SW_USBHOST_MODE
				209	bool "SW USBHOST_MODE"
				210
				211	config SW_SATA_MODE
				212	bool "SW SATA_MODE"
				213
Michal Simek	011f0c4	2017-02-15 09:41:53 +0100	[diff] [blame]	214	config SD1_LSHFT_MODE
				215	bool "SD1_LSHFT_MODE"
				216
Michal Simek	7f491d7	2016-08-30 16:17:27 +0200	[diff] [blame]	217	endchoice
Simon Glass	04e3890	2016-07-05 17:10:13 -0600	[diff] [blame]	218
Michal Simek	6ba36c0	2020-08-27 15:34:11 +0200	[diff] [blame]	219	source "board/xilinx/Kconfig"
				220	source "board/xilinx/zynqmp/Kconfig"
				221
Michal Simek	84c7204	2015-01-15 10:01:51 +0100	[diff] [blame]	222	endif