Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 2 | /* |
| 3 | * board.h |
| 4 | * |
| 5 | * TI AM335x boards information header |
| 6 | * |
| 7 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ |
Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef _BOARD_H_ |
| 11 | #define _BOARD_H_ |
| 12 | |
Jyri Sarha | 8c17cbd | 2016-12-09 12:29:13 +0200 | [diff] [blame] | 13 | /** |
| 14 | * AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and |
| 15 | * REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame |
| 16 | * Synchronization Lost errors. The values are the biggest that work |
| 17 | * reliably with offered video modes and the memory subsystem on the |
| 18 | * boards. These register have are briefly documented in "7.3.3.5.2 |
| 19 | * Command Starvation" section of AM335x TRM. The REG_COS_COUNT_1 and |
| 20 | * REG_COS_COUNT_2 do not have any effect on current versions of |
| 21 | * AM335x. |
| 22 | */ |
| 23 | #define EMIF_OCP_CONFIG_BEAGLEBONE_BLACK 0x00141414 |
| 24 | #define EMIF_OCP_CONFIG_AM335X_EVM 0x003d3d3d |
| 25 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 26 | static inline int board_is_bone(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 27 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 28 | return board_ti_is("A335BONE"); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 29 | } |
| 30 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 31 | static inline int board_is_bone_lt(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 32 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 33 | return board_ti_is("A335BNLT"); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 34 | } |
| 35 | |
Jason Kridner | eff0c97 | 2018-03-07 05:40:41 -0500 | [diff] [blame] | 36 | static inline int board_is_pb(void) |
| 37 | { |
| 38 | return board_ti_is("A335PBGL"); |
| 39 | } |
| 40 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 41 | static inline int board_is_bbg1(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 42 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 43 | return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "BBG1", 4); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 44 | } |
| 45 | |
Koen Kooi | ad6054f | 2018-07-18 10:13:59 +0200 | [diff] [blame] | 46 | static inline int board_is_bben(void) |
| 47 | { |
| 48 | return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "SE", 2); |
| 49 | } |
| 50 | |
Lokesh Vutla | 9f7923c | 2017-06-10 13:22:56 +0530 | [diff] [blame] | 51 | static inline int board_is_beaglebonex(void) |
| 52 | { |
Koen Kooi | ad6054f | 2018-07-18 10:13:59 +0200 | [diff] [blame] | 53 | return board_is_pb() || board_is_bone() || board_is_bone_lt() || |
| 54 | board_is_bbg1() || board_is_bben(); |
Lokesh Vutla | 9f7923c | 2017-06-10 13:22:56 +0530 | [diff] [blame] | 55 | } |
| 56 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 57 | static inline int board_is_evm_sk(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 58 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 59 | return board_ti_is("A335X_SK"); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 60 | } |
| 61 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 62 | static inline int board_is_idk(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 63 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 64 | return !strncmp(board_ti_get_config(), "SKU#02", 6); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 65 | } |
| 66 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 67 | static inline int board_is_gp_evm(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 68 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 69 | return board_ti_is("A33515BB"); |
| 70 | } |
| 71 | |
| 72 | static inline int board_is_evm_15_or_later(void) |
| 73 | { |
| 74 | return (board_is_gp_evm() && |
| 75 | strncmp("1.5", board_ti_get_rev(), 3) <= 0); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 76 | } |
| 77 | |
Lokesh Vutla | a964332 | 2016-05-16 11:47:22 +0530 | [diff] [blame] | 78 | static inline int board_is_icev2(void) |
| 79 | { |
| 80 | return board_ti_is("A335_ICE") && !strncmp("2", board_ti_get_rev(), 1); |
| 81 | } |
| 82 | |
Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 83 | /* |
| 84 | * We have three pin mux functions that must exist. We must be able to enable |
| 85 | * uart0, for initial output and i2c0 to read the main EEPROM. We then have a |
| 86 | * main pinmux function that can be overridden to enable all other pinmux that |
| 87 | * is required on the board. |
| 88 | */ |
| 89 | void enable_uart0_pin_mux(void); |
Andrew Bradford | 6422b70 | 2012-10-25 08:21:30 -0400 | [diff] [blame] | 90 | void enable_uart1_pin_mux(void); |
| 91 | void enable_uart2_pin_mux(void); |
| 92 | void enable_uart3_pin_mux(void); |
| 93 | void enable_uart4_pin_mux(void); |
| 94 | void enable_uart5_pin_mux(void); |
Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 95 | void enable_i2c0_pin_mux(void); |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 96 | void enable_board_pin_mux(void); |
Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 97 | #endif |