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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChungLiew1aee1112008-01-15 14:02:49 -06002/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wanga4110ee2012-03-26 21:49:07 +00006 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew1aee1112008-01-15 14:02:49 -06007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiew1aee1112008-01-15 14:02:49 -06008 */
9
10#include <config.h>
11#include <common.h>
12#include <pci.h>
13#include <asm/immap.h>
Alison Wanga4110ee2012-03-26 21:49:07 +000014#include <asm/io.h>
TsiChungLiew1aee1112008-01-15 14:02:49 -060015
16DECLARE_GLOBAL_DATA_PTR;
17
18int checkboard(void)
19{
20 puts("Board: ");
21 puts("Freescale FireEngine 5475 EVB\n");
22 return 0;
23};
24
Simon Glassf1683aa2017-04-06 12:47:05 -060025int dram_init(void)
TsiChungLiew1aee1112008-01-15 14:02:49 -060026{
Alison Wanga4110ee2012-03-26 21:49:07 +000027 siu_t *siu = (siu_t *) (MMAP_SIU);
28 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
TsiChungLiew1aee1112008-01-15 14:02:49 -060029 u32 dramsize, i;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020030#ifdef CONFIG_SYS_DRAMSZ1
TsiChung Liew77878f12008-03-17 12:09:07 -050031 u32 temp;
32#endif
TsiChungLiew1aee1112008-01-15 14:02:49 -060033
Alison Wanga4110ee2012-03-26 21:49:07 +000034 out_be32(&siu->drv, CONFIG_SYS_SDRAM_DRVSTRENGTH);
TsiChungLiew1aee1112008-01-15 14:02:49 -060035
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020036 dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
TsiChungLiew1aee1112008-01-15 14:02:49 -060037 for (i = 0x13; i < 0x20; i++) {
38 if (dramsize == (1 << i))
39 break;
40 }
41 i--;
Alison Wanga4110ee2012-03-26 21:49:07 +000042 out_be32(&siu->cs0cfg, CONFIG_SYS_SDRAM_BASE | i);
TsiChungLiew1aee1112008-01-15 14:02:49 -060043
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020044#ifdef CONFIG_SYS_DRAMSZ1
45 temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
TsiChungLiew1aee1112008-01-15 14:02:49 -060046 for (i = 0x13; i < 0x20; i++) {
47 if (temp == (1 << i))
48 break;
49 }
50 i--;
51 dramsize += temp;
Alison Wanga4110ee2012-03-26 21:49:07 +000052 out_be32(&siu->cs1cfg, (CONFIG_SYS_SDRAM_BASE + temp) | i);
TsiChungLiew1aee1112008-01-15 14:02:49 -060053#endif
54
Alison Wanga4110ee2012-03-26 21:49:07 +000055 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
56 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChungLiew1aee1112008-01-15 14:02:49 -060057
58 /* Issue PALL */
Alison Wanga4110ee2012-03-26 21:49:07 +000059 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChungLiew1aee1112008-01-15 14:02:49 -060060
61 /* Issue LEMR */
Alison Wanga4110ee2012-03-26 21:49:07 +000062 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
63 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
TsiChungLiew1aee1112008-01-15 14:02:49 -060064
65 udelay(500);
66
67 /* Issue PALL */
Alison Wanga4110ee2012-03-26 21:49:07 +000068 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChungLiew1aee1112008-01-15 14:02:49 -060069
70 /* Perform two refresh cycles */
Alison Wanga4110ee2012-03-26 21:49:07 +000071 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
72 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChungLiew1aee1112008-01-15 14:02:49 -060073
Alison Wanga4110ee2012-03-26 21:49:07 +000074 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
TsiChungLiew1aee1112008-01-15 14:02:49 -060075
Alison Wanga4110ee2012-03-26 21:49:07 +000076 out_be32(&sdram->ctrl,
77 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
TsiChungLiew1aee1112008-01-15 14:02:49 -060078
79 udelay(100);
80
Simon Glass088454c2017-03-31 08:40:25 -060081 gd->ram_size = dramsize;
82
83 return 0;
TsiChungLiew1aee1112008-01-15 14:02:49 -060084};
85
86int testdram(void)
87{
88 /* TODO: XXX XXX XXX */
89 printf("DRAM test not implemented!\n");
90
91 return (0);
92}
93
94#if defined(CONFIG_PCI)
95/*
96 * Initialize PCI devices, report devices found.
97 */
98static struct pci_controller hose;
99extern void pci_mcf547x_8x_init(struct pci_controller *hose);
100
101void pci_init_board(void)
102{
103 pci_mcf547x_8x_init(&hose);
104}
105#endif /* CONFIG_PCI */