blob: a212f2b53921356f730c4bd28d8515b2182385b2 [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
Simon Glass24b852a2015-11-08 23:47:45 -070014#include <console.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000015#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060016#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000017#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000018#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000019#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000020#include <initcall.h>
Simon Glass96d4b752017-03-31 08:40:37 -060021#include <init_helpers.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000022#include <logbuff.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070023#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050024#include <mapmem.h>
Simon Glassa733b062013-04-26 02:53:43 +000025#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000026#include <post.h>
Simon Glasse47b2d62017-03-31 08:40:38 -060027#include <relocate.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000028#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020029#include <status_led.h>
Simon Glass1057e6c2016-02-24 09:14:50 -070030#include <timer.h>
Simon Glass71c52db2013-06-11 11:14:42 -070031#include <trace.h>
Simon Glass5a541942016-01-18 19:52:21 -070032#include <video.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000033#include <watchdog.h>
Simon Glass1fbf97d2017-03-31 08:40:39 -060034#if defined(CONFIG_MP) && defined(CONFIG_PPC)
35#include <asm/mp.h>
36#endif
Simon Glass1938f4a2013-03-11 06:49:53 +000037#include <asm/io.h>
38#include <asm/sections.h>
Simon Glassab7cd622014-07-23 06:55:04 -060039#include <dm/root.h>
Simon Glass056285f2017-03-31 08:40:35 -060040#include <linux/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000041
42/*
43 * Pointer to initial global data area
44 *
45 * Here we initialize it if needed.
46 */
47#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
48#undef XTRN_DECLARE_GLOBAL_DATA_PTR
49#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
50DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
51#else
52DECLARE_GLOBAL_DATA_PTR;
53#endif
54
55/*
Simon Glass4c509342015-04-28 20:25:03 -060056 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000057 * refactored to a single function, something like:
58 *
59 * void led_set_state(enum led_colour_t colour, int on);
60 */
61/************************************************************************
62 * Coloured LED functionality
63 ************************************************************************
64 * May be supplied by boards if desired
65 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020066__weak void coloured_LED_init(void) {}
67__weak void red_led_on(void) {}
68__weak void red_led_off(void) {}
69__weak void green_led_on(void) {}
70__weak void green_led_off(void) {}
71__weak void yellow_led_on(void) {}
72__weak void yellow_led_off(void) {}
73__weak void blue_led_on(void) {}
74__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000075
76/*
77 * Why is gd allocated a register? Prior to reloc it might be better to
78 * just pass it around to each function in this file?
79 *
80 * After reloc one could argue that it is hardly used and doesn't need
81 * to be in a register. Or if it is it should perhaps hold pointers to all
82 * global data for all modules, so that post-reloc we can avoid the massive
83 * literal pool we get on ARM. Or perhaps just encourage each module to use
84 * a structure...
85 */
86
Sonic Zhangd54d7eb2014-07-17 19:01:34 +080087#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +000088static int init_func_watchdog_init(void)
89{
Tom Riniea3310e2017-03-14 11:08:10 -040090# if defined(CONFIG_HW_WATCHDOG) && \
91 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Stefan Roese14a380a2015-03-10 08:04:36 +010092 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
Anatolij Gustschin46d7a3b2016-06-13 14:24:23 +020093 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roese14a380a2015-03-10 08:04:36 +010094 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +080095 hw_watchdog_init();
Simon Glasse4fef6c2013-03-11 14:30:42 +000096 puts(" Watchdog enabled\n");
Anatolij Gustschinba169d92016-06-13 14:24:24 +020097# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000098 WATCHDOG_RESET();
99
100 return 0;
101}
102
103int init_func_watchdog_reset(void)
104{
105 WATCHDOG_RESET();
106
107 return 0;
108}
109#endif /* CONFIG_WATCHDOG */
110
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200111__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000112{
113 /* please define platform specific board_add_ram_info() */
114}
115
Simon Glass1938f4a2013-03-11 06:49:53 +0000116static int init_baud_rate(void)
117{
118 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
119 return 0;
120}
121
122static int display_text_info(void)
123{
Ben Stoltz9b217492015-07-31 09:31:37 -0600124#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100125 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000126
Simon Glass632efa72013-03-11 07:06:48 +0000127 bss_start = (ulong)&__bss_start;
128 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100129
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800130#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100131 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800132#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100133 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800134#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100135
136 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
137 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000138#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000139
Simon Glass1938f4a2013-03-11 06:49:53 +0000140 return 0;
141}
142
143static int announce_dram_init(void)
144{
145 puts("DRAM: ");
146 return 0;
147}
148
149static int show_dram_config(void)
150{
York Sunfa39ffe2014-05-02 17:28:05 -0700151 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000152
153#ifdef CONFIG_NR_DRAM_BANKS
154 int i;
155
156 debug("\nRAM Configuration:\n");
157 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
158 size += gd->bd->bi_dram[i].size;
Bin Meng715f5992015-08-06 01:31:20 -0700159 debug("Bank #%d: %llx ", i,
160 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glass1938f4a2013-03-11 06:49:53 +0000161#ifdef DEBUG
162 print_size(gd->bd->bi_dram[i].size, "\n");
163#endif
164 }
165 debug("\nDRAM: ");
166#else
167 size = gd->ram_size;
168#endif
169
Simon Glasse4fef6c2013-03-11 14:30:42 +0000170 print_size(size, "");
171 board_add_ram_info(0);
172 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000173
174 return 0;
175}
176
Simon Glass76b00ac2017-03-31 08:40:32 -0600177__weak int dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000178{
179#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
180 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
181 gd->bd->bi_dram[0].size = get_effective_memsize();
182#endif
Simon Glass76b00ac2017-03-31 08:40:32 -0600183
184 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000185}
186
Simon Glass69153982017-05-12 21:09:56 -0600187#if defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000188static int init_func_i2c(void)
189{
190 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200191#ifdef CONFIG_SYS_I2C
192 i2c_init_all();
193#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000194 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200195#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000196 puts("ready\n");
197 return 0;
198}
199#endif
200
201#if defined(CONFIG_HARD_SPI)
202static int init_func_spi(void)
203{
204 puts("SPI: ");
205 spi_init();
206 puts("ready\n");
207 return 0;
208}
209#endif
210
211__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000212static int zero_global_data(void)
213{
214 memset((void *)gd, '\0', sizeof(gd_t));
215
216 return 0;
217}
218
219static int setup_mon_len(void)
220{
Michal Simeke945f6d2014-05-08 16:08:44 +0200221#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100222 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Ben Stoltz9b217492015-07-31 09:31:37 -0600223#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
Simon Glassa733b062013-04-26 02:53:43 +0000224 gd->mon_len = (ulong)&_end - (ulong)_init;
Tom Riniea3310e2017-03-14 11:08:10 -0400225#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800226 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Vladimir Zapolskiye2099d72016-11-28 00:15:24 +0200227#elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800228 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
Simon Glassb0b35952016-05-14 18:49:28 -0600229#elif defined(CONFIG_SYS_MONITOR_BASE)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000230 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
231 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000232#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000233 return 0;
234}
235
236__weak int arch_cpu_init(void)
237{
238 return 0;
239}
240
Paul Burton8ebf5062016-09-21 11:18:46 +0100241__weak int mach_cpu_init(void)
242{
243 return 0;
244}
245
Simon Glass1938f4a2013-03-11 06:49:53 +0000246/* Get the top of usable RAM */
247__weak ulong board_get_usable_ram_top(ulong total_size)
248{
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700249#ifdef CONFIG_SYS_SDRAM_BASE
250 /*
Simon Glass4c509342015-04-28 20:25:03 -0600251 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700252 * 32-bit address space. If so, clip the usable RAM so it doesn't.
253 */
254 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
255 /*
256 * Will wrap back to top of 32-bit space when reservations
257 * are made.
258 */
259 return 0;
260#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000261 return gd->ram_top;
262}
263
264static int setup_dest_addr(void)
265{
266 debug("Monitor len: %08lX\n", gd->mon_len);
267 /*
268 * Ram is setup, size stored in gd !!
269 */
270 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
York Sun36cc0de2017-03-06 09:02:28 -0800271#if defined(CONFIG_SYS_MEM_TOP_HIDE)
Simon Glass1938f4a2013-03-11 06:49:53 +0000272 /*
273 * Subtract specified amount of memory to hide so that it won't
274 * get "touched" at all by U-Boot. By fixing up gd->ram_size
275 * the Linux kernel should now get passed the now "corrected"
York Sun36cc0de2017-03-06 09:02:28 -0800276 * memory size and won't touch it either. This should work
277 * for arch/ppc and arch/powerpc. Only Linux board ports in
278 * arch/powerpc with bootwrapper support, that recalculate the
279 * memory size from the SDRAM controller setup will have to
280 * get fixed.
Simon Glass1938f4a2013-03-11 06:49:53 +0000281 */
York Sun36cc0de2017-03-06 09:02:28 -0800282 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
283#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000284#ifdef CONFIG_SYS_SDRAM_BASE
285 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
286#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000287 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000288 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000289 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000290 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700291#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000292 /*
293 * We need to make sure the location we intend to put secondary core
294 * boot code is reserved and not used by any part of u-boot
295 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000296 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
297 gd->relocaddr = determine_mp_bootpg(NULL);
298 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000299 }
300#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000301 return 0;
302}
303
Simon Glassb56db482017-03-31 08:40:28 -0600304#if defined(CONFIG_LOGBUFFER)
Simon Glass1938f4a2013-03-11 06:49:53 +0000305static int reserve_logbuffer(void)
306{
Simon Glassb56db482017-03-31 08:40:28 -0600307#ifndef CONFIG_ALT_LB_ADDR
Simon Glass1938f4a2013-03-11 06:49:53 +0000308 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000309 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000310 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000311 gd->relocaddr);
Simon Glassb56db482017-03-31 08:40:28 -0600312#endif
313
Simon Glass1938f4a2013-03-11 06:49:53 +0000314 return 0;
315}
316#endif
317
318#ifdef CONFIG_PRAM
319/* reserve protected RAM */
320static int reserve_pram(void)
321{
322 ulong reg;
323
324 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000325 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000326 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000327 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000328 return 0;
329}
330#endif /* CONFIG_PRAM */
331
332/* Round memory pointer down to next 4 kB limit */
333static int reserve_round_4k(void)
334{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000335 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000336 return 0;
337}
338
Simon Glass80d4bcd2017-03-31 08:40:29 -0600339#ifdef CONFIG_ARM
Simon Glass1938f4a2013-03-11 06:49:53 +0000340static int reserve_mmu(void)
341{
Simon Glass80d4bcd2017-03-31 08:40:29 -0600342#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
Simon Glass1938f4a2013-03-11 06:49:53 +0000343 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800344 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000345 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000346
347 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000348 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000349
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000350 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000351 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
352 gd->arch.tlb_addr + gd->arch.tlb_size);
York Sun50e93b92016-06-24 16:46:19 -0700353
354#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
355 /*
356 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
357 * with location within secure ram.
358 */
359 gd->arch.tlb_allocated = gd->arch.tlb_addr;
360#endif
Simon Glass80d4bcd2017-03-31 08:40:29 -0600361#endif
York Sun50e93b92016-06-24 16:46:19 -0700362
Simon Glass1938f4a2013-03-11 06:49:53 +0000363 return 0;
364}
365#endif
366
Simon Glass5a541942016-01-18 19:52:21 -0700367static int reserve_video(void)
368{
Simon Glass0f079eb2017-03-31 08:40:30 -0600369#ifdef CONFIG_DM_VIDEO
Simon Glass5a541942016-01-18 19:52:21 -0700370 ulong addr;
371 int ret;
372
373 addr = gd->relocaddr;
374 ret = video_reserve(&addr);
375 if (ret)
376 return ret;
377 gd->relocaddr = addr;
Simon Glass0f079eb2017-03-31 08:40:30 -0600378#elif defined(CONFIG_LCD)
Simon Glass5a541942016-01-18 19:52:21 -0700379# ifdef CONFIG_FB_ADDR
Simon Glass1938f4a2013-03-11 06:49:53 +0000380 gd->fb_base = CONFIG_FB_ADDR;
Simon Glass5a541942016-01-18 19:52:21 -0700381# else
Simon Glass1938f4a2013-03-11 06:49:53 +0000382 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000383 gd->relocaddr = lcd_setmem(gd->relocaddr);
384 gd->fb_base = gd->relocaddr;
Simon Glass5a541942016-01-18 19:52:21 -0700385# endif /* CONFIG_FB_ADDR */
Simon Glass0f079eb2017-03-31 08:40:30 -0600386#elif defined(CONFIG_VIDEO) && \
387 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
Simon Glass8703ef32016-01-18 19:52:20 -0700388 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
Tom Riniea3310e2017-03-14 11:08:10 -0400389 !defined(CONFIG_M68K)
Simon Glass8703ef32016-01-18 19:52:20 -0700390 /* reserve memory for video display (always full pages) */
391 gd->relocaddr = video_setmem(gd->relocaddr);
392 gd->fb_base = gd->relocaddr;
Simon Glass0f079eb2017-03-31 08:40:30 -0600393#endif
Simon Glass8703ef32016-01-18 19:52:20 -0700394
395 return 0;
396}
Simon Glass8703ef32016-01-18 19:52:20 -0700397
Simon Glass71c52db2013-06-11 11:14:42 -0700398static int reserve_trace(void)
399{
400#ifdef CONFIG_TRACE
401 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
402 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
403 debug("Reserving %dk for trace data at: %08lx\n",
404 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
405#endif
406
407 return 0;
408}
409
Simon Glass1938f4a2013-03-11 06:49:53 +0000410static int reserve_uboot(void)
411{
412 /*
413 * reserve memory for U-Boot code, data & bss
414 * round down to next 4 kB limit
415 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000416 gd->relocaddr -= gd->mon_len;
417 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000418#ifdef CONFIG_E500
419 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000420 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000421#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000422
423 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000424 gd->relocaddr);
425
426 gd->start_addr_sp = gd->relocaddr;
427
Simon Glass1938f4a2013-03-11 06:49:53 +0000428 return 0;
429}
430
431/* reserve memory for malloc() area */
432static int reserve_malloc(void)
433{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000434 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000435 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000436 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000437 return 0;
438}
439
440/* (permanently) allocate a Board Info struct */
441static int reserve_board(void)
442{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800443 if (!gd->bd) {
444 gd->start_addr_sp -= sizeof(bd_t);
445 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
446 memset(gd->bd, '\0', sizeof(bd_t));
447 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
448 sizeof(bd_t), gd->start_addr_sp);
449 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000450 return 0;
451}
452
453static int setup_machine(void)
454{
455#ifdef CONFIG_MACH_TYPE
456 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
457#endif
458 return 0;
459}
460
461static int reserve_global_data(void)
462{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000463 gd->start_addr_sp -= sizeof(gd_t);
464 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000465 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000466 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000467 return 0;
468}
469
470static int reserve_fdt(void)
471{
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100472#ifndef CONFIG_OF_EMBED
Simon Glass1938f4a2013-03-11 06:49:53 +0000473 /*
Simon Glass4c509342015-04-28 20:25:03 -0600474 * If the device tree is sitting immediately above our image then we
Simon Glass1938f4a2013-03-11 06:49:53 +0000475 * must relocate it. If it is embedded in the data section, then it
476 * will be relocated with other data.
477 */
478 if (gd->fdt_blob) {
479 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
480
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000481 gd->start_addr_sp -= gd->fdt_size;
482 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000483 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000484 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000485 }
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100486#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000487
488 return 0;
489}
490
Andreas Bießmann68145d42015-02-06 23:06:45 +0100491int arch_reserve_stacks(void)
492{
493 return 0;
494}
495
Simon Glass1938f4a2013-03-11 06:49:53 +0000496static int reserve_stacks(void)
497{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100498 /* make stack pointer 16-byte aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000499 gd->start_addr_sp -= 16;
500 gd->start_addr_sp &= ~0xf;
Simon Glass1938f4a2013-03-11 06:49:53 +0000501
502 /*
Simon Glass4c509342015-04-28 20:25:03 -0600503 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100504 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000505 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100506 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000507}
508
509static int display_new_sp(void)
510{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000511 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000512
513 return 0;
514}
515
Vladimir Zapolskiye2099d72016-11-28 00:15:24 +0200516#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
517 defined(CONFIG_SH)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000518static int setup_board_part1(void)
519{
520 bd_t *bd = gd->bd;
521
522 /*
523 * Save local variables to board info struct
524 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000525 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
526 bd->bi_memsize = gd->ram_size; /* size in bytes */
527
528#ifdef CONFIG_SYS_SRAM_BASE
529 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
530 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
531#endif
532
Masahiro Yamada58dac322014-03-05 17:40:10 +0900533#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000534 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
535 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
536#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100537#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000538 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
539#endif
540#if defined(CONFIG_MPC83xx)
541 bd->bi_immrbar = CONFIG_SYS_IMMR;
542#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000543
544 return 0;
545}
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100546#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000547
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100548#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000549static int setup_board_part2(void)
550{
551 bd_t *bd = gd->bd;
552
553 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
554 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
555#if defined(CONFIG_CPM2)
556 bd->bi_cpmfreq = gd->arch.cpm_clk;
557 bd->bi_brgfreq = gd->arch.brg_clk;
558 bd->bi_sccfreq = gd->arch.scc_clk;
559 bd->bi_vco = gd->arch.vco_out;
560#endif /* CONFIG_CPM2 */
561#if defined(CONFIG_MPC512X)
562 bd->bi_ipsfreq = gd->arch.ips_clk;
563#endif /* CONFIG_MPC512X */
564#if defined(CONFIG_MPC5xxx)
565 bd->bi_ipbfreq = gd->arch.ipb_clk;
566 bd->bi_pcifreq = gd->pci_clk;
567#endif /* CONFIG_MPC5xxx */
Alison Wang1313db42015-02-12 18:33:15 +0800568#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
569 bd->bi_pcifreq = gd->pci_clk;
570#endif
571#if defined(CONFIG_EXTRA_CLOCK)
572 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
573 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
574 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
575#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000576
577 return 0;
578}
579#endif
580
Simon Glass1938f4a2013-03-11 06:49:53 +0000581#ifdef CONFIG_POST
582static int init_post(void)
583{
584 post_bootmode_init();
585 post_run(NULL, POST_ROM | post_bootmode_get(0));
586
587 return 0;
588}
589#endif
590
Simon Glass1938f4a2013-03-11 06:49:53 +0000591static int reloc_fdt(void)
592{
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100593#ifndef CONFIG_OF_EMBED
Simon Glassf05ad9b2015-08-04 12:33:39 -0600594 if (gd->flags & GD_FLG_SKIP_RELOC)
595 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000596 if (gd->new_fdt) {
597 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
598 gd->fdt_blob = gd->new_fdt;
599 }
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100600#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000601
602 return 0;
603}
604
605static int setup_reloc(void)
606{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600607 if (gd->flags & GD_FLG_SKIP_RELOC) {
608 debug("Skipping relocation due to flag\n");
609 return 0;
610 }
611
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800612#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000613 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100614#ifdef CONFIG_M68K
615 /*
616 * On all ColdFire arch cpu, monitor code starts always
617 * just after the default vector table location, so at 0x400
618 */
619 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
620#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800621#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000622 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
623
624 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000625 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000626 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
627 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000628
629 return 0;
630}
631
mario.six@gdsys.cc2a792752017-02-22 16:07:22 +0100632#ifdef CONFIG_OF_BOARD_FIXUP
633static int fix_fdt(void)
634{
635 return board_fix_fdt((void *)gd->fdt_blob);
636}
637#endif
638
Simon Glass1938f4a2013-03-11 06:49:53 +0000639/* ARM calls relocate_code from its crt0.S */
Simon Glass530f27e2017-01-16 07:03:49 -0700640#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
641 !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000642
643static int jump_to_copy(void)
644{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600645 if (gd->flags & GD_FLG_SKIP_RELOC)
646 return 0;
Simon Glass48a33802013-03-05 14:39:52 +0000647 /*
648 * x86 is special, but in a nice way. It uses a trampoline which
649 * enables the dcache if possible.
650 *
651 * For now, other archs use relocate_code(), which is implemented
652 * similarly for all archs. When we do generic relocation, hopefully
653 * we can make all archs enable the dcache prior to relocation.
654 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300655#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000656 /*
657 * SDRAM and console are now initialised. The final stack can now
658 * be setup in SDRAM. Code execution will continue in Flash, but
659 * with the stack in SDRAM and Global Data in temporary memory
660 * (CPU cache)
661 */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600662 arch_setup_gd(gd->new_gd);
Simon Glass48a33802013-03-05 14:39:52 +0000663 board_init_f_r_trampoline(gd->start_addr_sp);
664#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000665 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000666#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000667
668 return 0;
669}
670#endif
671
672/* Record the board_init_f() bootstage (after arch_cpu_init()) */
673static int mark_bootstage(void)
674{
675 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
676
677 return 0;
678}
679
Simon Glass9854a872015-11-08 23:47:48 -0700680static int initf_console_record(void)
681{
682#if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
683 return console_record_init();
684#else
685 return 0;
686#endif
687}
688
Simon Glassab7cd622014-07-23 06:55:04 -0600689static int initf_dm(void)
690{
691#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
692 int ret;
693
694 ret = dm_init_and_scan(true);
695 if (ret)
696 return ret;
697#endif
Simon Glass1057e6c2016-02-24 09:14:50 -0700698#ifdef CONFIG_TIMER_EARLY
699 ret = dm_timer_init();
700 if (ret)
701 return ret;
702#endif
Simon Glassab7cd622014-07-23 06:55:04 -0600703
704 return 0;
705}
706
Simon Glass146251f2015-01-19 22:16:12 -0700707/* Architecture-specific memory reservation */
708__weak int reserve_arch(void)
709{
710 return 0;
711}
712
Simon Glassd4c671c2015-03-05 12:25:16 -0700713__weak int arch_cpu_init_dm(void)
714{
715 return 0;
716}
717
Simon Glass4acff452017-01-16 07:03:50 -0700718static const init_fnc_t init_sequence_f[] = {
Simon Glass1938f4a2013-03-11 06:49:53 +0000719 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700720#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700721 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700722#endif
Kevin Hilmand2107182014-12-09 15:03:58 -0800723#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700724 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800725#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700726 initf_malloc,
Simon Glass9854a872015-11-08 23:47:48 -0700727 initf_console_record,
Simon Glass671549e2017-03-28 10:27:18 -0600728#if defined(CONFIG_HAVE_FSP)
729 arch_fsp_init,
Bin Menga52a068e2015-08-20 06:40:18 -0700730#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000731 arch_cpu_init, /* basic arch cpu dependent setup */
Paul Burton8ebf5062016-09-21 11:18:46 +0100732 mach_cpu_init, /* SoC/machine dependent CPU setup */
Simon Glass3ea09532014-09-03 17:36:59 -0600733 initf_dm,
Simon Glassd4c671c2015-03-05 12:25:16 -0700734 arch_cpu_init_dm,
Thomas Chou67521952015-10-30 15:35:51 +0800735 mark_bootstage, /* need timer, go after init dm */
Simon Glass1938f4a2013-03-11 06:49:53 +0000736#if defined(CONFIG_BOARD_EARLY_INIT_F)
737 board_early_init_f,
738#endif
Simon Glass727e94a2017-03-28 10:27:26 -0600739#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
Simon Glassc252c062017-03-28 10:27:19 -0600740 /* get CPU and bus clocks according to the environment variable */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000741 get_clocks, /* get CPU and bus clocks (etc.) */
Simon Glass1793e782017-03-28 10:27:23 -0600742#endif
Angelo Dureghello0ce45282017-05-10 23:58:06 +0200743#if !defined(CONFIG_M68K)
Simon Glass1938f4a2013-03-11 06:49:53 +0000744 timer_init, /* initialize timer */
Angelo Dureghello0ce45282017-05-10 23:58:06 +0200745#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000746#if defined(CONFIG_BOARD_POSTCLK_INIT)
747 board_postclk_init,
748#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000749 env_init, /* initialize environment */
750 init_baud_rate, /* initialze baudrate settings */
751 serial_init, /* serial communications setup */
752 console_init_f, /* stage 1 init of console */
753 display_options, /* say that we are here */
754 display_text_info, /* show debugging info if required */
Simon Glass76d1d022017-03-28 10:27:30 -0600755#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
756 defined(CONFIG_X86)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000757 checkcpu,
758#endif
Simon Glasscc664002017-01-23 13:31:25 -0700759#if defined(CONFIG_DISPLAY_CPUINFO)
Simon Glass1938f4a2013-03-11 06:49:53 +0000760 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasscc664002017-01-23 13:31:25 -0700761#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000762#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900763 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000764#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000765 INIT_FUNC_WATCHDOG_INIT
766#if defined(CONFIG_MISC_INIT_F)
767 misc_init_f,
768#endif
769 INIT_FUNC_WATCHDOG_RESET
Simon Glass69153982017-05-12 21:09:56 -0600770#if defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000771 init_func_i2c,
772#endif
773#if defined(CONFIG_HARD_SPI)
774 init_func_spi,
775#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000776 announce_dram_init,
Simon Glass1938f4a2013-03-11 06:49:53 +0000777 dram_init, /* configure available RAM banks */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000778#ifdef CONFIG_POST
779 post_init_f,
780#endif
781 INIT_FUNC_WATCHDOG_RESET
782#if defined(CONFIG_SYS_DRAM_TEST)
783 testdram,
784#endif /* CONFIG_SYS_DRAM_TEST */
785 INIT_FUNC_WATCHDOG_RESET
786
Simon Glass1938f4a2013-03-11 06:49:53 +0000787#ifdef CONFIG_POST
788 init_post,
789#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000790 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000791 /*
792 * Now that we have DRAM mapped and working, we can
793 * relocate the code and continue running from DRAM.
794 *
795 * Reserve memory at end of RAM for (top down in that order):
796 * - area that won't get touched by U-Boot and Linux (optional)
797 * - kernel log buffer
798 * - protected RAM
799 * - LCD framebuffer
800 * - monitor code
801 * - board info struct
802 */
803 setup_dest_addr,
Simon Glassb56db482017-03-31 08:40:28 -0600804#if defined(CONFIG_LOGBUFFER)
Simon Glass1938f4a2013-03-11 06:49:53 +0000805 reserve_logbuffer,
806#endif
807#ifdef CONFIG_PRAM
808 reserve_pram,
809#endif
810 reserve_round_4k,
Simon Glass80d4bcd2017-03-31 08:40:29 -0600811#ifdef CONFIG_ARM
Simon Glass1938f4a2013-03-11 06:49:53 +0000812 reserve_mmu,
813#endif
Simon Glass5a541942016-01-18 19:52:21 -0700814 reserve_video,
Simon Glass8703ef32016-01-18 19:52:20 -0700815 reserve_trace,
Simon Glass1938f4a2013-03-11 06:49:53 +0000816 reserve_uboot,
817 reserve_malloc,
818 reserve_board,
Simon Glass1938f4a2013-03-11 06:49:53 +0000819 setup_machine,
820 reserve_global_data,
821 reserve_fdt,
Simon Glass146251f2015-01-19 22:16:12 -0700822 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000823 reserve_stacks,
Simon Glass76b00ac2017-03-31 08:40:32 -0600824 dram_init_banksize,
Simon Glass1938f4a2013-03-11 06:49:53 +0000825 show_dram_config,
Vladimir Zapolskiye2099d72016-11-28 00:15:24 +0200826#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
827 defined(CONFIG_SH)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000828 setup_board_part1,
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100829#endif
830#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000831 INIT_FUNC_WATCHDOG_RESET
832 setup_board_part2,
833#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000834 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000835#ifdef CONFIG_SYS_EXTBDINFO
836 setup_board_extra,
837#endif
mario.six@gdsys.cc2a792752017-02-22 16:07:22 +0100838#ifdef CONFIG_OF_BOARD_FIXUP
839 fix_fdt,
840#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000841 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000842 reloc_fdt,
843 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300844#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -0700845 copy_uboot_to_ram,
Simon Glass313aef32015-01-01 16:18:09 -0700846 do_elf_reloc_fixups,
Simon Glass6bda55a2017-01-16 07:03:52 -0700847 clear_bss,
Simon Glass313aef32015-01-01 16:18:09 -0700848#endif
Chris Zankelde5e5ce2016-08-10 18:36:43 +0300849#if defined(CONFIG_XTENSA)
850 clear_bss,
851#endif
Simon Glass530f27e2017-01-16 07:03:49 -0700852#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
853 !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000854 jump_to_copy,
855#endif
856 NULL,
857};
858
859void board_init_f(ulong boot_flags)
860{
York Sun2a1680e2014-05-02 17:28:04 -0700861#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
862 /*
Robert P. J. Dayfc0b5942016-09-07 14:27:59 -0400863 * For some architectures, global data is initialized and used before
York Sun2a1680e2014-05-02 17:28:04 -0700864 * calling this function. The data should be preserved. For others,
865 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
866 * here to host global data until relocation.
867 */
Simon Glass1938f4a2013-03-11 06:49:53 +0000868 gd_t data;
869
870 gd = &data;
871
David Fengcce6be72013-12-14 11:47:36 +0800872 /*
873 * Clear global data before it is accessed at debug print
874 * in initcall_run_list. Otherwise the debug print probably
Robert P. J. Dayfc0b5942016-09-07 14:27:59 -0400875 * get the wrong value of gd->have_console.
David Fengcce6be72013-12-14 11:47:36 +0800876 */
David Fengcce6be72013-12-14 11:47:36 +0800877 zero_global_data();
878#endif
879
Simon Glass1938f4a2013-03-11 06:49:53 +0000880 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +0400881 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000882
883 if (initcall_run_list(init_sequence_f))
884 hang();
885
Ben Stoltz9b217492015-07-31 09:31:37 -0600886#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
Simon Glass530f27e2017-01-16 07:03:49 -0700887 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000888 /* NOTREACHED - jump_to_copy() does not return */
889 hang();
890#endif
891}
892
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300893#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000894/*
895 * For now this code is only used on x86.
896 *
897 * init_sequence_f_r is the list of init functions which are run when
898 * U-Boot is executing from Flash with a semi-limited 'C' environment.
899 * The following limitations must be considered when implementing an
900 * '_f_r' function:
901 * - 'static' variables are read-only
902 * - Global Data (gd->xxx) is read/write
903 *
904 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
905 * supported). It _should_, if possible, copy global data to RAM and
906 * initialise the CPU caches (to speed up the relocation process)
907 *
908 * NOTE: At present only x86 uses this route, but it is intended that
909 * all archs will move to this when generic relocation is implemented.
910 */
Simon Glass4acff452017-01-16 07:03:50 -0700911static const init_fnc_t init_sequence_f_r[] = {
Simon Glass530f27e2017-01-16 07:03:49 -0700912#if !CONFIG_IS_ENABLED(X86_64)
Simon Glass48a33802013-03-05 14:39:52 +0000913 init_cache_f_r,
Simon Glass530f27e2017-01-16 07:03:49 -0700914#endif
Simon Glass48a33802013-03-05 14:39:52 +0000915
916 NULL,
917};
918
919void board_init_f_r(void)
920{
921 if (initcall_run_list(init_sequence_f_r))
922 hang();
923
924 /*
Simon Glasse4d6ab02016-03-11 22:06:51 -0700925 * The pre-relocation drivers may be using memory that has now gone
926 * away. Mark serial as unavailable - this will fall back to the debug
927 * UART if available.
928 */
929 gd->flags &= ~GD_FLG_SERIAL_READY;
930
931 /*
Simon Glass48a33802013-03-05 14:39:52 +0000932 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
933 * Transfer execution from Flash to RAM by calculating the address
934 * of the in-RAM copy of board_init_r() and calling it
935 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +0300936 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000937
938 /* NOTREACHED - board_init_r() does not return */
939 hang();
940}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +0300941#endif /* CONFIG_X86 */