Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> |
| 4 | * Copyright (C) 2010 Freescale Semiconductor, Inc. |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Marek Vasut | 7f2c10e | 2021-03-31 12:28:03 +0200 | [diff] [blame] | 8 | #include <clk.h> |
Simon Glass | f7ae49f | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 9 | #include <log.h> |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 10 | #include <usb.h> |
| 11 | #include <errno.h> |
Mateusz Kulikowski | 8c25c25 | 2016-01-23 11:54:32 +0100 | [diff] [blame] | 12 | #include <wait_bit.h> |
Simon Glass | 401d1c4 | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 13 | #include <asm/global_data.h> |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 14 | #include <linux/compiler.h> |
Simon Glass | c05ed00 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 15 | #include <linux/delay.h> |
Mateusz Kulikowski | e162c6b | 2016-03-31 23:12:23 +0200 | [diff] [blame] | 16 | #include <usb/ehci-ci.h> |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 17 | #include <asm/io.h> |
| 18 | #include <asm/arch/imx-regs.h> |
| 19 | #include <asm/arch/clock.h> |
Stefano Babic | 552a848 | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 20 | #include <asm/mach-imx/iomux-v3.h> |
| 21 | #include <asm/mach-imx/sys_proto.h> |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 22 | #include <dm.h> |
Simon Glass | c62db35 | 2017-05-31 19:47:48 -0600 | [diff] [blame] | 23 | #include <asm/mach-types.h> |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 24 | #include <power/regulator.h> |
Adam Ford | 69535b3 | 2019-04-03 08:41:56 -0500 | [diff] [blame] | 25 | #include <linux/usb/otg.h> |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 26 | |
| 27 | #include "ehci.h" |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 28 | |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 29 | DECLARE_GLOBAL_DATA_PTR; |
| 30 | |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 31 | #define USB_OTGREGS_OFFSET 0x000 |
| 32 | #define USB_H1REGS_OFFSET 0x200 |
| 33 | #define USB_H2REGS_OFFSET 0x400 |
| 34 | #define USB_H3REGS_OFFSET 0x600 |
| 35 | #define USB_OTHERREGS_OFFSET 0x800 |
| 36 | |
| 37 | #define USB_H1_CTRL_OFFSET 0x04 |
| 38 | |
| 39 | #define USBPHY_CTRL 0x00000030 |
| 40 | #define USBPHY_CTRL_SET 0x00000034 |
| 41 | #define USBPHY_CTRL_CLR 0x00000038 |
| 42 | #define USBPHY_CTRL_TOG 0x0000003c |
| 43 | |
| 44 | #define USBPHY_PWD 0x00000000 |
| 45 | #define USBPHY_CTRL_SFTRST 0x80000000 |
| 46 | #define USBPHY_CTRL_CLKGATE 0x40000000 |
| 47 | #define USBPHY_CTRL_ENUTMILEVEL3 0x00008000 |
| 48 | #define USBPHY_CTRL_ENUTMILEVEL2 0x00004000 |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 49 | #define USBPHY_CTRL_OTG_ID 0x08000000 |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 50 | |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 51 | #define ANADIG_USB2_CHRG_DETECT_EN_B 0x00100000 |
| 52 | #define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B 0x00080000 |
| 53 | |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 54 | #define ANADIG_USB2_PLL_480_CTRL_BYPASS 0x00010000 |
| 55 | #define ANADIG_USB2_PLL_480_CTRL_ENABLE 0x00002000 |
| 56 | #define ANADIG_USB2_PLL_480_CTRL_POWER 0x00001000 |
| 57 | #define ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS 0x00000040 |
| 58 | |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 59 | #define USBNC_OFFSET 0x200 |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 60 | #define USBNC_PHY_STATUS_OFFSET 0x23C |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 61 | #define USBNC_PHYSTATUS_ID_DIG (1 << 4) /* otg_id status */ |
| 62 | #define USBNC_PHYCFG2_ACAENB (1 << 4) /* otg_id detection enable */ |
Stefan Agner | 9a88180 | 2016-07-13 00:25:37 -0700 | [diff] [blame] | 63 | #define UCTRL_PWR_POL (1 << 9) /* OTG Polarity of Power Pin */ |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 64 | #define UCTRL_OVER_CUR_POL (1 << 8) /* OTG Polarity of Overcurrent */ |
| 65 | #define UCTRL_OVER_CUR_DIS (1 << 7) /* Disable OTG Overcurrent Detection */ |
| 66 | |
| 67 | /* USBCMD */ |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 68 | #define UCMD_RUN_STOP (1 << 0) /* controller run/stop */ |
| 69 | #define UCMD_RESET (1 << 1) /* controller reset */ |
| 70 | |
Marek Vasut | 598fa7e | 2021-03-31 22:19:00 +0200 | [diff] [blame] | 71 | /* Base address for this IP block is 0x02184800 */ |
| 72 | struct usbnc_regs { |
| 73 | u32 ctrl[4]; /* otg/host1-3 */ |
| 74 | u32 uh2_hsic_ctrl; |
| 75 | u32 uh3_hsic_ctrl; |
| 76 | u32 otg_phy_ctrl_0; |
| 77 | u32 uh1_phy_ctrl_0; |
| 78 | u32 reserve1[4]; |
| 79 | u32 phy_cfg1; |
| 80 | u32 phy_cfg2; |
| 81 | u32 reserve2; |
| 82 | u32 phy_status; |
| 83 | u32 reserve3[4]; |
| 84 | u32 adp_cfg1; |
| 85 | u32 adp_cfg2; |
| 86 | u32 adp_status; |
| 87 | }; |
| 88 | |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 89 | #if defined(CONFIG_MX6) && !defined(CONFIG_PHY) |
| 90 | static void usb_power_config_mx6(struct anatop_regs __iomem *anatop, |
| 91 | int anatop_bits_index) |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 92 | { |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 93 | void __iomem *chrg_detect; |
| 94 | void __iomem *pll_480_ctrl_clr; |
| 95 | void __iomem *pll_480_ctrl_set; |
| 96 | |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 97 | if (!is_mx6()) |
| 98 | return; |
| 99 | |
| 100 | switch (anatop_bits_index) { |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 101 | case 0: |
| 102 | chrg_detect = &anatop->usb1_chrg_detect; |
| 103 | pll_480_ctrl_clr = &anatop->usb1_pll_480_ctrl_clr; |
| 104 | pll_480_ctrl_set = &anatop->usb1_pll_480_ctrl_set; |
| 105 | break; |
| 106 | case 1: |
| 107 | chrg_detect = &anatop->usb2_chrg_detect; |
| 108 | pll_480_ctrl_clr = &anatop->usb2_pll_480_ctrl_clr; |
| 109 | pll_480_ctrl_set = &anatop->usb2_pll_480_ctrl_set; |
| 110 | break; |
| 111 | default: |
| 112 | return; |
| 113 | } |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 114 | /* |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 115 | * Some phy and power's special controls |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 116 | * 1. The external charger detector needs to be disabled |
| 117 | * or the signal at DP will be poor |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 118 | * 2. The PLL's power and output to usb |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 119 | * is totally controlled by IC, so the Software only needs |
| 120 | * to enable them at initializtion. |
| 121 | */ |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 122 | writel(ANADIG_USB2_CHRG_DETECT_EN_B | |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 123 | ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B, |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 124 | chrg_detect); |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 125 | |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 126 | writel(ANADIG_USB2_PLL_480_CTRL_BYPASS, |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 127 | pll_480_ctrl_clr); |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 128 | |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 129 | writel(ANADIG_USB2_PLL_480_CTRL_ENABLE | |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 130 | ANADIG_USB2_PLL_480_CTRL_POWER | |
| 131 | ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS, |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 132 | pll_480_ctrl_set); |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 133 | } |
| 134 | #else |
| 135 | static void __maybe_unused |
| 136 | usb_power_config_mx6(void *anatop, int anatop_bits_index) { } |
Ye Li | 235f5e1 | 2019-10-24 10:29:32 -0300 | [diff] [blame] | 137 | #endif |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 138 | |
| 139 | #if defined(CONFIG_MX7) && !defined(CONFIG_PHY) |
| 140 | static void usb_power_config_mx7(struct usbnc_regs *usbnc) |
| 141 | { |
| 142 | void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2); |
| 143 | |
| 144 | if (!is_mx7()) |
| 145 | return; |
| 146 | |
| 147 | /* |
| 148 | * Clear the ACAENB to enable usb_otg_id detection, |
| 149 | * otherwise it is the ACA detection enabled. |
| 150 | */ |
| 151 | clrbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB); |
| 152 | } |
| 153 | #else |
| 154 | static void __maybe_unused |
| 155 | usb_power_config_mx7(void *usbnc) { } |
| 156 | #endif |
| 157 | |
| 158 | #if defined(CONFIG_MX7ULP) && !defined(CONFIG_PHY) |
| 159 | static void usb_power_config_mx7ulp(struct usbphy_regs __iomem *usbphy) |
| 160 | { |
| 161 | if (!is_mx7ulp()) |
| 162 | return; |
| 163 | |
| 164 | writel(ANADIG_USB2_CHRG_DETECT_EN_B | |
| 165 | ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B, |
| 166 | &usbphy->usb1_chrg_detect); |
| 167 | |
| 168 | scg_enable_usb_pll(true); |
| 169 | } |
| 170 | #else |
| 171 | static void __maybe_unused |
| 172 | usb_power_config_mx7ulp(void *usbphy) { } |
| 173 | #endif |
| 174 | |
| 175 | #if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) |
| 176 | static const unsigned phy_bases[] = { |
| 177 | USB_PHY0_BASE_ADDR, |
| 178 | #if defined(USB_PHY1_BASE_ADDR) |
| 179 | USB_PHY1_BASE_ADDR, |
| 180 | #endif |
| 181 | }; |
| 182 | |
| 183 | #if !defined(CONFIG_PHY) |
| 184 | static void usb_internal_phy_clock_gate(void __iomem *phy_reg, int on) |
| 185 | { |
| 186 | phy_reg += on ? USBPHY_CTRL_CLR : USBPHY_CTRL_SET; |
| 187 | writel(USBPHY_CTRL_CLKGATE, phy_reg); |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 188 | } |
| 189 | |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 190 | /* Return 0 : host node, <>0 : device mode */ |
Marek Vasut | eb64f59 | 2021-03-31 22:10:35 +0200 | [diff] [blame] | 191 | static int usb_phy_enable(struct usb_ehci *ehci, void __iomem *phy_reg) |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 192 | { |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 193 | void __iomem *phy_ctrl; |
| 194 | void __iomem *usb_cmd; |
Adrian Alonso | f0c89d5 | 2015-08-06 15:46:03 -0500 | [diff] [blame] | 195 | int ret; |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 196 | |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 197 | phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL); |
| 198 | usb_cmd = (void __iomem *)&ehci->usbcmd; |
| 199 | |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 200 | /* Stop then Reset */ |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 201 | clrbits_le32(usb_cmd, UCMD_RUN_STOP); |
Álvaro Fernández Rojas | 4826350 | 2018-01-23 17:14:55 +0100 | [diff] [blame] | 202 | ret = wait_for_bit_le32(usb_cmd, UCMD_RUN_STOP, false, 10000, false); |
Adrian Alonso | f0c89d5 | 2015-08-06 15:46:03 -0500 | [diff] [blame] | 203 | if (ret) |
| 204 | return ret; |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 205 | |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 206 | setbits_le32(usb_cmd, UCMD_RESET); |
Álvaro Fernández Rojas | 4826350 | 2018-01-23 17:14:55 +0100 | [diff] [blame] | 207 | ret = wait_for_bit_le32(usb_cmd, UCMD_RESET, false, 10000, false); |
Adrian Alonso | f0c89d5 | 2015-08-06 15:46:03 -0500 | [diff] [blame] | 208 | if (ret) |
| 209 | return ret; |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 210 | |
| 211 | /* Reset USBPHY module */ |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 212 | setbits_le32(phy_ctrl, USBPHY_CTRL_SFTRST); |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 213 | udelay(10); |
| 214 | |
| 215 | /* Remove CLKGATE and SFTRST */ |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 216 | clrbits_le32(phy_ctrl, USBPHY_CTRL_CLKGATE | USBPHY_CTRL_SFTRST); |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 217 | udelay(10); |
| 218 | |
| 219 | /* Power up the PHY */ |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 220 | writel(0, phy_reg + USBPHY_PWD); |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 221 | /* enable FS/LS device */ |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 222 | setbits_le32(phy_ctrl, USBPHY_CTRL_ENUTMILEVEL2 | |
| 223 | USBPHY_CTRL_ENUTMILEVEL3); |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 224 | |
Peng Fan | 229dbba | 2014-11-10 08:50:39 +0800 | [diff] [blame] | 225 | return 0; |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 226 | } |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 227 | #endif |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 228 | |
Peng Fan | 229dbba | 2014-11-10 08:50:39 +0800 | [diff] [blame] | 229 | int usb_phy_mode(int port) |
| 230 | { |
| 231 | void __iomem *phy_reg; |
| 232 | void __iomem *phy_ctrl; |
| 233 | u32 val; |
| 234 | |
| 235 | phy_reg = (void __iomem *)phy_bases[port]; |
| 236 | phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL); |
| 237 | |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 238 | val = readl(phy_ctrl); |
Peng Fan | 229dbba | 2014-11-10 08:50:39 +0800 | [diff] [blame] | 239 | |
| 240 | if (val & USBPHY_CTRL_OTG_ID) |
| 241 | return USB_INIT_DEVICE; |
| 242 | else |
| 243 | return USB_INIT_HOST; |
| 244 | } |
| 245 | |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 246 | #elif defined(CONFIG_MX7) |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 247 | int usb_phy_mode(int port) |
| 248 | { |
| 249 | struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR + |
| 250 | (0x10000 * port) + USBNC_OFFSET); |
| 251 | void __iomem *status = (void __iomem *)(&usbnc->phy_status); |
| 252 | u32 val; |
| 253 | |
| 254 | val = readl(status); |
| 255 | |
| 256 | if (val & USBNC_PHYSTATUS_ID_DIG) |
| 257 | return USB_INIT_DEVICE; |
| 258 | else |
| 259 | return USB_INIT_HOST; |
| 260 | } |
| 261 | #endif |
| 262 | |
| 263 | static void usb_oc_config(int index) |
| 264 | { |
| 265 | #if defined(CONFIG_MX6) |
| 266 | struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR + |
| 267 | USB_OTHERREGS_OFFSET); |
Ye Li | 235f5e1 | 2019-10-24 10:29:32 -0300 | [diff] [blame] | 268 | #elif defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 269 | struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR + |
| 270 | (0x10000 * index) + USBNC_OFFSET); |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 271 | #endif |
Marek Vasut | 598fa7e | 2021-03-31 22:19:00 +0200 | [diff] [blame] | 272 | void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]); |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 273 | |
| 274 | #if CONFIG_MACH_TYPE == MACH_TYPE_MX6Q_ARM2 |
| 275 | /* mx6qarm2 seems to required a different setting*/ |
| 276 | clrbits_le32(ctrl, UCTRL_OVER_CUR_POL); |
| 277 | #else |
| 278 | setbits_le32(ctrl, UCTRL_OVER_CUR_POL); |
| 279 | #endif |
| 280 | |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 281 | setbits_le32(ctrl, UCTRL_OVER_CUR_DIS); |
Ye Li | 235f5e1 | 2019-10-24 10:29:32 -0300 | [diff] [blame] | 282 | |
| 283 | /* Set power polarity to high active */ |
| 284 | #ifdef CONFIG_MXC_USB_OTG_HACTIVE |
| 285 | setbits_le32(ctrl, UCTRL_PWR_POL); |
| 286 | #else |
| 287 | clrbits_le32(ctrl, UCTRL_PWR_POL); |
| 288 | #endif |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 289 | } |
| 290 | |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 291 | #if !CONFIG_IS_ENABLED(DM_USB) |
Adrian Alonso | 74f0610 | 2015-08-06 15:43:16 -0500 | [diff] [blame] | 292 | /** |
Stefan Agner | 79d867c | 2016-05-05 16:59:12 -0700 | [diff] [blame] | 293 | * board_usb_phy_mode - override usb phy mode |
Adrian Alonso | 74f0610 | 2015-08-06 15:43:16 -0500 | [diff] [blame] | 294 | * @port: usb host/otg port |
| 295 | * |
| 296 | * Target board specific, override usb_phy_mode. |
| 297 | * When usb-otg is used as usb host port, iomux pad usb_otg_id can be |
| 298 | * left disconnected in this case usb_phy_mode will not be able to identify |
| 299 | * the phy mode that usb port is used. |
| 300 | * Machine file overrides board_usb_phy_mode. |
| 301 | * |
| 302 | * Return: USB_INIT_DEVICE or USB_INIT_HOST |
| 303 | */ |
Peng Fan | 229dbba | 2014-11-10 08:50:39 +0800 | [diff] [blame] | 304 | int __weak board_usb_phy_mode(int port) |
| 305 | { |
| 306 | return usb_phy_mode(port); |
| 307 | } |
| 308 | |
Adrian Alonso | 74f0610 | 2015-08-06 15:43:16 -0500 | [diff] [blame] | 309 | /** |
| 310 | * board_ehci_hcd_init - set usb vbus voltage |
| 311 | * @port: usb otg port |
| 312 | * |
| 313 | * Target board specific, setup iomux pad to setup supply vbus voltage |
| 314 | * for usb otg port. Machine board file overrides board_ehci_hcd_init |
| 315 | * |
| 316 | * Return: 0 Success |
| 317 | */ |
Benoît Thébaudeau | f22e4fa | 2012-11-13 09:58:35 +0000 | [diff] [blame] | 318 | int __weak board_ehci_hcd_init(int port) |
| 319 | { |
| 320 | return 0; |
| 321 | } |
| 322 | |
Adrian Alonso | 74f0610 | 2015-08-06 15:43:16 -0500 | [diff] [blame] | 323 | /** |
| 324 | * board_ehci_power - enables/disables usb vbus voltage |
| 325 | * @port: usb otg port |
| 326 | * @on: on/off vbus voltage |
| 327 | * |
| 328 | * Enables/disables supply vbus voltage for usb otg port. |
| 329 | * Machine board file overrides board_ehci_power |
| 330 | * |
| 331 | * Return: 0 Success |
| 332 | */ |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 333 | int __weak board_ehci_power(int port, int on) |
| 334 | { |
| 335 | return 0; |
| 336 | } |
| 337 | |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 338 | int ehci_hcd_init(int index, enum usb_init_type init, |
| 339 | struct ehci_hccr **hccr, struct ehci_hcor **hcor) |
| 340 | { |
| 341 | enum usb_init_type type; |
| 342 | #if defined(CONFIG_MX6) |
| 343 | u32 controller_spacing = 0x200; |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 344 | struct anatop_regs __iomem *anatop = |
| 345 | (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; |
| 346 | #elif defined(CONFIG_MX7) |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 347 | u32 controller_spacing = 0x10000; |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 348 | struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR + |
| 349 | (0x10000 * index) + USBNC_OFFSET); |
| 350 | #elif defined(CONFIG_MX7ULP) |
| 351 | u32 controller_spacing = 0x10000; |
| 352 | struct usbphy_regs __iomem *usbphy = |
| 353 | (struct usbphy_regs __iomem *)USB_PHY0_BASE_ADDR; |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 354 | #endif |
| 355 | struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR + |
| 356 | (controller_spacing * index)); |
| 357 | int ret; |
| 358 | |
| 359 | if (index > 3) |
| 360 | return -EINVAL; |
| 361 | |
Peng Fan | 0bd3d91 | 2020-05-01 22:08:36 +0800 | [diff] [blame] | 362 | if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) { |
| 363 | if (usb_fused((ulong)ehci)) { |
| 364 | printf("SoC fuse indicates USB@0x%lx is unavailable.\n", |
| 365 | (ulong)ehci); |
| 366 | return -ENODEV; |
| 367 | } |
| 368 | } |
| 369 | |
Marek Vasut | 7f2c10e | 2021-03-31 12:28:03 +0200 | [diff] [blame] | 370 | enable_usboh3_clk(1); |
| 371 | mdelay(1); |
| 372 | |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 373 | /* Do board specific initialization */ |
| 374 | ret = board_ehci_hcd_init(index); |
| 375 | if (ret) { |
| 376 | enable_usboh3_clk(0); |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 377 | return ret; |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 378 | } |
| 379 | |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 380 | #if defined(CONFIG_MX6) |
| 381 | usb_power_config_mx6(anatop, index); |
| 382 | #elif defined (CONFIG_MX7) |
| 383 | usb_power_config_mx7(usbnc); |
| 384 | #elif defined (CONFIG_MX7ULP) |
| 385 | usb_power_config_mx7ulp(usbphy); |
| 386 | #endif |
| 387 | |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 388 | usb_oc_config(index); |
| 389 | |
| 390 | #if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) |
Marek Vasut | eb64f59 | 2021-03-31 22:10:35 +0200 | [diff] [blame] | 391 | if (index < ARRAY_SIZE(phy_bases)) { |
| 392 | usb_internal_phy_clock_gate((void __iomem *)phy_bases[index], 1); |
| 393 | usb_phy_enable(ehci, (void __iomem *)phy_bases[index]); |
| 394 | } |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 395 | #endif |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 396 | |
Peng Fan | 229dbba | 2014-11-10 08:50:39 +0800 | [diff] [blame] | 397 | type = board_usb_phy_mode(index); |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 398 | |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 399 | if (hccr && hcor) { |
| 400 | *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); |
| 401 | *hcor = (struct ehci_hcor *)((uint32_t)*hccr + |
| 402 | HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); |
| 403 | } |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 404 | |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 405 | if ((type == init) || (type == USB_INIT_DEVICE)) |
| 406 | board_ehci_power(index, (type == USB_INIT_DEVICE) ? 0 : 1); |
| 407 | if (type != init) |
| 408 | return -ENODEV; |
| 409 | if (type == USB_INIT_DEVICE) |
| 410 | return 0; |
Adrian Alonso | 35554fc | 2015-08-06 15:43:17 -0500 | [diff] [blame] | 411 | |
Troy Kisky | d1a5286 | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 412 | setbits_le32(&ehci->usbmode, CM_HOST); |
Adrian Alonso | e38ff30 | 2015-08-06 15:43:15 -0500 | [diff] [blame] | 413 | writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 414 | setbits_le32(&ehci->portsc, USB_EN); |
| 415 | |
| 416 | mdelay(10); |
| 417 | |
| 418 | return 0; |
| 419 | } |
| 420 | |
Lucas Stach | 676ae06 | 2012-09-26 00:14:35 +0200 | [diff] [blame] | 421 | int ehci_hcd_stop(int index) |
Wolfgang Grandegger | 3f46752 | 2012-02-08 22:33:25 +0000 | [diff] [blame] | 422 | { |
| 423 | return 0; |
| 424 | } |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 425 | #else |
| 426 | struct ehci_mx6_priv_data { |
| 427 | struct ehci_ctrl ctrl; |
| 428 | struct usb_ehci *ehci; |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 429 | struct udevice *vbus_supply; |
Marek Vasut | 7f2c10e | 2021-03-31 12:28:03 +0200 | [diff] [blame] | 430 | struct clk clk; |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 431 | enum usb_init_type init_type; |
| 432 | int portnr; |
Marek Vasut | 4dcfa3b | 2021-03-31 23:06:07 +0200 | [diff] [blame] | 433 | void __iomem *phy_addr; |
| 434 | void __iomem *misc_addr; |
| 435 | void __iomem *anatop_addr; |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 436 | }; |
| 437 | |
| 438 | static int mx6_init_after_reset(struct ehci_ctrl *dev) |
| 439 | { |
| 440 | struct ehci_mx6_priv_data *priv = dev->priv; |
| 441 | enum usb_init_type type = priv->init_type; |
| 442 | struct usb_ehci *ehci = priv->ehci; |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 443 | |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 444 | #if !defined(CONFIG_PHY) |
| 445 | usb_power_config_mx6(priv->anatop_addr, priv->portnr); |
| 446 | usb_power_config_mx7(priv->misc_addr); |
| 447 | usb_power_config_mx7ulp(priv->phy_addr); |
| 448 | #endif |
| 449 | |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 450 | usb_oc_config(priv->portnr); |
| 451 | |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 452 | #if !defined(CONFIG_PHY) && (defined(CONFIG_MX6) || defined(CONFIG_MX7ULP)) |
Marek Vasut | eb64f59 | 2021-03-31 22:10:35 +0200 | [diff] [blame] | 453 | usb_internal_phy_clock_gate(priv->phy_addr, 1); |
| 454 | usb_phy_enable(ehci, priv->phy_addr); |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 455 | #endif |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 456 | |
Abel Vesa | 921208e | 2019-02-01 16:40:08 +0000 | [diff] [blame] | 457 | #if CONFIG_IS_ENABLED(DM_REGULATOR) |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 458 | if (priv->vbus_supply) { |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 459 | int ret; |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 460 | ret = regulator_set_enable(priv->vbus_supply, |
| 461 | (type == USB_INIT_DEVICE) ? |
| 462 | false : true); |
Marek Vasut | 10bcafb | 2020-05-21 23:32:23 +0200 | [diff] [blame] | 463 | if (ret && ret != -ENOSYS) { |
Marek Vasut | 73021d1 | 2020-05-21 23:34:06 +0200 | [diff] [blame] | 464 | printf("Error enabling VBUS supply (ret=%i)\n", ret); |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 465 | return ret; |
| 466 | } |
| 467 | } |
Abel Vesa | 921208e | 2019-02-01 16:40:08 +0000 | [diff] [blame] | 468 | #endif |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 469 | |
| 470 | if (type == USB_INIT_DEVICE) |
| 471 | return 0; |
| 472 | |
| 473 | setbits_le32(&ehci->usbmode, CM_HOST); |
| 474 | writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); |
| 475 | setbits_le32(&ehci->portsc, USB_EN); |
| 476 | |
| 477 | mdelay(10); |
| 478 | |
| 479 | return 0; |
| 480 | } |
| 481 | |
| 482 | static const struct ehci_ops mx6_ehci_ops = { |
| 483 | .init_after_reset = mx6_init_after_reset |
| 484 | }; |
| 485 | |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 486 | static int ehci_usb_phy_mode(struct udevice *dev) |
| 487 | { |
Simon Glass | 8a8d24b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 488 | struct usb_plat *plat = dev_get_plat(dev); |
Masahiro Yamada | 8613c8d | 2020-07-17 14:36:46 +0900 | [diff] [blame] | 489 | void *__iomem addr = dev_read_addr_ptr(dev); |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 490 | void *__iomem phy_ctrl, *__iomem phy_status; |
| 491 | const void *blob = gd->fdt_blob; |
Simon Glass | e160f7d | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 492 | int offset = dev_of_offset(dev), phy_off; |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 493 | u32 val; |
| 494 | |
| 495 | /* |
| 496 | * About fsl,usbphy, Refer to |
| 497 | * Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt. |
| 498 | */ |
Ye Li | 235f5e1 | 2019-10-24 10:29:32 -0300 | [diff] [blame] | 499 | if (is_mx6() || is_mx7ulp()) { |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 500 | phy_off = fdtdec_lookup_phandle(blob, |
| 501 | offset, |
| 502 | "fsl,usbphy"); |
| 503 | if (phy_off < 0) |
| 504 | return -EINVAL; |
| 505 | |
| 506 | addr = (void __iomem *)fdtdec_get_addr(blob, phy_off, |
| 507 | "reg"); |
| 508 | if ((fdt_addr_t)addr == FDT_ADDR_T_NONE) |
| 509 | return -EINVAL; |
| 510 | |
| 511 | phy_ctrl = (void __iomem *)(addr + USBPHY_CTRL); |
| 512 | val = readl(phy_ctrl); |
| 513 | |
| 514 | if (val & USBPHY_CTRL_OTG_ID) |
| 515 | plat->init_type = USB_INIT_DEVICE; |
| 516 | else |
| 517 | plat->init_type = USB_INIT_HOST; |
| 518 | } else if (is_mx7()) { |
| 519 | phy_status = (void __iomem *)(addr + |
| 520 | USBNC_PHY_STATUS_OFFSET); |
| 521 | val = readl(phy_status); |
| 522 | |
| 523 | if (val & USBNC_PHYSTATUS_ID_DIG) |
| 524 | plat->init_type = USB_INIT_DEVICE; |
| 525 | else |
| 526 | plat->init_type = USB_INIT_HOST; |
| 527 | } else { |
| 528 | return -EINVAL; |
| 529 | } |
| 530 | |
| 531 | return 0; |
| 532 | } |
| 533 | |
Simon Glass | d1998a9 | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 534 | static int ehci_usb_of_to_plat(struct udevice *dev) |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 535 | { |
Simon Glass | 8a8d24b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 536 | struct usb_plat *plat = dev_get_plat(dev); |
Adam Ford | 69535b3 | 2019-04-03 08:41:56 -0500 | [diff] [blame] | 537 | enum usb_dr_mode dr_mode; |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 538 | |
Simon Glass | f10643c | 2020-12-19 10:40:14 -0700 | [diff] [blame] | 539 | dr_mode = usb_get_dr_mode(dev_ofnode(dev)); |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 540 | |
Adam Ford | 69535b3 | 2019-04-03 08:41:56 -0500 | [diff] [blame] | 541 | switch (dr_mode) { |
| 542 | case USB_DR_MODE_HOST: |
| 543 | plat->init_type = USB_INIT_HOST; |
| 544 | break; |
| 545 | case USB_DR_MODE_PERIPHERAL: |
| 546 | plat->init_type = USB_INIT_DEVICE; |
| 547 | break; |
| 548 | case USB_DR_MODE_OTG: |
| 549 | case USB_DR_MODE_UNKNOWN: |
| 550 | return ehci_usb_phy_mode(dev); |
| 551 | }; |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 552 | |
Adam Ford | 69535b3 | 2019-04-03 08:41:56 -0500 | [diff] [blame] | 553 | return 0; |
Peng Fan | cccbddc | 2016-12-22 17:06:42 +0800 | [diff] [blame] | 554 | } |
| 555 | |
Marek Vasut | 501547c | 2019-06-24 19:05:47 +0200 | [diff] [blame] | 556 | static int ehci_usb_bind(struct udevice *dev) |
| 557 | { |
| 558 | /* |
| 559 | * TODO: |
| 560 | * This driver is only partly converted to DT probing and still uses |
| 561 | * a tremendous amount of hard-coded addresses. To make things worse, |
| 562 | * the driver depends on specific sequential indexing of controllers, |
| 563 | * from which it derives offsets in the PHY and ANATOP register sets. |
| 564 | * |
| 565 | * Here we attempt to calculate these indexes from DT information as |
Igor Opaniuk | 1198a10 | 2019-10-10 16:09:35 +0300 | [diff] [blame] | 566 | * well as we can. The USB controllers on all existing iMX6 SoCs |
| 567 | * are placed next to each other, at addresses incremented by 0x200, |
| 568 | * and iMX7 their addresses are shifted by 0x10000. |
| 569 | * Thus, the index is derived from the multiple of 0x200 (0x10000 for |
| 570 | * iMX7) offset from the first controller address. |
Marek Vasut | 501547c | 2019-06-24 19:05:47 +0200 | [diff] [blame] | 571 | * |
| 572 | * However, to complete conversion of this driver to DT probing, the |
| 573 | * following has to be done: |
| 574 | * - DM clock framework support for iMX must be implemented |
| 575 | * - usb_power_config() has to be converted to clock framework |
| 576 | * -> Thus, the ad-hoc "index" variable goes away. |
| 577 | * - USB PHY handling has to be factored out into separate driver |
| 578 | * -> Thus, the ad-hoc "index" variable goes away from the PHY |
| 579 | * code, the PHY driver must parse it's address from DT. This |
| 580 | * USB driver must find the PHY driver via DT phandle. |
| 581 | * -> usb_power_config() shall be moved to PHY driver |
| 582 | * With these changes in place, the ad-hoc indexing goes away and |
| 583 | * the driver is fully converted to DT probing. |
| 584 | */ |
Marek Vasut | 501547c | 2019-06-24 19:05:47 +0200 | [diff] [blame] | 585 | |
Simon Glass | 4de51cc | 2020-12-16 21:20:20 -0700 | [diff] [blame] | 586 | /* |
| 587 | * FIXME: This cannot work with the new sequence numbers. |
| 588 | * Please complete the DM conversion. |
| 589 | * |
| 590 | * u32 controller_spacing = is_mx7() ? 0x10000 : 0x200; |
| 591 | * fdt_addr_t addr = devfdt_get_addr_index(dev, 0); |
| 592 | * |
| 593 | * dev->req_seq = (addr - USB_BASE_ADDR) / controller_spacing; |
| 594 | */ |
Marek Vasut | 501547c | 2019-06-24 19:05:47 +0200 | [diff] [blame] | 595 | |
| 596 | return 0; |
| 597 | } |
| 598 | |
Marek Vasut | 4dcfa3b | 2021-03-31 23:06:07 +0200 | [diff] [blame] | 599 | static int mx6_parse_dt_addrs(struct udevice *dev) |
| 600 | { |
| 601 | struct ehci_mx6_priv_data *priv = dev_get_priv(dev); |
| 602 | int phy_off, misc_off; |
| 603 | const void *blob = gd->fdt_blob; |
| 604 | int offset = dev_of_offset(dev); |
| 605 | void *__iomem addr; |
| 606 | |
| 607 | phy_off = fdtdec_lookup_phandle(blob, offset, "fsl,usbphy"); |
| 608 | if (phy_off < 0) { |
| 609 | phy_off = fdtdec_lookup_phandle(blob, offset, "phys"); |
| 610 | if (phy_off < 0) |
| 611 | return -EINVAL; |
| 612 | } |
| 613 | |
| 614 | misc_off = fdtdec_lookup_phandle(blob, offset, "fsl,usbmisc"); |
| 615 | if (misc_off < 0) |
| 616 | return -EINVAL; |
| 617 | |
| 618 | addr = (void __iomem *)fdtdec_get_addr(blob, phy_off, "reg"); |
| 619 | if ((fdt_addr_t)addr == FDT_ADDR_T_NONE) |
| 620 | return -EINVAL; |
| 621 | |
| 622 | priv->phy_addr = addr; |
| 623 | |
| 624 | addr = (void __iomem *)fdtdec_get_addr(blob, misc_off, "reg"); |
| 625 | if ((fdt_addr_t)addr == FDT_ADDR_T_NONE) |
| 626 | return -EINVAL; |
| 627 | |
| 628 | priv->misc_addr = addr; |
| 629 | |
| 630 | #if !defined(CONFIG_PHY) && defined(CONFIG_MX6) |
| 631 | int anatop_off; |
| 632 | |
| 633 | /* Resolve ANATOP offset through USB PHY node */ |
| 634 | anatop_off = fdtdec_lookup_phandle(blob, phy_off, "fsl,anatop"); |
| 635 | if (anatop_off < 0) |
| 636 | return -EINVAL; |
| 637 | |
| 638 | addr = (void __iomem *)fdtdec_get_addr(blob, anatop_off, "reg"); |
| 639 | if ((fdt_addr_t)addr == FDT_ADDR_T_NONE) |
| 640 | return -EINVAL; |
| 641 | |
| 642 | priv->anatop_addr = addr; |
| 643 | #endif |
| 644 | return 0; |
| 645 | } |
| 646 | |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 647 | static int ehci_usb_probe(struct udevice *dev) |
| 648 | { |
Simon Glass | 8a8d24b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 649 | struct usb_plat *plat = dev_get_plat(dev); |
Masahiro Yamada | 8613c8d | 2020-07-17 14:36:46 +0900 | [diff] [blame] | 650 | struct usb_ehci *ehci = dev_read_addr_ptr(dev); |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 651 | struct ehci_mx6_priv_data *priv = dev_get_priv(dev); |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 652 | enum usb_init_type type = plat->init_type; |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 653 | struct ehci_hccr *hccr; |
| 654 | struct ehci_hcor *hcor; |
| 655 | int ret; |
| 656 | |
Peng Fan | 0bd3d91 | 2020-05-01 22:08:36 +0800 | [diff] [blame] | 657 | if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) { |
| 658 | if (usb_fused((ulong)ehci)) { |
| 659 | printf("SoC fuse indicates USB@0x%lx is unavailable.\n", |
| 660 | (ulong)ehci); |
| 661 | return -ENODEV; |
| 662 | } |
| 663 | } |
| 664 | |
Marek Vasut | 4dcfa3b | 2021-03-31 23:06:07 +0200 | [diff] [blame] | 665 | ret = mx6_parse_dt_addrs(dev); |
| 666 | if (ret) |
| 667 | return ret; |
| 668 | |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 669 | priv->ehci = ehci; |
Simon Glass | 8b85dfc | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 670 | priv->portnr = dev_seq(dev); |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 671 | priv->init_type = type; |
| 672 | |
Marek Vasut | 7f2c10e | 2021-03-31 12:28:03 +0200 | [diff] [blame] | 673 | #if CONFIG_IS_ENABLED(CLK) |
| 674 | ret = clk_get_by_index(dev, 0, &priv->clk); |
| 675 | if (ret < 0) |
| 676 | return ret; |
| 677 | |
| 678 | ret = clk_enable(&priv->clk); |
| 679 | if (ret) |
| 680 | return ret; |
| 681 | #else |
| 682 | /* Compatibility with DM_USB and !CLK */ |
| 683 | enable_usboh3_clk(1); |
| 684 | mdelay(1); |
| 685 | #endif |
| 686 | |
Abel Vesa | 921208e | 2019-02-01 16:40:08 +0000 | [diff] [blame] | 687 | #if CONFIG_IS_ENABLED(DM_REGULATOR) |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 688 | ret = device_get_supply_regulator(dev, "vbus-supply", |
| 689 | &priv->vbus_supply); |
| 690 | if (ret) |
| 691 | debug("%s: No vbus supply\n", dev->name); |
Abel Vesa | 921208e | 2019-02-01 16:40:08 +0000 | [diff] [blame] | 692 | #endif |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 693 | |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 694 | #if !defined(CONFIG_PHY) |
| 695 | usb_power_config_mx6(priv->anatop_addr, priv->portnr); |
| 696 | usb_power_config_mx7(priv->misc_addr); |
| 697 | usb_power_config_mx7ulp(priv->phy_addr); |
| 698 | #endif |
| 699 | |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 700 | usb_oc_config(priv->portnr); |
| 701 | |
Marek Vasut | 849763b | 2021-03-31 23:00:23 +0200 | [diff] [blame^] | 702 | #if !defined(CONFIG_PHY) && (defined(CONFIG_MX6) || defined(CONFIG_MX7ULP)) |
Marek Vasut | eb64f59 | 2021-03-31 22:10:35 +0200 | [diff] [blame] | 703 | usb_internal_phy_clock_gate(priv->phy_addr, 1); |
| 704 | usb_phy_enable(ehci, priv->phy_addr); |
Marek Vasut | ef464e4 | 2021-03-31 21:40:24 +0200 | [diff] [blame] | 705 | #endif |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 706 | |
Abel Vesa | 921208e | 2019-02-01 16:40:08 +0000 | [diff] [blame] | 707 | #if CONFIG_IS_ENABLED(DM_REGULATOR) |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 708 | if (priv->vbus_supply) { |
| 709 | ret = regulator_set_enable(priv->vbus_supply, |
| 710 | (type == USB_INIT_DEVICE) ? |
| 711 | false : true); |
Marek Vasut | 10bcafb | 2020-05-21 23:32:23 +0200 | [diff] [blame] | 712 | if (ret && ret != -ENOSYS) { |
Marek Vasut | 73021d1 | 2020-05-21 23:34:06 +0200 | [diff] [blame] | 713 | printf("Error enabling VBUS supply (ret=%i)\n", ret); |
Marek Vasut | 7f2c10e | 2021-03-31 12:28:03 +0200 | [diff] [blame] | 714 | goto err_clk; |
Peng Fan | fcf9f9f | 2016-12-22 17:06:43 +0800 | [diff] [blame] | 715 | } |
| 716 | } |
Abel Vesa | 921208e | 2019-02-01 16:40:08 +0000 | [diff] [blame] | 717 | #endif |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 718 | |
| 719 | if (priv->init_type == USB_INIT_HOST) { |
| 720 | setbits_le32(&ehci->usbmode, CM_HOST); |
| 721 | writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); |
| 722 | setbits_le32(&ehci->portsc, USB_EN); |
| 723 | } |
| 724 | |
| 725 | mdelay(10); |
| 726 | |
| 727 | hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); |
| 728 | hcor = (struct ehci_hcor *)((uint32_t)hccr + |
| 729 | HC_LENGTH(ehci_readl(&(hccr)->cr_capbase))); |
| 730 | |
Marek Vasut | 7e1f1e1 | 2021-03-31 12:19:27 +0200 | [diff] [blame] | 731 | ret = ehci_register(dev, hccr, hcor, &mx6_ehci_ops, 0, priv->init_type); |
| 732 | if (ret) |
| 733 | goto err_regulator; |
| 734 | |
| 735 | return ret; |
| 736 | |
| 737 | err_regulator: |
| 738 | #if CONFIG_IS_ENABLED(DM_REGULATOR) |
| 739 | if (priv->vbus_supply) |
| 740 | regulator_set_enable(priv->vbus_supply, false); |
| 741 | #endif |
Marek Vasut | 7f2c10e | 2021-03-31 12:28:03 +0200 | [diff] [blame] | 742 | err_clk: |
| 743 | #if CONFIG_IS_ENABLED(CLK) |
| 744 | clk_disable(&priv->clk); |
| 745 | #else |
| 746 | /* Compatibility with DM_USB and !CLK */ |
| 747 | enable_usboh3_clk(0); |
| 748 | #endif |
Marek Vasut | 7e1f1e1 | 2021-03-31 12:19:27 +0200 | [diff] [blame] | 749 | return ret; |
| 750 | } |
| 751 | |
| 752 | int ehci_usb_remove(struct udevice *dev) |
| 753 | { |
| 754 | struct ehci_mx6_priv_data *priv __maybe_unused = dev_get_priv(dev); |
| 755 | |
| 756 | ehci_deregister(dev); |
| 757 | |
| 758 | #if CONFIG_IS_ENABLED(DM_REGULATOR) |
| 759 | if (priv->vbus_supply) |
| 760 | regulator_set_enable(priv->vbus_supply, false); |
| 761 | #endif |
| 762 | |
Marek Vasut | 7f2c10e | 2021-03-31 12:28:03 +0200 | [diff] [blame] | 763 | #if CONFIG_IS_ENABLED(CLK) |
| 764 | clk_disable(&priv->clk); |
| 765 | #endif |
| 766 | |
Marek Vasut | 7e1f1e1 | 2021-03-31 12:19:27 +0200 | [diff] [blame] | 767 | return 0; |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 768 | } |
| 769 | |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 770 | static const struct udevice_id mx6_usb_ids[] = { |
| 771 | { .compatible = "fsl,imx27-usb" }, |
| 772 | { } |
| 773 | }; |
| 774 | |
| 775 | U_BOOT_DRIVER(usb_mx6) = { |
| 776 | .name = "ehci_mx6", |
| 777 | .id = UCLASS_USB, |
| 778 | .of_match = mx6_usb_ids, |
Simon Glass | d1998a9 | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 779 | .of_to_plat = ehci_usb_of_to_plat, |
Marek Vasut | 501547c | 2019-06-24 19:05:47 +0200 | [diff] [blame] | 780 | .bind = ehci_usb_bind, |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 781 | .probe = ehci_usb_probe, |
Marek Vasut | 7e1f1e1 | 2021-03-31 12:19:27 +0200 | [diff] [blame] | 782 | .remove = ehci_usb_remove, |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 783 | .ops = &ehci_usb_ops, |
Simon Glass | 8a8d24b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 784 | .plat_auto = sizeof(struct usb_plat), |
Simon Glass | 41575d8 | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 785 | .priv_auto = sizeof(struct ehci_mx6_priv_data), |
Peng Fan | bb42fb4 | 2016-06-17 14:19:27 +0800 | [diff] [blame] | 786 | .flags = DM_FLAG_ALLOC_PRIV_DMA, |
| 787 | }; |
| 788 | #endif |