wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 1 | /* |
wdenk | 531716e | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 2 | * (C) Copyright 2002, 2003 |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 4 | * Marius Groeger <mgroeger@sysgo.de> |
Detlev Zundel | 792a09e | 2009-05-13 10:54:10 +0200 | [diff] [blame] | 5 | * Gary Jennejohn <garyj@denx.de> |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 6 | * David Mueller <d.mueller@elsoft.ch> |
| 7 | * |
| 8 | * Configuation settings for the MPL VCMA9 board. |
| 9 | * |
| 10 | * See file CREDITS for list of people who contributed to this |
| 11 | * project. |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License as |
| 15 | * published by the Free Software Foundation; either version 2 of |
| 16 | * the License, or (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, |
| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License |
| 24 | * along with this program; if not, write to the Free Software |
| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 26 | * MA 02111-1307 USA |
| 27 | */ |
| 28 | |
| 29 | #ifndef __CONFIG_H |
| 30 | #define __CONFIG_H |
| 31 | |
| 32 | /* |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 33 | * High Level Configuration Options |
| 34 | * (easy to change) |
| 35 | */ |
| 36 | #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ |
| 37 | #define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */ |
| 38 | #define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */ |
| 39 | |
| 40 | /* input clock of PLL */ |
| 41 | #define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */ |
| 42 | |
| 43 | #define USE_920T_MMU 1 |
| 44 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 45 | |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 46 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 47 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 48 | #define CONFIG_INITRD_TAG 1 |
| 49 | |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 50 | |
Jon Loeliger | a556290 | 2007-07-08 15:31:57 -0500 | [diff] [blame] | 51 | /* |
Jon Loeliger | a1aa0bb | 2007-07-10 09:22:23 -0500 | [diff] [blame] | 52 | * BOOTP options |
| 53 | */ |
| 54 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 55 | #define CONFIG_BOOTP_BOOTPATH |
| 56 | #define CONFIG_BOOTP_GATEWAY |
| 57 | #define CONFIG_BOOTP_HOSTNAME |
| 58 | |
| 59 | |
| 60 | /* |
Jon Loeliger | a556290 | 2007-07-08 15:31:57 -0500 | [diff] [blame] | 61 | * Command line configuration. |
| 62 | */ |
| 63 | #include <config_cmd_default.h> |
| 64 | |
| 65 | #define CONFIG_CMD_CACHE |
| 66 | #define CONFIG_CMD_EEPROM |
| 67 | #define CONFIG_CMD_I2C |
| 68 | #define CONFIG_CMD_USB |
| 69 | #define CONFIG_CMD_REGINFO |
| 70 | #define CONFIG_CMD_FAT |
| 71 | #define CONFIG_CMD_DATE |
| 72 | #define CONFIG_CMD_ELF |
| 73 | #define CONFIG_CMD_DHCP |
| 74 | #define CONFIG_CMD_PING |
| 75 | #define CONFIG_CMD_BSP |
| 76 | |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 77 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 78 | #define CONFIG_SYS_HUSH_PARSER |
| 79 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 80 | /*********************************************************** |
| 81 | * I2C stuff: |
| 82 | * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at |
| 83 | * address 0x50 with 16bit addressing |
| 84 | ***********************************************************/ |
| 85 | #define CONFIG_HARD_I2C /* I2C with hardware support */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 86 | #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */ |
| 87 | #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave addr */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 88 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
| 90 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 |
Jean-Christophe PLAGNIOL-VILLARD | bb1f8b4 | 2008-09-05 09:19:30 +0200 | [diff] [blame] | 91 | #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 92 | #define CONFIG_ENV_OFFSET 0x000 /* environment starts at offset 0 */ |
| 93 | #define CONFIG_ENV_SIZE 0x800 /* 2KB should be more than enough */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 94 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 95 | #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW |
| 96 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes page write mode on 24C256 */ |
| 97 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 98 | |
| 99 | /* |
| 100 | * Size of malloc() pool |
| 101 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 102 | /*#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)*/ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 103 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 104 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 105 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) |
| 106 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* BUNZIP2 needs a lot of RAM */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 107 | |
| 108 | /* |
| 109 | * Hardware drivers |
| 110 | */ |
Ben Warren | b1c0eaa | 2009-08-25 13:09:37 -0700 | [diff] [blame] | 111 | #define CONFIG_NET_MULTI |
| 112 | #define CONFIG_CS8900 /* we have a CS8900 on-board */ |
| 113 | #define CONFIG_CS8900_BASE 0x20000300 |
| 114 | #define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 115 | |
| 116 | #define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */ |
| 117 | |
| 118 | /* |
| 119 | * select serial console configuration |
| 120 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 300f99f | 2009-03-30 18:58:39 +0200 | [diff] [blame] | 121 | #define CONFIG_S3C24X0_SERIAL |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 122 | #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */ |
| 123 | |
wdenk | 48b4261 | 2003-06-19 23:01:32 +0000 | [diff] [blame] | 124 | /************************************************************ |
| 125 | * USB support |
| 126 | ************************************************************/ |
wdenk | a2663ea | 2003-12-07 18:32:37 +0000 | [diff] [blame] | 127 | #define CONFIG_USB_OHCI 1 |
| 128 | #define CONFIG_USB_KEYBOARD 1 |
| 129 | #define CONFIG_USB_STORAGE 1 |
| 130 | #define CONFIG_DOS_PARTITION 1 |
wdenk | 48b4261 | 2003-06-19 23:01:32 +0000 | [diff] [blame] | 131 | |
| 132 | /* Enable needed helper functions */ |
Jean-Christophe PLAGNIOL-VILLARD | 52cb4d4 | 2009-05-16 12:14:54 +0200 | [diff] [blame] | 133 | #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ |
wdenk | 48b4261 | 2003-06-19 23:01:32 +0000 | [diff] [blame] | 134 | |
| 135 | /************************************************************ |
| 136 | * RTC |
| 137 | ************************************************************/ |
| 138 | #define CONFIG_RTC_S3C24X0 1 |
| 139 | |
| 140 | |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 141 | /* allow to overwrite serial and ethaddr */ |
| 142 | #define CONFIG_ENV_OVERWRITE |
| 143 | |
| 144 | #define CONFIG_BAUDRATE 9600 |
| 145 | |
wdenk | a2663ea | 2003-12-07 18:32:37 +0000 | [diff] [blame] | 146 | #define CONFIG_BOOTDELAY 5 |
| 147 | /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ |
Wolfgang Denk | 2893ecb | 2005-08-14 01:52:14 +0200 | [diff] [blame] | 148 | /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 149 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */ |
wdenk | a2663ea | 2003-12-07 18:32:37 +0000 | [diff] [blame] | 150 | |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 151 | #define CONFIG_NETMASK 255.255.255.0 |
| 152 | #define CONFIG_IPADDR 10.0.0.110 |
| 153 | #define CONFIG_SERVERIP 10.0.0.1 |
| 154 | |
Jon Loeliger | a556290 | 2007-07-08 15:31:57 -0500 | [diff] [blame] | 155 | #if defined(CONFIG_CMD_KGDB) |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 156 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
| 157 | /* what's this ? it's not used anywhere */ |
| 158 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ |
| 159 | #endif |
| 160 | |
| 161 | /* |
| 162 | * Miscellaneous configurable options |
| 163 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 164 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 165 | #define CONFIG_SYS_PROMPT "VCMA9 # " /* Monitor Command Prompt */ |
| 166 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 167 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 168 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 169 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 170 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 171 | #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ |
| 172 | #define CONFIG_SYS_MEMTEST_END 0x30F80000 /* 15.5 MB in DRAM */ |
wdenk | 531716e | 2003-09-13 19:01:12 +0000 | [diff] [blame] | 173 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 174 | #define CONFIG_SYS_ALT_MEMTEST |
| 175 | #define CONFIG_SYS_LOAD_ADDR 0x30800000 /* default load address */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 176 | |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 177 | /* we configure PWM Timer 4 to 1us ~ 1MHz */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 178 | /*#define CONFIG_SYS_HZ 1000000 */ |
| 179 | #define CONFIG_SYS_HZ 1562500 |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 180 | |
| 181 | /* valid baudrates */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 182 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 183 | |
wdenk | a2663ea | 2003-12-07 18:32:37 +0000 | [diff] [blame] | 184 | /* support BZIP2 compression */ |
| 185 | #define CONFIG_BZIP2 1 |
| 186 | |
wdenk | 48b4261 | 2003-06-19 23:01:32 +0000 | [diff] [blame] | 187 | /************************************************************ |
| 188 | * Ident |
| 189 | ************************************************************/ |
| 190 | /*#define VERSION_TAG "released"*/ |
| 191 | #define VERSION_TAG "unstable" |
| 192 | #define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, MEV-10080-001 " VERSION_TAG |
| 193 | |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 194 | /*----------------------------------------------------------------------- |
| 195 | * Stack sizes |
| 196 | * |
| 197 | * The stack sizes are set up in start.S using the settings below |
| 198 | */ |
| 199 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| 200 | #ifdef CONFIG_USE_IRQ |
| 201 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 202 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| 203 | #endif |
| 204 | |
| 205 | /*----------------------------------------------------------------------- |
| 206 | * Physical Memory Map |
| 207 | */ |
| 208 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
| 209 | #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 210 | #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ |
| 211 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 212 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 213 | |
| 214 | /*----------------------------------------------------------------------- |
| 215 | * FLASH and environment organization |
| 216 | */ |
| 217 | |
| 218 | #define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */ |
| 219 | #if 0 |
| 220 | #define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */ |
| 221 | #endif |
| 222 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 223 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 224 | #ifdef CONFIG_AMD_LV800 |
| 225 | #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 226 | #define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ |
| 227 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 228 | #endif |
| 229 | #ifdef CONFIG_AMD_LV400 |
| 230 | #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 231 | #define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ |
| 232 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 233 | #endif |
| 234 | |
| 235 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 236 | #define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
| 237 | #define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 238 | |
| 239 | #if 0 |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 240 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 241 | #define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 242 | #endif |
| 243 | |
wdenk | 48b4261 | 2003-06-19 23:01:32 +0000 | [diff] [blame] | 244 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 245 | #define CONFIG_SYS_JFFS2_FIRST_BANK 0 |
| 246 | #define CONFIG_SYS_JFFS2_NUM_BANKS 1 |
wdenk | 48b4261 | 2003-06-19 23:01:32 +0000 | [diff] [blame] | 247 | |
| 248 | #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000 |
| 249 | |
wdenk | 1cb8e98 | 2003-03-06 21:55:29 +0000 | [diff] [blame] | 250 | #endif /* __CONFIG_H */ |