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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Peng Fan6f6058b2016-01-28 16:55:04 +08002/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
Peng Fan6f6058b2016-01-28 16:55:04 +08004 */
5
6#include <common.h>
Peng Fan8cf22312018-01-10 13:20:32 +08007#include <asm/io.h>
Peng Fanecd7ab52018-01-10 13:20:33 +08008#include <asm/mach-imx/sys_proto.h>
Peng Fan6f6058b2016-01-28 16:55:04 +08009#include <command.h>
Peng Fanecd7ab52018-01-10 13:20:33 +080010#include <imx_sip.h>
Tom Rini20b9f2e2018-01-03 08:52:39 -050011#include <linux/compiler.h>
Igor Opaniuk89038262019-11-28 15:56:20 +020012#include <cpu_func.h>
Peng Fan6f6058b2016-01-28 16:55:04 +080013
Peng Fan8cf22312018-01-10 13:20:32 +080014int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
Peng Fan6f6058b2016-01-28 16:55:04 +080015{
Peng Fan8cf22312018-01-10 13:20:32 +080016 ulong stack, pc;
17
18 if (!boot_private_data)
19 return -EINVAL;
20
Gary Bisson68e74102018-11-14 17:55:29 +010021 stack = *(u32 *)boot_private_data;
22 pc = *(u32 *)(boot_private_data + 4);
Peng Fan8cf22312018-01-10 13:20:32 +080023
Igor Opaniuk0ba1b4d2019-11-28 15:56:19 +020024 printf("## Starting auxiliary core stack = 0x%08lX, pc = 0x%08lX...\n",
25 stack, pc);
26
Peng Fan8cf22312018-01-10 13:20:32 +080027 /* Set the stack and pc to M4 bootROM */
28 writel(stack, M4_BOOTROM_BASE_ADDR);
29 writel(pc, M4_BOOTROM_BASE_ADDR + 4);
30
Igor Opaniuk89038262019-11-28 15:56:20 +020031 flush_dcache_all();
32
Peng Fan8cf22312018-01-10 13:20:32 +080033 /* Enable M4 */
Peng Fancd357ad2018-11-20 10:19:25 +000034#ifdef CONFIG_IMX8M
Ye Li264977d2019-10-26 16:24:03 +020035 call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0);
Peng Fanecd7ab52018-01-10 13:20:33 +080036#else
Peng Fan8cf22312018-01-10 13:20:32 +080037 clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
38 SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK);
Peng Fanecd7ab52018-01-10 13:20:33 +080039#endif
Peng Fan8cf22312018-01-10 13:20:32 +080040
41 return 0;
Peng Fan6f6058b2016-01-28 16:55:04 +080042}
43
Peng Fan8cf22312018-01-10 13:20:32 +080044int arch_auxiliary_core_check_up(u32 core_id)
Peng Fan6f6058b2016-01-28 16:55:04 +080045{
Peng Fancd357ad2018-11-20 10:19:25 +000046#ifdef CONFIG_IMX8M
Ye Li264977d2019-10-26 16:24:03 +020047 return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, 0);
Peng Fanecd7ab52018-01-10 13:20:33 +080048#else
Peng Fan8cf22312018-01-10 13:20:32 +080049 unsigned int val;
50
51 val = readl(SRC_BASE_ADDR + SRC_M4_REG_OFFSET);
52
53 if (val & SRC_M4C_NON_SCLR_RST_MASK)
54 return 0; /* assert in reset */
55
56 return 1;
Peng Fanecd7ab52018-01-10 13:20:33 +080057#endif
Peng Fan6f6058b2016-01-28 16:55:04 +080058}
59
Peng Fan6f6058b2016-01-28 16:55:04 +080060/*
61 * To i.MX6SX and i.MX7D, the image supported by bootaux needs
62 * the reset vector at the head for the image, with SP and PC
63 * as the first two words.
64 *
65 * Per the cortex-M reference manual, the reset vector of M4 needs
66 * to exist at 0x0 (TCMUL). The PC and SP are the first two addresses
67 * of that vector. So to boot M4, the A core must build the M4's reset
68 * vector with getting the PC and SP from image and filling them to
69 * TCMUL. When M4 is kicked, it will load the PC and SP by itself.
70 * The TCMUL is mapped to (M4_BOOTROM_BASE_ADDR) at A core side for
71 * accessing the M4 TCMUL.
72 */
Tom Rini20b9f2e2018-01-03 08:52:39 -050073static int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
Peng Fan6f6058b2016-01-28 16:55:04 +080074{
75 ulong addr;
76 int ret, up;
77
78 if (argc < 2)
79 return CMD_RET_USAGE;
80
81 up = arch_auxiliary_core_check_up(0);
82 if (up) {
83 printf("## Auxiliary core is already up\n");
84 return CMD_RET_SUCCESS;
85 }
86
87 addr = simple_strtoul(argv[1], NULL, 16);
88
Igor Opaniuk0ba1b4d2019-11-28 15:56:19 +020089 if (!addr)
90 return CMD_RET_FAILURE;
Peng Fan6f6058b2016-01-28 16:55:04 +080091
92 ret = arch_auxiliary_core_up(0, addr);
93 if (ret)
94 return CMD_RET_FAILURE;
95
96 return CMD_RET_SUCCESS;
97}
98
99U_BOOT_CMD(
100 bootaux, CONFIG_SYS_MAXARGS, 1, do_bootaux,
101 "Start auxiliary core",
102 ""
103);