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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thomas Chou661ba142010-04-30 11:34:16 +08002/*
3 * Altera SPI driver
4 *
5 * based on bfin_spi.c
6 * Copyright (c) 2005-2008 Analog Devices Inc.
7 * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
Thomas Chou661ba142010-04-30 11:34:16 +08008 */
9#include <common.h>
Thomas Chou15a56f92015-10-14 08:33:34 +080010#include <dm.h>
11#include <errno.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060012#include <log.h>
Thomas Chou661ba142010-04-30 11:34:16 +080013#include <malloc.h>
Thomas Chou15a56f92015-10-14 08:33:34 +080014#include <fdtdec.h>
Jagan Tekibef87ad2015-10-27 23:11:11 +053015#include <spi.h>
Thomas Chou15a56f92015-10-14 08:33:34 +080016#include <asm/io.h>
Simon Glasscd93d622020-05-10 11:40:13 -060017#include <linux/bitops.h>
Thomas Chou15a56f92015-10-14 08:33:34 +080018
Jagan Tekibef87ad2015-10-27 23:11:11 +053019#define ALTERA_SPI_STATUS_RRDY_MSK BIT(7)
20#define ALTERA_SPI_CONTROL_SSO_MSK BIT(10)
21
Tom Rinib166f042021-08-19 15:06:54 -040022#define ALTERA_SPI_IDLE_VAL 0xff
Marek Vasutcdcdad82014-10-22 21:56:04 +020023
Marek Vasuteef67022014-10-22 21:55:58 +020024struct altera_spi_regs {
25 u32 rxdata;
26 u32 txdata;
27 u32 status;
28 u32 control;
29 u32 _reserved;
30 u32 slave_sel;
31};
Thomas Chou661ba142010-04-30 11:34:16 +080032
Simon Glass8a8d24b2020-12-03 16:55:23 -070033struct altera_spi_plat {
Thomas Chou15a56f92015-10-14 08:33:34 +080034 struct altera_spi_regs *regs;
35};
Thomas Chou661ba142010-04-30 11:34:16 +080036
Thomas Chou15a56f92015-10-14 08:33:34 +080037struct altera_spi_priv {
38 struct altera_spi_regs *regs;
39};
40
Thomas Chou15a56f92015-10-14 08:33:34 +080041static void spi_cs_activate(struct udevice *dev, uint cs)
Thomas Chou661ba142010-04-30 11:34:16 +080042{
Thomas Chou15a56f92015-10-14 08:33:34 +080043 struct udevice *bus = dev->parent;
44 struct altera_spi_priv *priv = dev_get_priv(bus);
45 struct altera_spi_regs *const regs = priv->regs;
46
47 writel(1 << cs, &regs->slave_sel);
48 writel(ALTERA_SPI_CONTROL_SSO_MSK, &regs->control);
Thomas Chou661ba142010-04-30 11:34:16 +080049}
50
Thomas Chou15a56f92015-10-14 08:33:34 +080051static void spi_cs_deactivate(struct udevice *dev)
Thomas Chou661ba142010-04-30 11:34:16 +080052{
Thomas Chou15a56f92015-10-14 08:33:34 +080053 struct udevice *bus = dev->parent;
54 struct altera_spi_priv *priv = dev_get_priv(bus);
55 struct altera_spi_regs *const regs = priv->regs;
56
57 writel(0, &regs->control);
58 writel(0, &regs->slave_sel);
Thomas Chou661ba142010-04-30 11:34:16 +080059}
60
Thomas Chou15a56f92015-10-14 08:33:34 +080061static int altera_spi_claim_bus(struct udevice *dev)
Thomas Chou661ba142010-04-30 11:34:16 +080062{
Thomas Chou15a56f92015-10-14 08:33:34 +080063 struct udevice *bus = dev->parent;
64 struct altera_spi_priv *priv = dev_get_priv(bus);
65 struct altera_spi_regs *const regs = priv->regs;
Thomas Chou661ba142010-04-30 11:34:16 +080066
Thomas Chou15a56f92015-10-14 08:33:34 +080067 writel(0, &regs->control);
68 writel(0, &regs->slave_sel);
Thomas Chou661ba142010-04-30 11:34:16 +080069
Thomas Chou661ba142010-04-30 11:34:16 +080070 return 0;
71}
72
Thomas Chou15a56f92015-10-14 08:33:34 +080073static int altera_spi_release_bus(struct udevice *dev)
Thomas Chou661ba142010-04-30 11:34:16 +080074{
Thomas Chou15a56f92015-10-14 08:33:34 +080075 struct udevice *bus = dev->parent;
76 struct altera_spi_priv *priv = dev_get_priv(bus);
77 struct altera_spi_regs *const regs = priv->regs;
Thomas Chou661ba142010-04-30 11:34:16 +080078
Thomas Chou15a56f92015-10-14 08:33:34 +080079 writel(0, &regs->slave_sel);
80
81 return 0;
Thomas Chou661ba142010-04-30 11:34:16 +080082}
83
Thomas Chou15a56f92015-10-14 08:33:34 +080084static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen,
85 const void *dout, void *din, unsigned long flags)
Thomas Chou661ba142010-04-30 11:34:16 +080086{
Thomas Chou15a56f92015-10-14 08:33:34 +080087 struct udevice *bus = dev->parent;
88 struct altera_spi_priv *priv = dev_get_priv(bus);
89 struct altera_spi_regs *const regs = priv->regs;
Simon Glass8a8d24b2020-12-03 16:55:23 -070090 struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
Thomas Chou15a56f92015-10-14 08:33:34 +080091
Thomas Chou661ba142010-04-30 11:34:16 +080092 /* assume spi core configured to do 8 bit transfers */
Marek Vasutbc76b822014-10-22 21:56:02 +020093 unsigned int bytes = bitlen / 8;
94 const unsigned char *txp = dout;
95 unsigned char *rxp = din;
96 uint32_t reg, data, start;
Thomas Chou661ba142010-04-30 11:34:16 +080097
98 debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
Simon Glass8b85dfc2020-12-16 21:20:07 -070099 dev_seq(bus), slave_plat->cs, bitlen, bytes, flags);
Marek Vasut37dcc132014-10-22 21:56:00 +0200100
Thomas Chou661ba142010-04-30 11:34:16 +0800101 if (bitlen == 0)
102 goto done;
103
104 if (bitlen % 8) {
105 flags |= SPI_XFER_END;
106 goto done;
107 }
108
109 /* empty read buffer */
Thomas Chou15a56f92015-10-14 08:33:34 +0800110 if (readl(&regs->status) & ALTERA_SPI_STATUS_RRDY_MSK)
111 readl(&regs->rxdata);
Marek Vasut37dcc132014-10-22 21:56:00 +0200112
Thomas Chou661ba142010-04-30 11:34:16 +0800113 if (flags & SPI_XFER_BEGIN)
Thomas Chou15a56f92015-10-14 08:33:34 +0800114 spi_cs_activate(dev, slave_plat->cs);
Thomas Chou661ba142010-04-30 11:34:16 +0800115
116 while (bytes--) {
Marek Vasutbc76b822014-10-22 21:56:02 +0200117 if (txp)
118 data = *txp++;
119 else
Tom Rinib166f042021-08-19 15:06:54 -0400120 data = ALTERA_SPI_IDLE_VAL;
Marek Vasut37dcc132014-10-22 21:56:00 +0200121
Marek Vasutbc76b822014-10-22 21:56:02 +0200122 debug("%s: tx:%x ", __func__, data);
Thomas Chou15a56f92015-10-14 08:33:34 +0800123 writel(data, &regs->txdata);
Marek Vasut37dcc132014-10-22 21:56:00 +0200124
Marek Vasut80d73332014-10-22 21:56:01 +0200125 start = get_timer(0);
126 while (1) {
Thomas Chou15a56f92015-10-14 08:33:34 +0800127 reg = readl(&regs->status);
Marek Vasut80d73332014-10-22 21:56:01 +0200128 if (reg & ALTERA_SPI_STATUS_RRDY_MSK)
129 break;
130 if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
Thomas Chou15a56f92015-10-14 08:33:34 +0800131 debug("%s: Transmission timed out!\n", __func__);
132 return -1;
Marek Vasut80d73332014-10-22 21:56:01 +0200133 }
134 }
Marek Vasut37dcc132014-10-22 21:56:00 +0200135
Thomas Chou15a56f92015-10-14 08:33:34 +0800136 data = readl(&regs->rxdata);
Thomas Chou661ba142010-04-30 11:34:16 +0800137 if (rxp)
Marek Vasutbc76b822014-10-22 21:56:02 +0200138 *rxp++ = data & 0xff;
Marek Vasut37dcc132014-10-22 21:56:00 +0200139
Marek Vasutbc76b822014-10-22 21:56:02 +0200140 debug("rx:%x\n", data);
Thomas Chou661ba142010-04-30 11:34:16 +0800141 }
Marek Vasut37dcc132014-10-22 21:56:00 +0200142
143done:
Thomas Chou661ba142010-04-30 11:34:16 +0800144 if (flags & SPI_XFER_END)
Thomas Chou15a56f92015-10-14 08:33:34 +0800145 spi_cs_deactivate(dev);
Thomas Chou661ba142010-04-30 11:34:16 +0800146
147 return 0;
148}
Thomas Chou15a56f92015-10-14 08:33:34 +0800149
150static int altera_spi_set_speed(struct udevice *bus, uint speed)
151{
152 return 0;
153}
154
155static int altera_spi_set_mode(struct udevice *bus, uint mode)
156{
157 return 0;
158}
159
160static int altera_spi_probe(struct udevice *bus)
161{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700162 struct altera_spi_plat *plat = dev_get_plat(bus);
Thomas Chou15a56f92015-10-14 08:33:34 +0800163 struct altera_spi_priv *priv = dev_get_priv(bus);
164
165 priv->regs = plat->regs;
166
167 return 0;
168}
169
Simon Glassd1998a92020-12-03 16:55:21 -0700170static int altera_spi_of_to_plat(struct udevice *bus)
Thomas Chou15a56f92015-10-14 08:33:34 +0800171{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700172 struct altera_spi_plat *plat = dev_get_plat(bus);
Thomas Chou15a56f92015-10-14 08:33:34 +0800173
Masahiro Yamada25484932020-07-17 14:36:48 +0900174 plat->regs = map_physmem(dev_read_addr(bus),
Thomas Chou7313e212015-11-14 11:17:25 +0800175 sizeof(struct altera_spi_regs),
176 MAP_NOCACHE);
Thomas Chou15a56f92015-10-14 08:33:34 +0800177
178 return 0;
179}
180
181static const struct dm_spi_ops altera_spi_ops = {
182 .claim_bus = altera_spi_claim_bus,
183 .release_bus = altera_spi_release_bus,
184 .xfer = altera_spi_xfer,
185 .set_speed = altera_spi_set_speed,
186 .set_mode = altera_spi_set_mode,
187 /*
188 * cs_info is not needed, since we require all chip selects to be
189 * in the device tree explicitly
190 */
191};
192
193static const struct udevice_id altera_spi_ids[] = {
Thomas Chouddf34c22015-10-31 20:55:48 +0800194 { .compatible = "altr,spi-1.0" },
195 {}
Thomas Chou15a56f92015-10-14 08:33:34 +0800196};
197
198U_BOOT_DRIVER(altera_spi) = {
199 .name = "altera_spi",
200 .id = UCLASS_SPI,
201 .of_match = altera_spi_ids,
202 .ops = &altera_spi_ops,
Simon Glassd1998a92020-12-03 16:55:21 -0700203 .of_to_plat = altera_spi_of_to_plat,
Simon Glass8a8d24b2020-12-03 16:55:23 -0700204 .plat_auto = sizeof(struct altera_spi_plat),
Simon Glass41575d82020-12-03 16:55:17 -0700205 .priv_auto = sizeof(struct altera_spi_priv),
Thomas Chou15a56f92015-10-14 08:33:34 +0800206 .probe = altera_spi_probe,
207};