Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0+ |
Dinh Nguyen | 7775440 | 2012-10-04 06:46:02 +0000 | [diff] [blame] | 2 | # |
| 3 | # (C) Copyright 2000-2003 |
| 4 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 5 | # |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 6 | # Copyright (C) 2012-2017 Altera Corporation <www.altera.com> |
Dinh Nguyen | 7775440 | 2012-10-04 06:46:02 +0000 | [diff] [blame] | 7 | |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 8 | obj-y += board.o |
| 9 | obj-y += clock_manager.o |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 10 | obj-y += misc.o |
| 11 | obj-y += reset_manager.o |
| 12 | obj-y += timer.o |
Dinh Nguyen | e5ad7d9 | 2015-12-02 13:31:32 -0600 | [diff] [blame] | 13 | |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 14 | ifdef CONFIG_TARGET_SOCFPGA_GEN5 |
| 15 | obj-y += clock_manager_gen5.o |
| 16 | obj-y += misc_gen5.o |
| 17 | obj-y += reset_manager_gen5.o |
| 18 | obj-y += scan_manager.o |
| 19 | obj-y += system_manager_gen5.o |
| 20 | obj-y += wrap_pll_config.o |
Tien Fong Chee | 6867e19 | 2017-07-26 13:05:38 +0800 | [diff] [blame] | 21 | obj-y += fpga_manager.o |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 22 | endif |
Ley Foon Tan | 827e6a7 | 2017-04-26 02:44:38 +0800 | [diff] [blame] | 23 | |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 24 | ifdef CONFIG_TARGET_SOCFPGA_ARRIA10 |
| 25 | obj-y += clock_manager_arria10.o |
| 26 | obj-y += misc_arria10.o |
| 27 | obj-y += pinmux_arria10.o |
| 28 | obj-y += reset_manager_arria10.o |
| 29 | endif |
Marek Vasut | ca62d2e | 2015-08-02 21:12:09 +0200 | [diff] [blame] | 30 | |
Ley Foon Tan | 508791a | 2018-05-18 22:05:22 +0800 | [diff] [blame] | 31 | ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 |
| 32 | obj-y += clock_manager_s10.o |
Ley Foon Tan | a280e9d | 2018-05-24 00:17:25 +0800 | [diff] [blame] | 33 | obj-y += mailbox_s10.o |
Ley Foon Tan | d559130 | 2018-05-24 00:17:24 +0800 | [diff] [blame] | 34 | obj-y += misc_s10.o |
Ley Foon Tan | 914a84e | 2018-05-24 00:17:26 +0800 | [diff] [blame^] | 35 | obj-y += mmu-arm64_s10.o |
Ley Foon Tan | 3607a80 | 2018-05-18 22:05:23 +0800 | [diff] [blame] | 36 | obj-y += reset_manager_s10.o |
Ley Foon Tan | 73175d0 | 2018-05-18 22:05:24 +0800 | [diff] [blame] | 37 | obj-y += system_manager_s10.o |
| 38 | obj-y += wrap_pinmux_config_s10.o |
Ley Foon Tan | 508791a | 2018-05-18 22:05:22 +0800 | [diff] [blame] | 39 | obj-y += wrap_pll_config_s10.o |
| 40 | endif |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 41 | ifdef CONFIG_SPL_BUILD |
| 42 | obj-y += spl.o |
| 43 | ifdef CONFIG_TARGET_SOCFPGA_GEN5 |
| 44 | obj-y += freeze_controller.o |
| 45 | obj-y += wrap_iocsr_config.o |
| 46 | obj-y += wrap_pinmux_config.o |
| 47 | obj-y += wrap_sdram_config.o |
| 48 | endif |
| 49 | endif |
| 50 | |
| 51 | ifdef CONFIG_TARGET_SOCFPGA_GEN5 |
Marek Vasut | ca62d2e | 2015-08-02 21:12:09 +0200 | [diff] [blame] | 52 | # QTS-generated config file wrappers |
Marek Vasut | ca62d2e | 2015-08-02 21:12:09 +0200 | [diff] [blame] | 53 | CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR) |
| 54 | CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR) |
| 55 | CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR) |
| 56 | CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR) |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 57 | endif |