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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +05302/*
3 * Copyright 2016 Freescale Semiconductor
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +05304 */
5
6#ifndef __LS1012A_COMMON_H
7#define __LS1012A_COMMON_H
8
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +05309#define CONFIG_GICV2
10
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053011#include <asm/arch/config.h>
Bharat Bhushan9f076db2017-03-22 12:06:29 +053012#include <asm/arch/stream_id_lsch2.h>
Kuldeep Singh10669ed2020-06-25 12:56:22 +053013#include <linux/sizes.h>
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053014
Hou Zhiqiang904110c2017-01-10 16:44:15 +080015#define CONFIG_SYS_CLK_FREQ 125000000
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053016
17#define CONFIG_SKIP_LOWLEVEL_INIT
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053018
Rajesh Bhagat1f6180d2018-11-05 18:02:53 +000019#ifdef CONFIG_TFABOOT
20#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
21#else
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053022#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
Rajesh Bhagat1f6180d2018-11-05 18:02:53 +000023#endif
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053024#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
25
26#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
27#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
28#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
Prabhakar Kushwaha7d559602017-01-30 17:05:22 +053029#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053030
31/* Generic Timer Definitions */
Yuantian Tangb5845102017-10-12 14:29:26 +080032#define COUNTER_FREQUENCY 25000000 /* 25MHz */
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053033
34/* CSU */
35#define CONFIG_LAYERSCAPE_NS_ACCESS
36
37/* Size of malloc() pool */
Kuldeep Singh10669ed2020-06-25 12:56:22 +053038#define CONFIG_SYS_MALLOC_LEN (5 * SZ_1M)
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053039
Kuldeep Singhe0152db2020-05-28 11:42:53 +053040/* PFE */
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053041#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
Kuldeep Singhe0152db2020-05-28 11:42:53 +053042#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x300000
43
44/*SPI device */
Kuldeep Singhc93ad772020-05-12 12:54:07 +053045#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053046
Yuantian Tangae02cf02018-01-03 15:53:10 +080047/* SATA */
48#define CONFIG_SCSI_AHCI_PLAT
49
50#define CONFIG_SYS_SATA AHCI_BASE_ADDR
51
52#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
53#define CONFIG_SYS_SCSI_MAX_LUN 1
54#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
55 CONFIG_SYS_SCSI_MAX_LUN)
56
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053057/* I2C */
Igor Opaniuk2147a162021-02-09 13:52:45 +020058#if !CONFIG_IS_ENABLED(DM_I2C)
Simon Glass69d9eda2021-07-10 21:14:32 -060059#define CONFIG_SYS_I2C_LEGACY
Biwen Lia0affb32019-12-31 15:33:41 +080060#else
61#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
62#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
63#endif
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053064
Biwen Lic5d0bd52021-02-05 19:01:55 +080065/* GPIO */
66#ifdef CONFIG_DM_GPIO
67#ifndef CONFIG_MPC8XXX_GPIO
68#define CONFIG_MPC8XXX_GPIO
69#endif
70#endif
71
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053072#define CONFIG_SYS_NS16550_SERIAL
73#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang904110c2017-01-10 16:44:15 +080074#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053075
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053076#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
77
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053078#define CONFIG_SYS_HZ 1000
79
80#define CONFIG_HWCONFIG
81#define HWCONFIG_BUFFER_SIZE 128
82
Rajesh Bhagata81357a2017-11-30 16:44:38 +053083#ifndef CONFIG_SPL_BUILD
84#define BOOT_TARGET_DEVICES(func) \
85 func(MMC, mmc, 0) \
Yunfeng Dingd2c49aa2019-02-19 14:44:04 +080086 func(USB, usb, 0) \
87 func(SCSI, scsi, 0) \
88 func(DHCP, dhcp, na)
Rajesh Bhagata81357a2017-11-30 16:44:38 +053089#include <config_distro_bootcmd.h>
90#endif
91
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053092/* Initial environment variables */
93#define CONFIG_EXTRA_ENV_SETTINGS \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053094 "verify=no\0" \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053095 "loadaddr=0x80100000\0" \
96 "kernel_addr=0x100000\0" \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053097 "initrd_high=0xffffffffffffffff\0" \
Bhaskar Upadhaya4def3782017-11-14 05:05:10 +053098 "kernel_start=0x1000000\0" \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +053099 "kernel_load=0xa0000000\0" \
100 "kernel_size=0x2800000\0" \
Udit Agarwal3fba2312020-06-08 18:55:44 +0530101 "bootm_size=0x10000000\0" \
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530102
Rajesh Bhagata81357a2017-11-30 16:44:38 +0530103#undef CONFIG_BOOTCOMMAND
Rajesh Bhagat1f6180d2018-11-05 18:02:53 +0000104#ifdef CONFIG_TFABOOT
Mian Yousaf Kaukab864c3db2021-04-14 12:33:58 +0200105#define QSPI_NOR_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
Rajesh Bhagat1f6180d2018-11-05 18:02:53 +0000106 "$kernel_start $kernel_size && "\
107 "bootm $kernel_load"
108#else
Mian Yousaf Kaukab864c3db2021-04-14 12:33:58 +0200109#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
Calvin Johnsona802d1e2018-03-08 15:30:35 +0530110 "$kernel_start $kernel_size && "\
111 "bootm $kernel_load"
Rajesh Bhagat1f6180d2018-11-05 18:02:53 +0000112#endif
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530113
114/* Monitor Command Prompt */
115#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530116#define CONFIG_SYS_MAXARGS 64 /* max command args */
117
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530118#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
119
Simon Glass457e51c2017-05-17 08:23:10 -0600120#include <asm/arch/soc.h>
121
Prabhakar Kushwaha9d044fc2016-06-03 18:41:34 +0530122#endif /* __LS1012A_COMMON_H */