blob: ebf72b3ee07d6d2765c724e61fb11554f4042c86 [file] [log] [blame]
Masahiro Yamadadd840582014-07-30 14:08:14 +09001menu "x86 architecture"
2 depends on X86
3
4config SYS_ARCH
Masahiro Yamadadd840582014-07-30 14:08:14 +09005 default "x86"
6
Masahiro Yamada45ccec82014-10-24 01:30:43 +09007config USE_PRIVATE_LIBGCC
8 default y
9
Masahiro Yamadadd840582014-07-30 14:08:14 +090010choice
11 prompt "Target select"
12
13config TARGET_COREBOOT
14 bool "Support coreboot"
Simon Glass8ef07572014-11-12 22:42:07 -070015 help
16 This target is used for running U-Boot on top of Coreboot. In
17 this case Coreboot does the early inititalisation, and U-Boot
18 takes over once the RAM, video and CPU are fully running.
19 U-Boot is loaded as a fallback payload from Coreboot, in
20 Coreboot terminology. This method was used for the Chromebook
21 Pixel when launched.
22
23config TARGET_CHROMEBOOK_LINK
24 bool "Support Chromebook link"
25 help
26 This is the Chromebook Pixel released in 2013. It uses an Intel
27 i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
28 SDRAM. It has a Panther Point platform controller hub, PCIe
29 WiFi and Bluetooth. It also includes a 720p webcam, USB SD
30 reader, microphone and speakers, display port and 32GB SATA
31 solid state drive. There is a Chrome OS EC connected on LPC,
32 and it provides a 2560x1700 high resolution touch-enabled LCD
33 display.
Masahiro Yamadadd840582014-07-30 14:08:14 +090034
Bin Meng58f542d2014-12-17 15:50:40 +080035config TARGET_CROWNBAY
36 bool "Support Intel Crown Bay CRB"
37 help
38 This is the Intel Crown Bay Customer Reference Board. It contains
39 the Intel Atom Processor E6xx populated on the COM Express module
40 with 1GB DDR2 soldered down memory and a carrier board with the
41 Intel Platform Controller Hub EG20T, other system components and
42 peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS.
43
Masahiro Yamadadd840582014-07-30 14:08:14 +090044endchoice
45
Simon Glass70a09c62014-11-12 22:42:10 -070046config RAMBASE
47 hex
48 default 0x100000
49
50config RAMTOP
51 hex
52 default 0x200000
53
54config XIP_ROM_SIZE
55 hex
56 default 0x10000
57
58config CPU_ADDR_BITS
59 int
60 default 36
61
Simon Glass65dd74a2014-11-12 22:42:28 -070062config HPET_ADDRESS
63 hex
64 default 0xfed00000 if !HPET_ADDRESS_OVERRIDE
65
66config SMM_TSEG
67 bool
68 default n
69
70config SMM_TSEG_SIZE
71 hex
72
Bin Meng64542f42014-12-12 21:05:19 +080073config BOARD_ROMSIZE_KB_512
74 bool
75config BOARD_ROMSIZE_KB_1024
76 bool
77config BOARD_ROMSIZE_KB_2048
78 bool
79config BOARD_ROMSIZE_KB_4096
80 bool
81config BOARD_ROMSIZE_KB_8192
82 bool
83config BOARD_ROMSIZE_KB_16384
84 bool
85
86choice
87 prompt "ROM chip size"
88 default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512
89 default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024
90 default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048
91 default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096
92 default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192
93 default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384
94 help
95 Select the size of the ROM chip you intend to flash U-Boot on.
96
97 The build system will take care of creating a u-boot.rom file
98 of the matching size.
99
100config UBOOT_ROMSIZE_KB_512
101 bool "512 KB"
102 help
103 Choose this option if you have a 512 KB ROM chip.
104
105config UBOOT_ROMSIZE_KB_1024
106 bool "1024 KB (1 MB)"
107 help
108 Choose this option if you have a 1024 KB (1 MB) ROM chip.
109
110config UBOOT_ROMSIZE_KB_2048
111 bool "2048 KB (2 MB)"
112 help
113 Choose this option if you have a 2048 KB (2 MB) ROM chip.
114
115config UBOOT_ROMSIZE_KB_4096
116 bool "4096 KB (4 MB)"
117 help
118 Choose this option if you have a 4096 KB (4 MB) ROM chip.
119
120config UBOOT_ROMSIZE_KB_8192
121 bool "8192 KB (8 MB)"
122 help
123 Choose this option if you have a 8192 KB (8 MB) ROM chip.
124
125config UBOOT_ROMSIZE_KB_16384
126 bool "16384 KB (16 MB)"
127 help
128 Choose this option if you have a 16384 KB (16 MB) ROM chip.
129
130endchoice
131
132# Map the config names to an integer (KB).
133config UBOOT_ROMSIZE_KB
134 int
135 default 512 if UBOOT_ROMSIZE_KB_512
136 default 1024 if UBOOT_ROMSIZE_KB_1024
137 default 2048 if UBOOT_ROMSIZE_KB_2048
138 default 4096 if UBOOT_ROMSIZE_KB_4096
139 default 8192 if UBOOT_ROMSIZE_KB_8192
140 default 16384 if UBOOT_ROMSIZE_KB_16384
141
142# Map the config names to a hex value (bytes).
Simon Glassfce7b272014-11-12 22:42:08 -0700143config ROM_SIZE
144 hex
Bin Meng64542f42014-12-12 21:05:19 +0800145 default 0x80000 if UBOOT_ROMSIZE_KB_512
146 default 0x100000 if UBOOT_ROMSIZE_KB_1024
147 default 0x200000 if UBOOT_ROMSIZE_KB_2048
148 default 0x400000 if UBOOT_ROMSIZE_KB_4096
149 default 0x800000 if UBOOT_ROMSIZE_KB_8192
150 default 0xc00000 if UBOOT_ROMSIZE_KB_12288
151 default 0x1000000 if UBOOT_ROMSIZE_KB_16384
Simon Glassfce7b272014-11-12 22:42:08 -0700152
153config HAVE_INTEL_ME
154 bool "Platform requires Intel Management Engine"
155 help
156 Newer higher-end devices have an Intel Management Engine (ME)
157 which is a very large binary blob (typically 1.5MB) which is
158 required for the platform to work. This enforces a particular
159 SPI flash format. You will need to supply the me.bin file in
160 your board directory.
161
Simon Glass65dd74a2014-11-12 22:42:28 -0700162config X86_RAMTEST
163 bool "Perform a simple RAM test after SDRAM initialisation"
164 help
165 If there is something wrong with SDRAM then the platform will
166 often crash within U-Boot or the kernel. This option enables a
167 very simple RAM test that quickly checks whether the SDRAM seems
168 to work correctly. It is not exhaustive but can save time by
169 detecting obvious failures.
170
Simon Glass22465fc2014-11-14 20:56:30 -0700171config MARK_GRAPHICS_MEM_WRCOMB
172 bool "Mark graphics memory as write-combining."
173 default n
174 help
175 The graphics performance may increase if the graphics
176 memory is set as write-combining cache type. This option
177 enables marking the graphics memory as write-combining.
178
179menu "Display"
180
181config FRAMEBUFFER_SET_VESA_MODE
182 prompt "Set framebuffer graphics resolution"
183 bool
184 help
185 Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console)
186
187choice
188 prompt "framebuffer graphics resolution"
189 default FRAMEBUFFER_VESA_MODE_117
190 depends on FRAMEBUFFER_SET_VESA_MODE
191 help
192 This option sets the resolution used for the coreboot framebuffer (and
193 bootsplash screen).
194
195config FRAMEBUFFER_VESA_MODE_100
196 bool "640x400 256-color"
197
198config FRAMEBUFFER_VESA_MODE_101
199 bool "640x480 256-color"
200
201config FRAMEBUFFER_VESA_MODE_102
202 bool "800x600 16-color"
203
204config FRAMEBUFFER_VESA_MODE_103
205 bool "800x600 256-color"
206
207config FRAMEBUFFER_VESA_MODE_104
208 bool "1024x768 16-color"
209
210config FRAMEBUFFER_VESA_MODE_105
211 bool "1024x7686 256-color"
212
213config FRAMEBUFFER_VESA_MODE_106
214 bool "1280x1024 16-color"
215
216config FRAMEBUFFER_VESA_MODE_107
217 bool "1280x1024 256-color"
218
219config FRAMEBUFFER_VESA_MODE_108
220 bool "80x60 text"
221
222config FRAMEBUFFER_VESA_MODE_109
223 bool "132x25 text"
224
225config FRAMEBUFFER_VESA_MODE_10A
226 bool "132x43 text"
227
228config FRAMEBUFFER_VESA_MODE_10B
229 bool "132x50 text"
230
231config FRAMEBUFFER_VESA_MODE_10C
232 bool "132x60 text"
233
234config FRAMEBUFFER_VESA_MODE_10D
235 bool "320x200 32k-color (1:5:5:5)"
236
237config FRAMEBUFFER_VESA_MODE_10E
238 bool "320x200 64k-color (5:6:5)"
239
240config FRAMEBUFFER_VESA_MODE_10F
241 bool "320x200 16.8M-color (8:8:8)"
242
243config FRAMEBUFFER_VESA_MODE_110
244 bool "640x480 32k-color (1:5:5:5)"
245
246config FRAMEBUFFER_VESA_MODE_111
247 bool "640x480 64k-color (5:6:5)"
248
249config FRAMEBUFFER_VESA_MODE_112
250 bool "640x480 16.8M-color (8:8:8)"
251
252config FRAMEBUFFER_VESA_MODE_113
253 bool "800x600 32k-color (1:5:5:5)"
254
255config FRAMEBUFFER_VESA_MODE_114
256 bool "800x600 64k-color (5:6:5)"
257
258config FRAMEBUFFER_VESA_MODE_115
259 bool "800x600 16.8M-color (8:8:8)"
260
261config FRAMEBUFFER_VESA_MODE_116
262 bool "1024x768 32k-color (1:5:5:5)"
263
264config FRAMEBUFFER_VESA_MODE_117
265 bool "1024x768 64k-color (5:6:5)"
266
267config FRAMEBUFFER_VESA_MODE_118
268 bool "1024x768 16.8M-color (8:8:8)"
269
270config FRAMEBUFFER_VESA_MODE_119
271 bool "1280x1024 32k-color (1:5:5:5)"
272
273config FRAMEBUFFER_VESA_MODE_11A
274 bool "1280x1024 64k-color (5:6:5)"
275
276config FRAMEBUFFER_VESA_MODE_11B
277 bool "1280x1024 16.8M-color (8:8:8)"
278
279config FRAMEBUFFER_VESA_MODE_USER
280 bool "Manually select VESA mode"
281
282endchoice
283
284# Map the config names to an integer (KB).
285config FRAMEBUFFER_VESA_MODE
286 prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
287 hex
288 default 0x100 if FRAMEBUFFER_VESA_MODE_100
289 default 0x101 if FRAMEBUFFER_VESA_MODE_101
290 default 0x102 if FRAMEBUFFER_VESA_MODE_102
291 default 0x103 if FRAMEBUFFER_VESA_MODE_103
292 default 0x104 if FRAMEBUFFER_VESA_MODE_104
293 default 0x105 if FRAMEBUFFER_VESA_MODE_105
294 default 0x106 if FRAMEBUFFER_VESA_MODE_106
295 default 0x107 if FRAMEBUFFER_VESA_MODE_107
296 default 0x108 if FRAMEBUFFER_VESA_MODE_108
297 default 0x109 if FRAMEBUFFER_VESA_MODE_109
298 default 0x10A if FRAMEBUFFER_VESA_MODE_10A
299 default 0x10B if FRAMEBUFFER_VESA_MODE_10B
300 default 0x10C if FRAMEBUFFER_VESA_MODE_10C
301 default 0x10D if FRAMEBUFFER_VESA_MODE_10D
302 default 0x10E if FRAMEBUFFER_VESA_MODE_10E
303 default 0x10F if FRAMEBUFFER_VESA_MODE_10F
304 default 0x110 if FRAMEBUFFER_VESA_MODE_110
305 default 0x111 if FRAMEBUFFER_VESA_MODE_111
306 default 0x112 if FRAMEBUFFER_VESA_MODE_112
307 default 0x113 if FRAMEBUFFER_VESA_MODE_113
308 default 0x114 if FRAMEBUFFER_VESA_MODE_114
309 default 0x115 if FRAMEBUFFER_VESA_MODE_115
310 default 0x116 if FRAMEBUFFER_VESA_MODE_116
311 default 0x117 if FRAMEBUFFER_VESA_MODE_117
312 default 0x118 if FRAMEBUFFER_VESA_MODE_118
313 default 0x119 if FRAMEBUFFER_VESA_MODE_119
314 default 0x11A if FRAMEBUFFER_VESA_MODE_11A
315 default 0x11B if FRAMEBUFFER_VESA_MODE_11B
316 default 0x117 if FRAMEBUFFER_VESA_MODE_USER
317
318endmenu
319
Simon Glass8ef07572014-11-12 22:42:07 -0700320source "arch/x86/cpu/ivybridge/Kconfig"
321
Bin Meng58f542d2014-12-17 15:50:40 +0800322source "arch/x86/cpu/queensbay/Kconfig"
323
Simon Glassfe5b9b42014-11-12 22:42:29 -0700324source "board/coreboot/coreboot/Kconfig"
Masahiro Yamadadd840582014-07-30 14:08:14 +0900325
Simon Glass8ef07572014-11-12 22:42:07 -0700326source "board/google/chromebook_link/Kconfig"
327
Bin Meng58f542d2014-12-17 15:50:40 +0800328source "board/intel/crownbay/Kconfig"
329
Masahiro Yamadadd840582014-07-30 14:08:14 +0900330endmenu