blob: 8e7d15160dace60101b09223eb8fdec018f3a99a [file] [log] [blame]
Giulio Benetti77eb9a92020-01-10 15:51:47 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019
4 * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
5 */
6
7#include <common.h>
Simon Glass691d7192020-05-10 11:40:02 -06008#include <init.h>
Giulio Benetti77eb9a92020-01-10 15:51:47 +01009#include <asm/io.h>
10#include <asm/armv7_mpu.h>
Simon Glasscd93d622020-05-10 11:40:13 -060011#include <linux/bitops.h>
Giulio Benetti77eb9a92020-01-10 15:51:47 +010012
13int arch_cpu_init(void)
14{
15 int i;
16
17 struct mpu_region_config imxrt1050_region_config[] = {
18 { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
19 STRONG_ORDER, REGION_4GB },
20 { PHYS_SDRAM, REGION_1, XN_DIS, PRIV_RW_USR_RW,
21 O_I_WB_RD_WR_ALLOC, (ffs(PHYS_SDRAM_SIZE) - 2) },
22 { DMAMEM_BASE,
23 REGION_2, XN_DIS, PRIV_RW_USR_RW,
24 STRONG_ORDER, (ffs(DMAMEM_SZ_ALL) - 2) },
25 };
26
27 /*
28 * Configure the memory protection unit (MPU) to allow full access to
29 * the whole 4GB address space.
30 */
31 disable_mpu();
32 for (i = 0; i < ARRAY_SIZE(imxrt1050_region_config); i++)
33 mpu_config(&imxrt1050_region_config[i]);
34 enable_mpu();
35
36 return 0;
37}