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Stelian Pop0176d432008-03-26 18:52:33 +01001/*
2 * (C) Copyright 2007-2008
Stelian Popcce9cfd2008-05-08 22:52:09 +02003 * Stelian Pop <stelian.pop@leadtechdesign.com>
Stelian Pop0176d432008-03-26 18:52:33 +01004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000026#include <asm/io.h>
Stelian Pop0176d432008-03-26 18:52:33 +010027#include <asm/arch/at91sam9260_matrix.h>
Stelian Pop9606b3c2008-05-08 22:52:10 +020028#include <asm/arch/at91sam9_smc.h>
Jean-Christophe PLAGNIOL-VILLARD1332a2a2009-03-21 21:07:59 +010029#include <asm/arch/at91_common.h>
Stelian Pop0176d432008-03-26 18:52:33 +010030#include <asm/arch/at91_pmc.h>
31#include <asm/arch/at91_rstc.h>
32#include <asm/arch/gpio.h>
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000033
Stelian Pop0176d432008-03-26 18:52:33 +010034#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000035# include <net.h>
Stelian Pop0176d432008-03-26 18:52:33 +010036#endif
Ben Warren3ae071e2008-08-12 22:11:53 -070037#include <netdev.h>
Stelian Pop0176d432008-03-26 18:52:33 +010038
39DECLARE_GLOBAL_DATA_PTR;
40
41/* ------------------------------------------------------------------------- */
42/*
43 * Miscelaneous platform dependent initialisations
44 */
45
Stelian Pop0176d432008-03-26 18:52:33 +010046#ifdef CONFIG_CMD_NAND
47static void at91sam9260ek_nand_hw_init(void)
48{
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000049 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
50 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
Stelian Pop0176d432008-03-26 18:52:33 +010051 unsigned long csa;
52
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000053 /* Assign CS3 to NAND/SmartMedia Interface */
54 csa = readl(&matrix->ebicsa);
55 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
56 writel(csa, &matrix->ebicsa);
Stelian Pop0176d432008-03-26 18:52:33 +010057
58 /* Configure SMC CS3 for NAND/SmartMedia */
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000059 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
60 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
61 &smc->cs[3].setup);
62 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
63 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
64 &smc->cs[3].pulse);
65 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
66 &smc->cs[3].cycle);
67 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
68 AT91_SMC_MODE_EXNW_DISABLE |
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069#ifdef CONFIG_SYS_NAND_DBW_16
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000070 AT91_SMC_MODE_DBW_16 |
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#else /* CONFIG_SYS_NAND_DBW_8 */
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000072 AT91_SMC_MODE_DBW_8 |
Stelian Popc1212b22008-05-08 20:52:18 +020073#endif
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000074 AT91_SMC_MODE_TDF_CYCLE(2),
75 &smc->cs[3].mode);
Stelian Pop0176d432008-03-26 18:52:33 +010076
77 /* Configure RDY/BSY */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +010078 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
Stelian Pop0176d432008-03-26 18:52:33 +010079
80 /* Enable NandFlash */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +010081 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000082
Stelian Pop0176d432008-03-26 18:52:33 +010083}
84#endif
85
Stelian Pop0176d432008-03-26 18:52:33 +010086#ifdef CONFIG_MACB
87static void at91sam9260ek_macb_hw_init(void)
88{
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000089 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
90 struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
91 struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
92 unsigned long erstl;
Sedji Gaouaou0aafde12009-06-24 08:32:09 +020093
Reinhard Meyer8c6407f2011-06-06 00:13:10 +000094 /* Enable EMAC clock */
95 writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
Stelian Pop0176d432008-03-26 18:52:33 +010096
97 /*
98 * Disable pull-up on:
99 * RXDV (PA17) => PHY normal mode (not Test mode)
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200100 * ERX0 (PA14) => PHY ADDR0
Stelian Pop0176d432008-03-26 18:52:33 +0100101 * ERX1 (PA15) => PHY ADDR1
102 * ERX2 (PA25) => PHY ADDR2
103 * ERX3 (PA26) => PHY ADDR3
104 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
105 *
106 * PHY has internal pull-down
107 */
108 writel(pin_to_mask(AT91_PIN_PA14) |
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000109 pin_to_mask(AT91_PIN_PA15) |
110 pin_to_mask(AT91_PIN_PA17) |
111 pin_to_mask(AT91_PIN_PA25) |
112 pin_to_mask(AT91_PIN_PA26) |
113 pin_to_mask(AT91_PIN_PA28),
114 &pioa->pudr);
Stelian Pop0176d432008-03-26 18:52:33 +0100115
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000116 erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
Sedji Gaouaou0aafde12009-06-24 08:32:09 +0200117
Stelian Pop0176d432008-03-26 18:52:33 +0100118 /* Need to reset PHY -> 500ms reset */
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000119 writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
120 AT91_RSTC_MR_URSTEN, &rstc->mr);
Stelian Pop0176d432008-03-26 18:52:33 +0100121
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000122 writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
Stelian Pop0176d432008-03-26 18:52:33 +0100123
124 /* Wait for end hardware reset */
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000125 while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
126 ;
Stelian Pop0176d432008-03-26 18:52:33 +0100127
128 /* Restore NRST value */
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000129 writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
130 &rstc->mr);
Stelian Pop0176d432008-03-26 18:52:33 +0100131
132 /* Re-enable pull-up */
133 writel(pin_to_mask(AT91_PIN_PA14) |
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000134 pin_to_mask(AT91_PIN_PA15) |
135 pin_to_mask(AT91_PIN_PA17) |
136 pin_to_mask(AT91_PIN_PA25) |
137 pin_to_mask(AT91_PIN_PA26) |
138 pin_to_mask(AT91_PIN_PA28),
139 &pioa->puer);
Stelian Pop0176d432008-03-26 18:52:33 +0100140
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000141 /* Initialize EMAC=MACB hardware */
Jean-Christophe PLAGNIOL-VILLARDe2c04762009-03-21 21:08:00 +0100142 at91_macb_hw_init();
Stelian Pop0176d432008-03-26 18:52:33 +0100143}
144#endif
145
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000146int board_early_init_f(void)
147{
148 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
149
150 /* Enable clocks for all PIOs */
151 writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
152 (1 << ATMEL_ID_PIOC),
153 &pmc->pcer);
154
155 return 0;
156}
157
Stelian Pop0176d432008-03-26 18:52:33 +0100158int board_init(void)
159{
Nicolas Ferredf486b12009-03-22 14:48:16 +0100160#ifdef CONFIG_AT91SAM9G20EK
161 /* arch number of AT91SAM9260EK-Board */
162 gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
163#else
Stelian Pop0176d432008-03-26 18:52:33 +0100164 /* arch number of AT91SAM9260EK-Board */
165 gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK;
Nicolas Ferredf486b12009-03-22 14:48:16 +0100166#endif
Stelian Pop0176d432008-03-26 18:52:33 +0100167 /* adress of boot parameters */
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000168 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
Stelian Pop0176d432008-03-26 18:52:33 +0100169
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000170 at91_seriald_hw_init();
Stelian Pop0176d432008-03-26 18:52:33 +0100171#ifdef CONFIG_CMD_NAND
172 at91sam9260ek_nand_hw_init();
173#endif
174#ifdef CONFIG_HAS_DATAFLASH
Albin Tonnerre50b5fff2009-09-01 11:26:20 +0200175 at91_spi0_hw_init((1 << 0) | (1 << 1));
Stelian Pop0176d432008-03-26 18:52:33 +0100176#endif
177#ifdef CONFIG_MACB
178 at91sam9260ek_macb_hw_init();
179#endif
180
181 return 0;
182}
183
184int dram_init(void)
185{
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000186 gd->ram_size = get_ram_size(
187 (void *)CONFIG_SYS_SDRAM_BASE,
188 CONFIG_SYS_SDRAM_SIZE);
Stelian Pop0176d432008-03-26 18:52:33 +0100189 return 0;
190}
191
192#ifdef CONFIG_RESET_PHY_R
193void reset_phy(void)
194{
Stelian Pop0176d432008-03-26 18:52:33 +0100195}
196#endif
Ben Warren3ae071e2008-08-12 22:11:53 -0700197
198int board_eth_init(bd_t *bis)
199{
200 int rc = 0;
201#ifdef CONFIG_MACB
Reinhard Meyer8c6407f2011-06-06 00:13:10 +0000202 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
Ben Warren3ae071e2008-08-12 22:11:53 -0700203#endif
204 return rc;
205}