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Daniel Hellstrom823edd82008-03-28 10:06:52 +01001/* Configuration header file for LEON3 GRSIM, trying to be similar
2 * to Gaisler's GR-XC3S-1500 board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom823edd82008-03-28 10:06:52 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
Francois Retiefa62bba12015-10-29 00:02:48 +020016#define CONFIG_SYS_GENERIC_BOARD
Francois Retief4c547752015-10-28 16:49:02 +020017#define CONFIG_DISPLAY_BOARDINFO
Francois Retiefa62bba12015-10-29 00:02:48 +020018
Daniel Hellstrom823edd82008-03-28 10:06:52 +010019/*
20 * High Level Configuration Options
21 * (easy to change)
22 *
23 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
24 *
Francois Retiefb6b280c2014-11-04 16:51:44 +020025 * TSIM command:
26 * $ tsim-leon3 -sdram 32768 -ram 4096 -rom 2048 -mmu -cas
Daniel Hellstrom823edd82008-03-28 10:06:52 +010027 *
Francois Retiefb6b280c2014-11-04 16:51:44 +020028 * In the evaluation version of TSIM, the -sdram/-ram/-rom arguments are
29 * hard-coded to these values and need not be specified. (see below)
30 *
31 * Get TSIM from http://www.gaisler.com/index.php/downloads/simulators
Daniel Hellstrom823edd82008-03-28 10:06:52 +010032 */
33
Daniel Hellstrom823edd82008-03-28 10:06:52 +010034#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
35#define CONFIG_TSIM 1 /* ... running on TSIM */
36
37/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020038#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010039
Daniel Hellstrom823edd82008-03-28 10:06:52 +010040/*
41 * Serial console configuration
42 */
43#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020044#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom823edd82008-03-28 10:06:52 +010045
46/* Partitions */
47#define CONFIG_DOS_PARTITION
48#define CONFIG_MAC_PARTITION
49#define CONFIG_ISO_PARTITION
50
51/*
52 * Supported commands
53 */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010054#define CONFIG_CMD_DIAG
Siva Durga Prasad Paladugu64e809a2014-03-14 16:35:38 +053055#define CONFIG_CMD_FPGA_LOADMK
Daniel Hellstrom823edd82008-03-28 10:06:52 +010056#define CONFIG_CMD_IRQ
Daniel Hellstrom823edd82008-03-28 10:06:52 +010057#define CONFIG_CMD_REGINFO
Daniel Hellstrom823edd82008-03-28 10:06:52 +010058
59/*
60 * Autobooting
61 */
62#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
63
64#define CONFIG_PREBOOT "echo;" \
65 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
66 "echo"
67
68#undef CONFIG_BOOTARGS
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069/*#define CONFIG_SYS_HUSH_PARSER 0*/
Daniel Hellstrom823edd82008-03-28 10:06:52 +010070
71#define CONFIG_EXTRA_ENV_SETTINGS \
72 "netdev=eth0\0" \
73 "nfsargs=setenv bootargs root=/dev/nfs rw " \
74 "nfsroot=${serverip}:${rootpath}\0" \
75 "ramargs=setenv bootargs root=/dev/ram rw\0" \
76 "addip=setenv bootargs ${bootargs} " \
77 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
78 ":${hostname}:${netdev}:off panic=1\0" \
79 "flash_nfs=run nfsargs addip;" \
80 "bootm ${kernel_addr}\0" \
81 "flash_self=run ramargs addip;" \
82 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
83 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
84 "rootpath=/export/roofs\0" \
85 "scratch=40000000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000086 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom823edd82008-03-28 10:06:52 +010087 "bootargs=console=ttyS0,38400" \
88 ""
89#define CONFIG_NETMASK 255.255.255.0
90#define CONFIG_GATEWAYIP 192.168.0.1
91#define CONFIG_SERVERIP 192.168.0.81
92#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger8b3637c2011-10-13 13:03:47 +000093#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom823edd82008-03-28 10:06:52 +010094#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +000095#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom823edd82008-03-28 10:06:52 +010096
97#define CONFIG_BOOTCOMMAND "run flash_self"
98
99/* Memory MAP
100 *
101 * Flash:
102 * |--------------------------------|
103 * | 0x00000000 Text & Data & BSS | *
104 * | for Monitor | *
105 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
106 * | UNUSED / Growth | * 256kb
107 * |--------------------------------|
108 * | 0x00050000 Base custom area | *
109 * | kernel / FS | *
110 * | | * Rest of Flash
111 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
112 * | END-0x00008000 Environment | * 32kb
113 * |--------------------------------|
114 *
115 *
116 *
117 * Main Memory:
118 * |--------------------------------|
119 * | UNUSED / scratch area |
120 * | |
121 * | |
122 * | |
123 * | |
124 * |--------------------------------|
125 * | Monitor .Text / .DATA / .BSS | * 256kb
126 * | Relocated! | *
127 * |--------------------------------|
128 * | Monitor Malloc | * 128kb (contains relocated environment)
129 * |--------------------------------|
130 * | Monitor/kernel STACK | * 64kb
131 * |--------------------------------|
132 * | Page Table for MMU systems | * 2k
133 * |--------------------------------|
134 * | PROM Code accessed from Linux | * 6kb-128b
135 * |--------------------------------|
136 * | Global data (avail from kernel)| * 128b
137 * |--------------------------------|
138 *
139 */
140
141/*
142 * Flash configuration (8,16 or 32 MB)
143 * TEXT base always at 0xFFF00000
144 * ENV_ADDR always at 0xFFF40000
145 * FLASH_BASE at 0xFC000000 for 64 MB
146 * 0xFE000000 for 32 MB
147 * 0xFF000000 for 16 MB
148 * 0xFF800000 for 8 MB
149 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#define CONFIG_SYS_NO_FLASH 1
151#define CONFIG_SYS_FLASH_BASE 0x00000000
152#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200153#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100154
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100156
157#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
159#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100160
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200161#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
162#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
163#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
164#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100165
166#ifdef ENABLE_FLASH_SUPPORT
167/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100169
170#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
171
172/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200174#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200175#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100176#endif
177
178/*
179 * Environment settings
180 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200181#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200182/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200183/*#define CONFIG_ENV_SIZE 0x8000*/
184#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100185#define CONFIG_ENV_OVERWRITE 1
186
187/*
188 * Memory map
189 */
Francois Retiefb6b280c2014-11-04 16:51:44 +0200190#define CONFIG_SYS_SDRAM_BASE 0x60000000
191#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32MiB SDRAM */
192#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100193
Francois Retiefb6b280c2014-11-04 16:51:44 +0200194#define CONFIG_SYS_SRAM_BASE 0x40000000
195#define CONFIG_SYS_SRAM_SIZE 0x00400000 /* 4MiB SRAM */
196#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100197
198/* Always Run U-Boot from SDRAM */
Francois Retiefb6b280c2014-11-04 16:51:44 +0200199#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
200#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
201#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100202
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200203#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100204
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200205#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200206#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100207
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
209#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100210
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200211#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
213# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100214#endif
215
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200216#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
217#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
218#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100219
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200220#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
221#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100222
223/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200224#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
225#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100226
227/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200228#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100229
Francois Retiefb6b280c2014-11-04 16:51:44 +0200230#ifdef CONFIG_CMD_NET
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100231/*
232 * Ethernet configuration
233 */
234#define CONFIG_GRETH 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100235
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100236/*
237 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
238 */
239/* #define CONFIG_GRETH_10MBIT 1 */
240#define CONFIG_PHY_ADDR 0x00
241
Francois Retiefb6b280c2014-11-04 16:51:44 +0200242#endif /* CONFIG_CMD_NET */
243
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100244/*
245 * Miscellaneous configurable options
246 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200247#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100248#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200249#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100250#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100252#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200253#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
254#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
255#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100256
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200257#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
258#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100259
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200260#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100261
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100262/***** Gaisler GRLIB IP-Cores Config ********/
263
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200264#define CONFIG_SYS_GRLIB_SDRAM 0
Francois Retiefb6b280c2014-11-04 16:51:44 +0200265
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200266#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100267
268/* No SDRAM Configuration */
269#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
270
271/* LEON2 MCTRL configuration */
272#define CONFIG_SYS_GRLIB_ESA_MCTRL1
273#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100274#if CONFIG_GRSIM
275/* GRSIM configuration */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100276#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100277#else
278/* TSIM configuration */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100279#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x81805220
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100280#endif
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100281#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100282
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100283/* GRLIB FT-MCTRL configuration */
284#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
285#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
286#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
287#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100288
289/* no DDR controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100290#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100291
292/* no DDR2 Controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100293#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100294
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100295/* default kernel command line */
296#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
297
Francois Retief4c547752015-10-28 16:49:02 +0200298#define CONFIG_IDENT_STRING " Gaisler GRSIM"
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100299
Francois Retiefb6b280c2014-11-04 16:51:44 +0200300/* TSIM command:
301 * $ ./tsim-leon3 -mmu -cas
302 *
303 * This TSIM evaluation version will expire 2015-04-02
304 *
305 *
306 * TSIM/LEON3 SPARC simulator, version 2.0.35 (evaluation version)
307 *
308 * Copyright (C) 2014, Aeroflex Gaisler - all rights reserved.
309 * This software may only be used with a valid license.
310 * For latest updates, go to http://www.gaisler.com/
311 * Comments or bug-reports to support@gaisler.com
312 *
313 * serial port A on stdin/stdout
314 * allocated 4096 K SRAM memory, in 1 bank
315 * allocated 32 M SDRAM memory, in 1 bank
316 * allocated 2048 K ROM memory
317 * icache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
318 * dcache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
319 * tsim> leon
320 * 0x80000000 Memory configuration register 1 0x000002ff
321 * 0x80000004 Memory configuration register 2 0x81805220
322 * 0x80000008 Memory configuration register 3 0x00000000
323 */
324
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100325#endif /* __CONFIG_H */