wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 1 | /* |
| 2 | * i2c Support for Atmel's AT91RM9200 Two-Wire Interface |
| 3 | * |
| 4 | * (c) Rick Bronson |
| 5 | * |
| 6 | * Borrowed heavily from original work by: |
| 7 | * Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com> |
| 8 | * |
| 9 | * Modified to work with u-boot by (C) 2004 Gary Jennejohn garyj@denx.de |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2 of the License, or |
| 14 | * (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 24 | * |
| 25 | */ |
| 26 | #include <common.h> |
| 27 | |
| 28 | #ifdef CONFIG_HARD_I2C |
| 29 | |
| 30 | #include <i2c.h> |
| 31 | #include <asm/io.h> |
| 32 | #include <asm/arch/hardware.h> |
| 33 | |
| 34 | #include <at91rm9200_i2c.h> |
| 35 | |
| 36 | static int debug = 0; |
| 37 | |
| 38 | /* |
| 39 | * Poll the i2c status register until the specified bit is set. |
| 40 | * Returns 0 if timed out (100 msec) |
| 41 | */ |
| 42 | static short at91_poll_status(AT91PS_TWI twi, unsigned long bit) { |
| 43 | int loop_cntr = 10000; |
| 44 | do { |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame^] | 45 | udelay(10); |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 46 | } while (!(twi->TWI_SR & bit) && (--loop_cntr > 0)); |
| 47 | |
| 48 | return (loop_cntr > 0); |
| 49 | } |
| 50 | |
| 51 | /* |
| 52 | * Generic i2c master transfer entrypoint |
| 53 | * |
| 54 | * rw == 1 means that this is a read |
| 55 | */ |
| 56 | static int |
| 57 | at91_xfer(unsigned char chip, unsigned int addr, int alen, |
| 58 | unsigned char *buffer, int len, int rw) |
| 59 | { |
| 60 | AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE; |
| 61 | int length; |
| 62 | unsigned char *buf; |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 63 | /* Set the TWI Master Mode Register */ |
| 64 | twi->TWI_MMR = (chip << 16) | (alen << 8) |
| 65 | | ((rw == 1) ? AT91C_TWI_MREAD : 0); |
| 66 | |
| 67 | /* Set TWI Internal Address Register with first messages data field */ |
| 68 | /* only one address byte is supported */ |
| 69 | if (alen > 0) |
| 70 | twi->TWI_IADR = addr & 0xff; |
| 71 | |
| 72 | length = len; |
| 73 | buf = buffer; |
| 74 | if (length && buf) { /* sanity check */ |
| 75 | if (rw) { |
| 76 | twi->TWI_CR = AT91C_TWI_START; |
| 77 | while (length--) { |
| 78 | if (!length) |
| 79 | twi->TWI_CR = AT91C_TWI_STOP; |
| 80 | /* Wait until transfer is finished */ |
| 81 | if (!at91_poll_status(twi, AT91C_TWI_RXRDY)) { |
| 82 | if (debug) |
| 83 | printf("at91_i2c: timeout 1\n"); |
| 84 | return 1; |
| 85 | } |
| 86 | *buf++ = twi->TWI_RHR; |
| 87 | } |
| 88 | if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) { |
| 89 | if (debug) |
| 90 | printf("at91_i2c: timeout 2\n"); |
| 91 | return 1; |
| 92 | } |
| 93 | } else { |
| 94 | twi->TWI_CR = AT91C_TWI_START; |
| 95 | while (length--) { |
| 96 | twi->TWI_THR = *buf++; |
| 97 | if (!length) |
| 98 | twi->TWI_CR = AT91C_TWI_STOP; |
| 99 | if (!at91_poll_status(twi, AT91C_TWI_TXRDY)) { |
| 100 | if (debug) |
| 101 | printf("at91_i2c: timeout 3\n"); |
| 102 | return 1; |
| 103 | } |
| 104 | } |
| 105 | /* Wait until transfer is finished */ |
| 106 | if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) { |
| 107 | if (debug) |
| 108 | printf("at91_i2c: timeout 4\n"); |
| 109 | return 1; |
| 110 | } |
| 111 | } |
| 112 | } |
| 113 | return 0; |
| 114 | } |
| 115 | |
| 116 | int |
| 117 | i2c_probe(unsigned char chip) |
| 118 | { |
| 119 | char buffer[1]; |
| 120 | |
| 121 | return at91_xfer(chip, 0, 0, buffer, 1, 1); |
| 122 | } |
| 123 | |
| 124 | int |
| 125 | i2c_read(unsigned char chip, unsigned int addr, int alen, |
| 126 | unsigned char *buffer, int len) |
| 127 | { |
wdenk | b650851 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 128 | #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 129 | /* we only allow one address byte */ |
| 130 | if (alen > 1) |
| 131 | return 1; |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 132 | /* XXX assume an ATMEL AT24C16 */ |
| 133 | if (alen == 1) { |
wdenk | b650851 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 134 | #if 0 /* EEPROM code already sets this correctly */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 135 | chip |= (addr >> 8) & 0xff; |
wdenk | b650851 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 136 | #endif |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 137 | addr = addr & 0xff; |
| 138 | } |
| 139 | #endif |
| 140 | return at91_xfer(chip, addr, alen, buffer, len, 1); |
| 141 | } |
| 142 | |
| 143 | int |
| 144 | i2c_write(unsigned char chip, unsigned int addr, int alen, |
| 145 | unsigned char *buffer, int len) |
| 146 | { |
| 147 | int i; |
| 148 | unsigned char *buf; |
| 149 | |
wdenk | b650851 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 150 | #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 151 | /* we only allow one address byte */ |
| 152 | if (alen > 1) |
| 153 | return 1; |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 154 | /* XXX assume an ATMEL AT24C16 */ |
| 155 | if (alen == 1) { |
| 156 | buf = buffer; |
| 157 | /* do single byte writes */ |
| 158 | for (i = 0; i < len; i++) { |
wdenk | b650851 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 159 | #if 0 /* EEPROM code already sets this correctly */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 160 | chip |= (addr >> 8) & 0xff; |
wdenk | b650851 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 161 | #endif |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 162 | addr = addr & 0xff; |
| 163 | if (at91_xfer(chip, addr, alen, buf++, 1, 0)) |
| 164 | return 1; |
wdenk | b650851 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 165 | addr++; |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 166 | } |
wdenk | b650851 | 2004-10-10 18:03:33 +0000 | [diff] [blame] | 167 | return 0; |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 168 | } |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 169 | #endif |
| 170 | return at91_xfer(chip, addr, alen, buffer, len, 0); |
| 171 | } |
| 172 | |
| 173 | /* |
| 174 | * Main initialization routine |
| 175 | */ |
| 176 | void |
| 177 | i2c_init(int speed, int slaveaddr) |
| 178 | { |
| 179 | AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE; |
| 180 | |
| 181 | *AT91C_PIOA_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK; |
| 182 | *AT91C_PIOA_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK; |
| 183 | *AT91C_PIOA_MDER = AT91C_PA25_TWD | AT91C_PA26_TWCK; |
| 184 | *AT91C_PMC_PCER = 1 << AT91C_ID_TWI; /* enable peripheral clock */ |
| 185 | |
| 186 | twi->TWI_IDR = 0x3ff; /* Disable all interrupts */ |
| 187 | twi->TWI_CR = AT91C_TWI_SWRST; /* Reset peripheral */ |
| 188 | twi->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS; /* Set Master mode */ |
| 189 | |
| 190 | /* Here, CKDIV = 1 and CHDIV=CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */ |
| 191 | twi->TWI_CWGR = AT91C_TWI_CKDIV1 | AT91C_TWI_CLDIV3 | (AT91C_TWI_CLDIV3 << 8); |
| 192 | |
| 193 | printf("Found AT91 i2c\n"); |
| 194 | return; |
| 195 | } |
| 196 | #endif /* CONFIG_HARD_I2C */ |