blob: 64e0526e88da92dfdf63df42add68877a4794976 [file] [log] [blame]
wdenk983fda82004-10-28 00:09:35 +00001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * CPU specific code for the MPC8220 CPUs
26 */
27
28#include <common.h>
29#include <watchdog.h>
30#include <command.h>
31#include <mpc8220.h>
Ben Warrena9bec962008-10-22 23:47:51 -070032#include <netdev.h>
wdenk983fda82004-10-28 00:09:35 +000033#include <asm/processor.h>
34
Wolfgang Denkd87080b2006-03-31 18:32:53 +020035DECLARE_GLOBAL_DATA_PTR;
36
wdenk983fda82004-10-28 00:09:35 +000037int checkcpu (void)
38{
wdenk983fda82004-10-28 00:09:35 +000039 ulong clock = gd->cpu_clk;
40 char buf[32];
41
42 puts ("CPU: ");
43
44 printf (CPU_ID_STR);
45
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046 printf (" (JTAG ID %08lx)", *(vu_long *) (CONFIG_SYS_MBAR + 0x50));
wdenk983fda82004-10-28 00:09:35 +000047
48 printf (" at %s MHz\n", strmhz (buf, clock));
49
50 return 0;
51}
52
53/* ------------------------------------------------------------------------- */
54
Wolfgang Denk54841ab2010-06-28 22:00:46 +020055int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
wdenk983fda82004-10-28 00:09:35 +000056{
57 volatile gptmr8220_t *gptmr = (volatile gptmr8220_t *) MMAP_GPTMR;
58 ulong msr;
59
60 /* Interrupts and MMU off */
61 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
62
63 msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
64 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
65
66 /* Charge the watchdog timer */
67 gptmr->Prescl = 10;
68 gptmr->Count = 1;
69
70 gptmr->Mode = GPT_TMS_SGPIO;
71
72 gptmr->Control = GPT_CTRL_WDEN | GPT_CTRL_CE;
73
74 return 1;
75}
76
77/* ------------------------------------------------------------------------- */
78
79/*
80 * Get timebase clock frequency (like cpu_clk in Hz)
81 *
82 */
83unsigned long get_tbclk (void)
84{
wdenk983fda82004-10-28 00:09:35 +000085 ulong tbclk;
86
87 tbclk = (gd->bus_clk + 3L) / 4L;
88
89 return (tbclk);
90}
91
92/* ------------------------------------------------------------------------- */
Ben Warrena9bec962008-10-22 23:47:51 -070093
94/*
95 * Initializes on-chip ethernet controllers.
96 * to override, implement board_eth_init()
97 */
98int cpu_eth_init(bd_t *bis)
99{
100#if defined(CONFIG_MPC8220_FEC)
101 mpc8220_fec_initialize(bis);
102#endif
103 return 0;
104}