Blame - arch/m68k/cpu/mcf52x2/start.S - platform/external/u-boot

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Tom Rini	83d290c	2018-05-06 17:58:06 -0400	[diff] [blame]	1	/* SPDX-License-Identifier: GPL-2.0+ */
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	2	/*
				3	* Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
				4	* Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	5	*/
				6
Wolfgang Denk	25ddd1f	2010-10-26 14:34:52 +0200	[diff] [blame]	7	#include <asm-offsets.h>
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	8	#include <config.h>
				9	#include "version.h"
TsiChung Liew	dd9f054	2010-03-11 22:12:53 -0600	[diff] [blame]	10	#include <asm/cache.h>
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	11
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	12	#define _START _start
				13	#define _FAULT _fault
				14
				15
				16	#define SAVE_ALL \
				17	move.w #0x2700,%sr; /* disable intrs */ \
				18	subl #60,%sp; /* space for 15 regs */ \
				19	moveml %d0-%d7/%a0-%a6,%sp@; \
				20
				21	#define RESTORE_ALL \
				22	moveml %sp@,%d0-%d7/%a0-%a6; \
				23	addl #60,%sp; /* space for 15 regs */ \
				24	rte
				25
				26	/* If we come from a pre-loader we don't need an initial exception
				27	* table.
				28	*/
				29	#if !defined(CONFIG_MONITOR_IS_IN_RAM)
				30
				31	.text
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	32
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	33	/*
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	34	* Vector table. This is used for initial platform startup.
				35	* These vectors are to catch any un-intended traps.
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	36	*/
				37	_vectors:
Wolfgang Denk	4176c79	2006-06-10 19:27:47 +0200	[diff] [blame]	38	.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
Wolfgang Denk	14d0a02	2010-10-07 21:51:12 +0200	[diff] [blame]	39	#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
				40	.long _start - CONFIG_SYS_TEXT_BASE
Zachary P. Landau	eacbd31	2006-01-26 17:35:56 -0500	[diff] [blame]	41	#else
Wolfgang Denk	4176c79	2006-06-10 19:27:47 +0200	[diff] [blame]	42	.long _START
Zachary P. Landau	eacbd31	2006-01-26 17:35:56 -0500	[diff] [blame]	43	#endif
Wolfgang Denk	4176c79	2006-06-10 19:27:47 +0200	[diff] [blame]	44
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	45	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				46	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				47	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				48	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				49	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				50	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				51	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				52	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				53
				54	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				55	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				56	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				57	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				58	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				59	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				60	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				61	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				62
				63	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				64	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				65	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				66	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				67	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				68	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				69	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				70	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				71
				72	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				73	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				74	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				75	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				76	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				77	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				78	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				79	.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
				80
				81	#endif
				82
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	83	.text
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	84
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	85	#if defined(CONFIG_SYS_INT_FLASH_BASE) && \
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	86	(defined(CONFIG_M5282) \|\| defined(CONFIG_M5281))
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	87	#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
				88	.long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
				89	.long 0xFFFFFFFF /* all sectors protected */
				90	.long 0x00000000 /* supervisor/User restriction */
				91	.long 0x00000000 /* programm/data space restriction */
				92	.long 0x00000000 /* Flash security */
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	93	#endif
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	94	#endif
				95
				96	.globl _start
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	97	_start:
				98	nop
				99	nop
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	100	move.w #0x2700,%sr
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	101
TsiChung Liew	bf9a521	2009-06-12 11:29:00 +0000	[diff] [blame]	102	#if defined(CONFIG_M5208)
				103	/* Initialize RAMBAR: locate SRAM and validate it */
				104	move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
				105	movec %d0, %RAMBAR1
				106	#endif
				107
TsiChungLiew	a1436a8	2007-08-16 13:20:50 -0500	[diff] [blame]	108	#if defined(CONFIG_M5272) \|\| defined(CONFIG_M5249) \|\| defined(CONFIG_M5253)
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	109	/* set MBAR address + valid flag */
				110	move.l #(CONFIG_SYS_MBAR + 1), %d0
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	111	move.c %d0, %MBAR
				112
stroese	8c725b9	2004-12-16 18:09:49 +0000	[diff] [blame]	113	/* The 5249 has MBAR2 as well */
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	114	#ifdef CONFIG_SYS_MBAR2
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	115	/* Get MBAR2 address */
				116	move.l #(CONFIG_SYS_MBAR2 + 1), %d0
				117	/* Set MBAR2 */
				118	movec %d0, #0xc0e
stroese	8c725b9	2004-12-16 18:09:49 +0000	[diff] [blame]	119	#endif
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	120	move.l #(CONFIG_SYS_INIT_RAM_ADDR + 1), %d0
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	121	movec %d0, %RAMBAR0
TsiChungLiew	a1436a8	2007-08-16 13:20:50 -0500	[diff] [blame]	122	#endif /* CONFIG_M5272 \|\| CONFIG_M5249 \|\| CONFIG_M5253 */
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	123
Wolfgang Denk	4176c79	2006-06-10 19:27:47 +0200	[diff] [blame]	124	#if defined(CONFIG_M5282) \|\| defined(CONFIG_M5271)
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	125	/* set MBAR address + valid flag */
				126	move.l #(CONFIG_SYS_MBAR + 1), %d0
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	127	move.l %d0, 0x40000000
				128
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	129	/* Initialize RAMBAR1: locate SRAM and validate it */
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	130	move.l #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	131	movec %d0, %RAMBAR1
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	132
Bartlomiej Sieka	daa6e41	2006-12-20 00:27:32 +0100	[diff] [blame]	133	#if defined(CONFIG_M5282)
Wolfgang Denk	14d0a02	2010-10-07 21:51:12 +0200	[diff] [blame]	134	#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	135	/*
				136	* Setup code in SRAM to initialize FLASHBAR,
				137	* if start from internal Flash
				138	*/
				139	move.l #(_flashbar_setup-CONFIG_SYS_INT_FLASH_BASE), %a0
				140	move.l #(_flashbar_setup_end-CONFIG_SYS_INT_FLASH_BASE), %a1
				141	move.l #(CONFIG_SYS_INIT_RAM_ADDR), %a2
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	142	_copy_flash:
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	143	move.l (%a0)+, (%a2)+
				144	cmp.l %a0, %a1
				145	bgt.s _copy_flash
				146	jmp CONFIG_SYS_INIT_RAM_ADDR
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	147
				148	_flashbar_setup:
				149	/* Initialize FLASHBAR: locate internal Flash and validate it */
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	150	move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
TsiChung Liew	43d6064	2008-03-13 14:26:32 -0500	[diff] [blame]	151	movec %d0, %FLASHBAR
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	152	jmp _after_flashbar_copy.L /* Force jump to absolute address */
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	153	_flashbar_setup_end:
				154	nop
				155	_after_flashbar_copy:
				156	#else
				157	/* Setup code to initialize FLASHBAR, if start from external Memory */
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	158	move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
TsiChung Liew	4cb4e65	2008-08-11 15:54:25 +0000	[diff] [blame]	159	movec %d0, %FLASHBAR
Wolfgang Denk	14d0a02	2010-10-07 21:51:12 +0200	[diff] [blame]	160	#endif /* (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	161
				162	#endif
Wolfgang Denk	6741ae9	2006-09-04 01:03:57 +0200	[diff] [blame]	163	#endif
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	164	/*
				165	* if we come from a pre-loader we have no exception table and
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	166	* therefore no VBR to set
				167	*/
				168	#if !defined(CONFIG_MONITOR_IS_IN_RAM)
Wolfgang Denk	14d0a02	2010-10-07 21:51:12 +0200	[diff] [blame]	169	#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	170	move.l #CONFIG_SYS_INT_FLASH_BASE, %d0
TsiChungLiew	2acefa7	2007-10-25 17:09:17 -0500	[diff] [blame]	171	#else
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	172	move.l #CONFIG_SYS_FLASH_BASE, %d0
TsiChungLiew	2acefa7	2007-10-25 17:09:17 -0500	[diff] [blame]	173	#endif
Heiko Schocher	9acb626	2006-04-20 08:42:42 +0200	[diff] [blame]	174	movec %d0, %VBR
Marian Balakowicz	6f5155a	2006-05-09 11:51:51 +0200	[diff] [blame]	175	#endif
				176
Matthew Fettke	f71d9d9	2008-02-04 15:38:20 -0600	[diff] [blame]	177	#ifdef CONFIG_M5275
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	178	/* set MBAR address + valid flag */
				179	move.l #(CONFIG_SYS_MBAR + 1), %d0
Matthew Fettke	f71d9d9	2008-02-04 15:38:20 -0600	[diff] [blame]	180	move.l %d0, 0x40000000
				181	/* movec %d0, %MBAR */
				182
				183	/* Initialize RAMBAR: locate SRAM and validate it */
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	184	move.l #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
Matthew Fettke	f71d9d9	2008-02-04 15:38:20 -0600	[diff] [blame]	185	movec %d0, %RAMBAR1
				186	#endif
				187
TsiChung Liew	dd9f054	2010-03-11 22:12:53 -0600	[diff] [blame]	188	/* initialize general use internal ram */
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	189	move.l #0, %d0
				190	move.l #(ICACHE_STATUS), %a1 /* icache */
				191	move.l #(DCACHE_STATUS), %a2 /* icache */
				192	move.l %d0, (%a1)
				193	move.l %d0, (%a2)
TsiChung Liew	dd9f054	2010-03-11 22:12:53 -0600	[diff] [blame]	194
angelo@sysam.it	5044c9c	2016-04-27 21:50:44 +0200	[diff] [blame]	195	/* put relocation table address to a5 */
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	196	move.l #__got_start, %a5
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	197
angelo@sysam.it	5044c9c	2016-04-27 21:50:44 +0200	[diff] [blame]	198	/* setup stack initially on top of internal static ram */
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	199	move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
angelo@sysam.it	5044c9c	2016-04-27 21:50:44 +0200	[diff] [blame]	200
				201	/*
				202	* if configured, malloc_f arena will be reserved first,
				203	* then (and always) gd struct space will be reserved
				204	*/
				205	move.l %sp, -(%sp)
				206	move.l #board_init_f_alloc_reserve, %a1
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	207	jsr (%a1)
angelo@sysam.it	5044c9c	2016-04-27 21:50:44 +0200	[diff] [blame]	208
				209	/* update stack and frame-pointers */
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	210	move.l %d0, %sp
				211	move.l %sp, %fp
angelo@sysam.it	5044c9c	2016-04-27 21:50:44 +0200	[diff] [blame]	212
				213	/* initialize reserved area */
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	214	move.l %d0, -(%sp)
angelo@sysam.it	5044c9c	2016-04-27 21:50:44 +0200	[diff] [blame]	215	move.l #board_init_f_init_reserve, %a1
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	216	jsr (%a1)
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	217
angelo@sysam.it	55ac54c	2016-04-12 00:30:59 +0200	[diff] [blame]	218	/* run low-level CPU init code (from flash) */
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	219	move.l #cpu_init_f, %a1
				220	jsr (%a1)
				221
angelo@sysam.it	55ac54c	2016-04-12 00:30:59 +0200	[diff] [blame]	222	/* run low-level board init code (from flash) */
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	223	clr.l %sp@-
				224	move.l #board_init_f, %a1
				225	jsr (%a1)
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	226
Marian Balakowicz	6f5155a	2006-05-09 11:51:51 +0200	[diff] [blame]	227	/* board_init_f() does not return */
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	228
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	229	/******************************************************************************/
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	230
				231	/*
Simon Glass	9413387	2019-12-28 10:44:45 -0700	[diff] [blame]	232	* void relocate_code(addr_sp, gd, addr_moni)
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	233	*
				234	* This "function" does not return, instead it continues in RAM
				235	* after relocating the monitor code.
				236	*
				237	* r3 = dest
				238	* r4 = src
				239	* r5 = length in bytes
				240	* r6 = cachelinesize
				241	*/
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	242	.globl relocate_code
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	243	relocate_code:
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	244	link.w %a6,#0
				245	move.l 8(%a6), %sp /* set new stack pointer */
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	246
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	247	move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
				248	move.l 16(%a6), %a0 /* Save copy of Destination Address */
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	249
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	250	move.l #CONFIG_SYS_MONITOR_BASE, %a1
				251	move.l #__init_end, %a2
				252	move.l %a0, %a3
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	253	/* copy the code to RAM */
				254	1:
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	255	move.l (%a1)+, (%a3)+
				256	cmp.l %a1,%a2
				257	bgt.s 1b
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	258
				259	/*
				260	* We are done. Do not return, instead branch to second part of board
				261	* initialization, now running from RAM.
				262	*/
Wolfgang Denk	53677ef	2008-05-20 16:00:29 +0200	[diff] [blame]	263	move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	264	add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	265	jmp (%a1)
				266
				267	in_ram:
				268
				269	clear_bss:
Wolfgang Denk	53677ef	2008-05-20 16:00:29 +0200	[diff] [blame]	270	/*
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	271	* Now clear BSS segment
				272	*/
				273	move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	274	add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	275	move.l %a0, %d1
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	276	add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	277	6:
				278	clr.l (%a1)+
				279	cmp.l %a1,%d1
				280	bgt.s 6b
				281
				282	/*
				283	* fix got table in RAM
				284	*/
				285	move.l %a0, %a1
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	286	add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	287	move.l %a1,%a5 /* fix got pointer register a5 */
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	288
				289	move.l %a0, %a2
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	290	add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	291
				292	7:
				293	move.l (%a1),%d1
				294	sub.l #_start,%d1
				295	add.l %a0,%d1
				296	move.l %d1,(%a1)+
				297	cmp.l %a2, %a1
				298	bne 7b
				299
				300	/* calculate relative jump to board_init_r in ram */
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	301	move.l %a0, %a1
				302	add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	303
				304	/* set parameters for board_init_r */
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	305	move.l %a0,-(%sp) /* dest_addr */
				306	move.l %d0,-(%sp) /* gd */
Wolfgang Denk	14d0a02	2010-10-07 21:51:12 +0200	[diff] [blame]	307	#if defined(DEBUG) && (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) && \
Jean-Christophe PLAGNIOL-VILLARD	6d0f6bc	2008-10-16 15:01:15 +0200	[diff] [blame]	308	defined(CONFIG_SYS_HALT_BEFOR_RAM_JUMP)
TsiChungLiew	83ec20b	2007-08-15 19:21:21 -0500	[diff] [blame]	309	halt
				310	#endif
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	311	jsr (%a1)
				312
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	313	/******************************************************************************/
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	314
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	315	/* exception code */
				316	.globl _fault
				317	_fault:
				318	bra _fault
				319
				320	.globl _exc_handler
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	321	_exc_handler:
				322	SAVE_ALL
				323	movel %sp,%sp@-
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	324	bsr exc_handler
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	325	addql #4,%sp
				326	RESTORE_ALL
				327
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	328	.globl _int_handler
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	329	_int_handler:
				330	SAVE_ALL
				331	movel %sp,%sp@-
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	332	bsr int_handler
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	333	addql #4,%sp
				334	RESTORE_ALL
				335
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	336	/******************************************************************************/
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	337
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	338	.globl version_string
wdenk	bf9e3b3	2004-02-12 00:47:09 +0000	[diff] [blame]	339	version_string:
Angelo Dureghello	5c928d0	2016-05-22 00:14:29 +0200	[diff] [blame]	340	.ascii U_BOOT_VERSION_STRING, "\0"
				341	.align 4