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Masahiro Yamadaddd960e2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass53b5bf32016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glass77d2f7f2016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glasscc4288e2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse00f76c2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Stephen Warren49626ea2016-07-18 12:17:11 -060015config TEGRA_IVC
16 bool "Tegra IVC protocol"
17 help
18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
19 (Inter Processor Communication) framework. Within the context of
20 U-Boot, it is typically used for communication between the main CPU
21 and various auxiliary processors.
22
Stephen Warren15bcc622015-11-23 10:32:01 -070023config TEGRA_COMMON
24 bool "Tegra common options"
Michal Simek5ed063d2018-07-23 15:55:13 +020025 select BINMAN
26 select BOARD_EARLY_INIT_F
Stephen Warren140a9ea2016-09-13 10:46:00 -060027 select CLK
Tom Warren56079ec2015-07-17 08:12:51 -070028 select DM
Simon Glass96350f72015-11-29 13:18:01 -070029 select DM_ETH
Tom Warren56079ec2015-07-17 08:12:51 -070030 select DM_GPIO
Stephen Warren15bcc622015-11-23 10:32:01 -070031 select DM_I2C
Simon Glassf77f5e92015-10-18 21:17:16 -060032 select DM_KEYBOARD
Tom Warren6a474db2016-09-13 10:45:48 -060033 select DM_MMC
Simon Glass91c08af2016-01-30 16:38:01 -070034 select DM_PWM
Stephen Warren140a9ea2016-09-13 10:46:00 -060035 select DM_RESET
Stephen Warren15bcc622015-11-23 10:32:01 -070036 select DM_SERIAL
37 select DM_SPI
38 select DM_SPI_FLASH
Stephen Warren140a9ea2016-09-13 10:46:00 -060039 select MISC
Stephen Warren15bcc622015-11-23 10:32:01 -070040 select OF_CONTROL
Michal Simek5ed063d2018-07-23 15:55:13 +020041 select SPI
Simon Glassd6ef8a62016-02-16 18:09:19 -070042 select VIDCONSOLE_AS_LCD if DM_VIDEO
Michal Simek08a00cb2018-07-23 15:55:14 +020043 imply CMD_DM
Daniel Thompson221a9492017-05-19 17:26:58 +010044 imply CRC32_VERIFY
Stephen Warren15bcc622015-11-23 10:32:01 -070045
Stephen Warren140a9ea2016-09-13 10:46:00 -060046config TEGRA_NO_BPMP
47 bool "Tegra common options for SoCs without BPMP"
48 select TEGRA_CAR
49 select TEGRA_CAR_CLOCK
50 select TEGRA_CAR_RESET
51
Stephen Warren15bcc622015-11-23 10:32:01 -070052config TEGRA_ARMV7_COMMON
53 bool "Tegra 32-bit common options"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053054 select CPU_V7A
Stephen Warren15bcc622015-11-23 10:32:01 -070055 select SPL
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080056 select SPL_BOARD_INIT if SPL
Stephen Warren15bcc622015-11-23 10:32:01 -070057 select SUPPORT_SPL
58 select TEGRA_COMMON
Stephen Warren601800b2016-05-12 12:07:41 -060059 select TEGRA_GPIO
Stephen Warren140a9ea2016-09-13 10:46:00 -060060 select TEGRA_NO_BPMP
Stephen Warren15bcc622015-11-23 10:32:01 -070061
62config TEGRA_ARMV8_COMMON
63 bool "Tegra 64-bit common options"
64 select ARM64
Stephen Warrenddecaaf2018-01-03 14:31:52 -070065 select LINUX_KERNEL_IMAGE_HEADER
Stephen Warren15bcc622015-11-23 10:32:01 -070066 select TEGRA_COMMON
Tom Warren56079ec2015-07-17 08:12:51 -070067
Stephen Warrenddecaaf2018-01-03 14:31:52 -070068if TEGRA_ARMV8_COMMON
69config LNX_KRNL_IMG_TEXT_OFFSET_BASE
70 default 0x80000000
71endif
72
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090073choice
74 prompt "Tegra SoC select"
Joe Hershbergera26cd042015-05-12 14:46:23 -050075 optional
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090076
77config TEGRA20
78 bool "Tegra20 family"
Tom Rini8dda2e22017-03-07 07:13:42 -050079 select ARM_ERRATA_716044
80 select ARM_ERRATA_742230
81 select ARM_ERRATA_751472
Tom Warren56079ec2015-07-17 08:12:51 -070082 select TEGRA_ARMV7_COMMON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090083
84config TEGRA30
85 bool "Tegra30 family"
Tom Rini8dda2e22017-03-07 07:13:42 -050086 select ARM_ERRATA_743622
87 select ARM_ERRATA_751472
Tom Warren56079ec2015-07-17 08:12:51 -070088 select TEGRA_ARMV7_COMMON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090089
90config TEGRA114
91 bool "Tegra114 family"
Tom Warren56079ec2015-07-17 08:12:51 -070092 select TEGRA_ARMV7_COMMON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090093
94config TEGRA124
95 bool "Tegra124 family"
Tom Warren56079ec2015-07-17 08:12:51 -070096 select TEGRA_ARMV7_COMMON
Simon Glass66de3ee2017-07-25 08:29:58 -060097 imply REGMAP
98 imply SYSCON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +090099
Tom Warren7aaa5a62015-03-04 16:36:00 -0700100config TEGRA210
101 bool "Tegra210 family"
Stephen Warren15bcc622015-11-23 10:32:01 -0700102 select TEGRA_ARMV8_COMMON
Michal Simek5ed063d2018-07-23 15:55:13 +0200103 select TEGRA_GPIO
Stephen Warren140a9ea2016-09-13 10:46:00 -0600104 select TEGRA_NO_BPMP
Tom Warren7aaa5a62015-03-04 16:36:00 -0700105
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600106config TEGRA186
107 bool "Tegra186 family"
Stephen Warren0f67e232016-06-17 09:43:57 -0600108 select DM_MAILBOX
Stephen Warren73dd5c42016-08-08 09:41:34 -0600109 select TEGRA186_BPMP
Stephen Warrend9fd7002016-08-08 11:28:24 -0600110 select TEGRA186_CLOCK
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600111 select TEGRA186_GPIO
Stephen Warren4dd99d12016-08-08 11:28:25 -0600112 select TEGRA186_RESET
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600113 select TEGRA_ARMV8_COMMON
Stephen Warren0f67e232016-06-17 09:43:57 -0600114 select TEGRA_HSP
Stephen Warren49626ea2016-07-18 12:17:11 -0600115 select TEGRA_IVC
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600116
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900117endchoice
118
Stephen Warrendd8204d2016-01-26 10:59:42 -0700119config TEGRA_DISCONNECT_UDC_ON_BOOT
120 bool "Disconnect USB device mode controller on boot"
121 default y
122 help
123 When loading U-Boot into RAM over USB protocols using tools such as
124 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
125 mode controller is initialized and enumerated by the host PC running
126 the tool. Unfortunately, these tools do not shut down the USB
127 controller before executing the downloaded code, and so the host PC
128 does not "de-enumerate" the USB device. This option shuts down the
129 USB controller when U-Boot boots to avoid leaving a stale USB device
130 present.
131
Simon Glassb724bd72015-02-11 16:32:59 -0700132config SYS_MALLOC_F_LEN
133 default 0x1800
134
Masahiro Yamada09f455d2015-02-20 17:04:04 +0900135source "arch/arm/mach-tegra/tegra20/Kconfig"
136source "arch/arm/mach-tegra/tegra30/Kconfig"
137source "arch/arm/mach-tegra/tegra114/Kconfig"
138source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warren7aaa5a62015-03-04 16:36:00 -0700139source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600140source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900141
Simon Glass42e6f852017-05-17 03:25:11 -0600142config CMD_ENTERRCM
143 bool "Enable 'enterrcm' command"
144 default y
145 help
146 Tegra's boot ROM supports a mode whereby code may be downloaded and
147 flash-programmed over a USB connection. On dev boards, this is
148 typically entered by holding down a "force recovery" button and
149 resetting the CPU. However, not all boards have such a button (one
150 example is the Compulab Trimslice), so a method to enter RCM from
151 software is useful.
152
153 Even on boards other than Trimslice, controlling this over a UART
154 may be useful, e.g. to allow simple remote control without the need
155 for mechanical button actuators, or hooking up relays/... to the
156 button.
157
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900158endif