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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / a156b6ce0f04c29fdf8cba8910f17637e043fd6c / . / arch / arm / mach-zynqmp / Kconfig
blob: 7e7c87d16fa94f0ea81713a7f082089810ae05cc [file] [log] [blame]
Siva Durga Prasad Paladugu0b54a9d2015-06-10 15:50:57 +0530[diff] [blame]1if ARCH_ZYNQMP
2
Tien Fong Chee0c3a9ed2019-01-23 14:20:03 +0800[diff] [blame]3config SPL_FS_FAT
Simon Glassae56db52016-09-12 23:18:38 -0600[diff] [blame]4 default y
5
Simon Glass77d2f7f2016-09-12 23:18:41 -0600[diff] [blame]6config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glass1646eba2016-09-12 23:18:42 -0600[diff] [blame]9config SPL_LIBDISK_SUPPORT
10 default y
11
Simon Glasscc4288e2016-09-12 23:18:43 -0600[diff] [blame]12config SPL_LIBGENERIC_SUPPORT
13 default y
14
Simon Glass103c5f12021-08-08 12:20:09 -0600[diff] [blame]15config SPL_MMC
Alexandru Gagniuc0dcf18c2017-04-04 10:02:58 -0700[diff] [blame]16 default y if MMC_SDHCI_ZYNQ
Simon Glass1fdf7c62016-09-12 23:18:44 -0600[diff] [blame]17
Simon Glass2a736062021-08-08 12:20:12 -0600[diff] [blame]18config SPL_SERIAL
Simon Glasse00f76c2016-09-12 23:18:56 -0600[diff] [blame]19 default y
20
Simon Glasse404ade2016-09-12 23:18:57 -0600[diff] [blame]21config SPL_SPI_FLASH_SUPPORT
22 default y if ZYNQ_QSPI
23
Simon Glassea2ca7e2021-08-08 12:20:14 -0600[diff] [blame]24config SPL_SPI
Simon Glassf35ed9e2016-09-12 23:18:58 -0600[diff] [blame]25 default y if ZYNQ_QSPI
26
Michal Simek84c72042015-01-15 10:01:51 +0100[diff] [blame]27config SYS_BOARD
Liam Beguin18141942021-10-20 11:25:18 -0400[diff] [blame]28 string "Board name"
Michal Simek84c72042015-01-15 10:01:51 +0100[diff] [blame]29 default "zynqmp"
30
31config SYS_VENDOR
Mike Looijmansef4cab92017-01-03 09:47:52 +0100[diff] [blame]32 string "Vendor name"
Michal Simek84c72042015-01-15 10:01:51 +0100[diff] [blame]33 default "xilinx"
34
35config SYS_SOC
36 default "zynqmp"
37
38config SYS_CONFIG_NAME
Michal Simeka1108da2016-03-18 18:21:36 +0100[diff] [blame]39 string "Board configuration name"
40 default "xilinx_zynqmp"
41 help
42 This option contains information about board configuration name.
43 Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
44 will be used for board configuration.
Michal Simek84c72042015-01-15 10:01:51 +0100[diff] [blame]45
Siva Durga Prasad Paladugue042d362017-07-13 19:01:11 +0530[diff] [blame]46config SYS_MEM_RSVD_FOR_MMU
47 bool "Reserve memory for MMU Table"
48 help
49 If defined this option is used to setup different space for
50 MMU table than the one which will be allocated during
51 relocation.
52
Mike Looijmans3b646082016-09-20 11:37:24 +0200[diff] [blame]53config BOOT_INIT_FILE
54 string "boot.bin init register filename"
Michal Simek9cf9da72016-12-16 13:00:26 +0100[diff] [blame]55 depends on SPL
Mike Looijmans3b646082016-09-20 11:37:24 +0200[diff] [blame]56 default ""
57 help
58 Add register writes to boot.bin format (max 256 pairs).
59 Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
60
Michal Simekc85a6b72016-10-21 12:58:17 +0200[diff] [blame]61config PMUFW_INIT_FILE
62 string "PMU firmware"
63 depends on SPL
64 default ""
65 help
66 Include external PMUFW (Platform Management Unit FirmWare) to
67 a Xilinx bootable image (boot.bin).
68
Luca Ceresolic28a9cf2019-05-21 18:06:43 +0200[diff] [blame]69config ZYNQMP_SPL_PM_CFG_OBJ_FILE
70 string "PMU firmware configuration object to load at runtime by SPL"
71 depends on SPL
72 help
73 Path to a binary PMU firmware configuration object to be linked
74 into U-Boot SPL and loaded at runtime into the PMU firmware.
75
76 The ZynqMP Power Management Unit (PMU) needs a configuration
77 object for most SoC peripherals to work. To have it loaded by
78 U-Boot SPL set here the file name (absolute path or relative to
79 the top source tree) of your configuration, which must be a
80 binary blob. It will be linked in the SPL binary and loaded
81 into the PMU firmware by U-Boot SPL during board
82 initialization.
83
84 Leave this option empty if your PMU firmware has a hard-coded
85 configuration object or you are loading it by any other means.
86
Siva Durga Prasad Paladugu3b644a32018-01-12 15:35:46 +0530[diff] [blame]87config ZYNQMP_NO_DDR
88 bool "Disable DDR MMU mapping"
89 help
90 This option configures MMU with no DDR to avoid speculative
91 access to DDR memory where DDR is not present.
92
Jorge Ramirez-Ortiz01c77142021-06-13 20:55:53 +0200[diff] [blame]93config SPL_ZYNQMP_DRAM_ECC_INIT
94 bool "Initialize DRAM ECC"
95 depends on SPL
96 help
97 This option initializes all memory to 0xdeadbeef. Must be set if your
98 memory is of ECC type.
99
100config SPL_ZYNQMP_DRAM_BANK1_BASE
101 depends on SPL_ZYNQMP_DRAM_ECC_INIT
102 hex "DRAM Bank1 address"
Michal Simeka156b6c2023-10-26 08:34:31 +0200[diff] [blame^]103 default 0x00000000
104 help
105 Start address of DRAM ECC bank1
Jorge Ramirez-Ortiz01c77142021-06-13 20:55:53 +0200[diff] [blame]106
107config SPL_ZYNQMP_DRAM_BANK1_LEN
108 depends on SPL_ZYNQMP_DRAM_ECC_INIT
109 hex "DRAM Bank1 size"
Michal Simeka156b6c2023-10-26 08:34:31 +0200[diff] [blame^]110 default 0x80000000
111 help
112 Size in bytes of the DRAM ECC bank1
Jorge Ramirez-Ortiz01c77142021-06-13 20:55:53 +0200[diff] [blame]113
114config SPL_ZYNQMP_DRAM_BANK2_BASE
115 depends on SPL_ZYNQMP_DRAM_ECC_INIT
116 hex "DRAM Bank2 address"
Michal Simeka156b6c2023-10-26 08:34:31 +0200[diff] [blame^]117 default 0x800000000
118 help
119 Start address of DRAM ECC bank2
Jorge Ramirez-Ortiz01c77142021-06-13 20:55:53 +0200[diff] [blame]120
121config SPL_ZYNQMP_DRAM_BANK2_LEN
122 depends on SPL_ZYNQMP_DRAM_ECC_INIT
123 hex "DRAM Bank2 size"
Michal Simeka156b6c2023-10-26 08:34:31 +0200[diff] [blame^]124 default 0x0
125 help
126 Size in bytes of the DRAM ECC bank2. A null size takes no action.
Jorge Ramirez-Ortiz01c77142021-06-13 20:55:53 +0200[diff] [blame]127
Simon Glass04e38902016-07-05 17:10:13 -0600[diff] [blame]128config SYS_MALLOC_F_LEN
129 default 0x600
130
Siva Durga Prasad Paladugu189bec42017-07-13 19:01:10 +0530[diff] [blame]131config DEFINE_TCM_OCM_MMAP
132 bool "Define TCM and OCM memory in MMU Table"
Siva Durga Prasad Paladugu89401482017-08-01 16:24:50 +0530[diff] [blame]133 default y if MP
Siva Durga Prasad Paladugu189bec42017-07-13 19:01:10 +0530[diff] [blame]134 help
135 This option if enabled defines the TCM and OCM memory and its
136 memory attributes in MMU table entry.
137
Michal Simekfd1b6352017-07-12 13:21:27 +0200[diff] [blame]138config ZYNQMP_PSU_INIT_ENABLED
139 bool "Include psu_init"
Michal Simek83d29412022-02-17 14:28:40 +0100[diff] [blame]140 select BOARD_EARLY_INIT_F
Michal Simekfd1b6352017-07-12 13:21:27 +0200[diff] [blame]141 help
Michal Simek74673ca2022-12-02 09:18:06 +0100[diff] [blame]142 Include psu_init to full u-boot.
143
144config SPL_ZYNQMP_PSU_INIT_ENABLED
145 bool "Include psu_init in SPL"
146 default y if SPL
147 select BOARD_EARLY_INIT_F
148 help
149 Include psu_init by default in SPL.
Michal Simekfd1b6352017-07-12 13:21:27 +0200[diff] [blame]150
Michal Simek7f491d72016-08-30 16:17:27 +0200[diff] [blame]151config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
152 bool "Overwrite SPL bootmode"
153 depends on SPL
154 help
155 Overwrite bootmode selected via boot mode pins to tell SPL what should
156 be the next boot device.
157
Jorge Ramirez-Ortiz398a74a2021-10-13 15:48:00 +0200[diff] [blame]158config SPL_ZYNQMP_RESTORE_JTAG
159 bool "Restore JTAG"
160 depends on SPL
161 help
162 Booting SPL in secure mode causes the CSU to disable the JTAG interface
163 even if no eFuses were burnt. This option restores the interface if
164 possible.
165
Vipul Kumar5dc5a532018-02-28 15:53:28 +0530[diff] [blame]166config ZYNQ_SDHCI_MAX_FREQ
167 default 200000000
168
Michal Simek7f491d72016-08-30 16:17:27 +0200[diff] [blame]169config SPL_ZYNQMP_ALT_BOOTMODE
170 hex
171 default 0x0 if JTAG_MODE
172 default 0x1 if QSPI_MODE_24BIT
173 default 0x2 if QSPI_MODE_32BIT
174 default 0x3 if SD_MODE
175 default 0x4 if NAND_MODE
176 default 0x5 if SD_MODE1
177 default 0x6 if EMMC_MODE
178 default 0x7 if USB_MODE
Michal Simek26610812016-10-26 09:24:32 +0200[diff] [blame]179 default 0xa if SW_USBHOST_MODE
180 default 0xb if SW_SATA_MODE
Michal Simek011f0c42017-02-15 09:41:53 +0100[diff] [blame]181 default 0xe if SD1_LSHFT_MODE
Michal Simek7f491d72016-08-30 16:17:27 +0200[diff] [blame]182
183choice
184 prompt "Boot mode"
Michal Simeke3672402016-08-30 16:17:27 +0200[diff] [blame]185 depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Ulf Magnussone7563c22018-01-30 14:02:01 +0100[diff] [blame]186 default JTAG_MODE
Michal Simek7f491d72016-08-30 16:17:27 +0200[diff] [blame]187
188config JTAG_MODE
189 bool "JTAG_MODE"
190
191config QSPI_MODE_24BIT
192 bool "QSPI_MODE_24BIT"
193
194config QSPI_MODE_32BIT
195 bool "QSPI_MODE_32BIT"
196
197config SD_MODE
198 bool "SD_MODE"
199
200config SD_MODE1
201 bool "SD_MODE1"
202
203config NAND_MODE
204 bool "NAND_MODE"
205
206config EMMC_MODE
207 bool "EMMC_MODE"
208
209config USB_MODE
210 bool "USB"
211
Michal Simek26610812016-10-26 09:24:32 +0200[diff] [blame]212config SW_USBHOST_MODE
213 bool "SW USBHOST_MODE"
214
215config SW_SATA_MODE
216 bool "SW SATA_MODE"
217
Michal Simek011f0c42017-02-15 09:41:53 +0100[diff] [blame]218config SD1_LSHFT_MODE
219 bool "SD1_LSHFT_MODE"
220
Michal Simek7f491d72016-08-30 16:17:27 +0200[diff] [blame]221endchoice
Simon Glass04e38902016-07-05 17:10:13 -0600[diff] [blame]222
Michal Simek6ba36c02020-08-27 15:34:11 +0200[diff] [blame]223source "board/xilinx/Kconfig"
224source "board/xilinx/zynqmp/Kconfig"
225
Michal Simek84c72042015-01-15 10:01:51 +0100[diff] [blame]226endif