Adam Ford | f1b1f77 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 1 | menuconfig SPI |
| 2 | bool "SPI Support" |
| 3 | |
| 4 | if SPI |
Jagan Teki | de82305 | 2015-06-27 22:35:14 +0530 | [diff] [blame] | 5 | |
Masahiro Yamada | da333ae | 2014-10-23 22:26:09 +0900 | [diff] [blame] | 6 | config DM_SPI |
| 7 | bool "Enable Driver Model for SPI drivers" |
| 8 | depends on DM |
| 9 | help |
Simon Glass | f94a1be | 2015-02-05 21:41:35 -0700 | [diff] [blame] | 10 | Enable driver model for SPI. The SPI slave interface |
| 11 | (spi_setup_slave(), spi_xfer(), etc.) is then implemented by |
| 12 | the SPI uclass. Drivers provide methods to access the SPI |
| 13 | buses that they control. The uclass interface is defined in |
| 14 | include/spi.h. The existing spi_slave structure is attached |
| 15 | as 'parent data' to every slave on each bus. Slaves |
| 16 | typically use driver-private data instead of extending the |
| 17 | spi_slave structure. |
Simon Glass | 892cac7 | 2015-03-06 13:19:05 -0700 | [diff] [blame] | 18 | |
Boris Brezillon | d13f5b2 | 2018-08-16 17:30:11 +0200 | [diff] [blame] | 19 | config SPI_MEM |
| 20 | bool "SPI memory extension" |
| 21 | help |
| 22 | Enable this option if you want to enable the SPI memory extension. |
| 23 | This extension is meant to simplify interaction with SPI memories |
| 24 | by providing an high-level interface to send memory-like commands. |
| 25 | |
Vignesh R | 6430eea | 2019-02-05 11:29:15 +0530 | [diff] [blame] | 26 | if DM_SPI |
| 27 | |
Thomas Chou | 15a56f9 | 2015-10-14 08:33:34 +0800 | [diff] [blame] | 28 | config ALTERA_SPI |
| 29 | bool "Altera SPI driver" |
| 30 | help |
| 31 | Enable the Altera SPI driver. This driver can be used to |
| 32 | access the SPI NOR flash on platforms embedding this Altera |
| 33 | IP core. Please find details on the "Embedded Peripherals IP |
| 34 | User Guide" of Altera. |
| 35 | |
Jagan Teki | 15927ae | 2018-03-07 10:33:33 +0530 | [diff] [blame] | 36 | config ATCSPI200_SPI |
| 37 | bool "Andestech ATCSPI200 SPI driver" |
| 38 | help |
| 39 | Enable the Andestech ATCSPI200 SPI driver. This driver can be |
| 40 | used to access the SPI flash on AE3XX and AE250 platforms embedding |
| 41 | this Andestech IP core. |
| 42 | |
Wills Wang | b85dc46 | 2016-03-16 16:59:58 +0800 | [diff] [blame] | 43 | config ATH79_SPI |
| 44 | bool "Atheros SPI driver" |
| 45 | depends on ARCH_ATH79 |
| 46 | help |
| 47 | Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used |
| 48 | to access SPI NOR flash and other SPI peripherals. This driver |
| 49 | uses driver model and requires a device tree binding to operate. |
| 50 | please refer to doc/device-tree-bindings/spi/spi-ath79.txt. |
| 51 | |
Wenyou Yang | 0eafd4b | 2016-10-28 14:17:49 +0800 | [diff] [blame] | 52 | config ATMEL_SPI |
| 53 | bool "Atmel SPI driver" |
Jagan Teki | 89d4fc1 | 2018-03-14 18:46:44 +0530 | [diff] [blame] | 54 | default y if ARCH_AT91 |
Wenyou Yang | 0eafd4b | 2016-10-28 14:17:49 +0800 | [diff] [blame] | 55 | help |
| 56 | This enables driver for the Atmel SPI Controller, present on |
Andy Shevchenko | daab59a | 2017-07-05 16:25:22 +0300 | [diff] [blame] | 57 | many AT91 (ARM) chips. This driver can be used to access |
| 58 | the SPI Flash, such as AT25DF321. |
Wenyou Yang | 0eafd4b | 2016-10-28 14:17:49 +0800 | [diff] [blame] | 59 | |
Álvaro Fernández Rojas | 29cc436 | 2018-01-20 02:13:38 +0100 | [diff] [blame] | 60 | config BCM63XX_HSSPI |
| 61 | bool "BCM63XX HSSPI driver" |
| 62 | depends on ARCH_BMIPS |
| 63 | help |
| 64 | Enable the BCM6328 HSSPI driver. This driver can be used to |
| 65 | access the SPI NOR flash on platforms embedding this Broadcom |
| 66 | SPI core. |
| 67 | |
Álvaro Fernández Rojas | 5ac07d2 | 2018-01-23 17:14:58 +0100 | [diff] [blame] | 68 | config BCM63XX_SPI |
| 69 | bool "BCM6348 SPI driver" |
| 70 | depends on ARCH_BMIPS |
| 71 | help |
| 72 | Enable the BCM6348/BCM6358 SPI driver. This driver can be used to |
| 73 | access the SPI NOR flash on platforms embedding these Broadcom |
| 74 | SPI cores. |
| 75 | |
Thomas Fitzsimmons | 894c3ad | 2018-06-08 17:59:45 -0400 | [diff] [blame] | 76 | config BCMSTB_SPI |
| 77 | bool "BCMSTB SPI driver" |
| 78 | help |
| 79 | Enable the Broadcom set-top box SPI driver. This driver can |
| 80 | be used to access the SPI flash on platforms embedding this |
| 81 | Broadcom SPI core. |
| 82 | |
Jagan Teki | e4976af | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 83 | config CADENCE_QSPI |
| 84 | bool "Cadence QSPI driver" |
| 85 | help |
| 86 | Enable the Cadence Quad-SPI (QSPI) driver. This driver can be |
| 87 | used to access the SPI NOR flash on platforms embedding this |
| 88 | Cadence IP core. |
| 89 | |
| 90 | config DESIGNWARE_SPI |
| 91 | bool "Designware SPI driver" |
| 92 | help |
| 93 | Enable the Designware SPI driver. This driver can be used to |
| 94 | access the SPI NOR flash on platforms embedding this Designware |
| 95 | IP core. |
| 96 | |
Jagan Teki | c354eee | 2015-06-27 15:32:19 +0530 | [diff] [blame] | 97 | config EXYNOS_SPI |
| 98 | bool "Samsung Exynos SPI driver" |
| 99 | help |
| 100 | Enable the Samsung Exynos SPI driver. This driver can be used to |
| 101 | access the SPI NOR flash on platforms embedding this Samsung |
| 102 | Exynos IP core. |
| 103 | |
Jagan Teki | 94ea308 | 2015-06-27 14:17:06 +0530 | [diff] [blame] | 104 | config FSL_DSPI |
| 105 | bool "Freescale DSPI driver" |
| 106 | help |
| 107 | Enable the Freescale DSPI driver. This driver can be used to |
| 108 | access the SPI NOR flash and SPI Data flash on platforms embedding |
| 109 | this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms |
| 110 | use this driver. |
| 111 | |
Jagan Teki | 4563601 | 2015-06-27 15:43:27 +0530 | [diff] [blame] | 112 | config ICH_SPI |
| 113 | bool "Intel ICH SPI driver" |
Vignesh R | 6d82517 | 2019-02-05 11:29:28 +0530 | [diff] [blame] | 114 | imply SPI_FLASH_BAR |
Jagan Teki | 4563601 | 2015-06-27 15:43:27 +0530 | [diff] [blame] | 115 | help |
| 116 | Enable the Intel ICH SPI driver. This driver can be used to |
| 117 | access the SPI NOR flash on platforms embedding this Intel |
| 118 | ICH IP core. |
| 119 | |
Neil Armstrong | 9d26506 | 2018-11-22 11:01:05 +0100 | [diff] [blame] | 120 | config MESON_SPIFC |
| 121 | bool "Amlogic Meson SPI Flash Controller driver" |
| 122 | depends on ARCH_MESON |
| 123 | help |
| 124 | Enable the Amlogic Meson SPI Flash Controller SPIFC) driver. |
| 125 | This driver can be used to access the SPI NOR flash chips on |
| 126 | Amlogic Meson SoCs. |
| 127 | |
Christophe Leroy | f34d031 | 2018-11-21 08:51:57 +0000 | [diff] [blame] | 128 | config MPC8XX_SPI |
| 129 | bool "MPC8XX SPI Driver" |
| 130 | depends on MPC8xx |
| 131 | help |
| 132 | Enable support for SPI on MPC8XX |
| 133 | |
Stefan Roese | 5eee9de | 2018-08-16 10:48:48 +0200 | [diff] [blame] | 134 | config MT7621_SPI |
| 135 | bool "MediaTek MT7621 SPI driver" |
Weijie Gao | 16b9490 | 2019-04-30 11:13:58 +0800 | [diff] [blame] | 136 | depends on SOC_MT7628 |
Stefan Roese | 5eee9de | 2018-08-16 10:48:48 +0200 | [diff] [blame] | 137 | help |
| 138 | Enable the MT7621 SPI driver. This driver can be used to access |
| 139 | the SPI NOR flash on platforms embedding this Ralink / MediaTek |
| 140 | SPI core, like MT7621/7628/7688. |
| 141 | |
Guochun Mao | 052cafd | 2018-10-12 15:01:06 +0800 | [diff] [blame] | 142 | config MTK_QSPI |
| 143 | bool "Mediatek QSPI driver" |
Vignesh R | 6d82517 | 2019-02-05 11:29:28 +0530 | [diff] [blame] | 144 | imply SPI_FLASH_BAR |
Guochun Mao | 052cafd | 2018-10-12 15:01:06 +0800 | [diff] [blame] | 145 | help |
| 146 | Enable the Mediatek QSPI driver. This driver can be |
| 147 | used to access the SPI NOR flash on platforms embedding this |
| 148 | Mediatek QSPI IP core. |
| 149 | |
Stefan Roese | 3fda4ef | 2016-05-19 15:56:44 +0200 | [diff] [blame] | 150 | config MVEBU_A3700_SPI |
| 151 | bool "Marvell Armada 3700 SPI driver" |
Marek Behún | dbbd5bd | 2018-04-24 17:21:26 +0200 | [diff] [blame] | 152 | select CLK_ARMADA_3720 |
Stefan Roese | 3fda4ef | 2016-05-19 15:56:44 +0200 | [diff] [blame] | 153 | help |
| 154 | Enable the Marvell Armada 3700 SPI driver. This driver can be |
| 155 | used to access the SPI NOR flash on platforms embedding this |
| 156 | Marvell IP core. |
| 157 | |
Purna Chandra Mandal | e19b900 | 2016-06-02 14:26:08 +0530 | [diff] [blame] | 158 | config PIC32_SPI |
| 159 | bool "Microchip PIC32 SPI driver" |
| 160 | depends on MACH_PIC32 |
| 161 | help |
| 162 | Enable the Microchip PIC32 SPI driver. This driver can be used |
| 163 | to access the SPI NOR flash, MMC-over-SPI on platforms based on |
| 164 | Microchip PIC32 family devices. |
| 165 | |
Quentin Schulz | 8a4791f | 2018-08-31 16:28:29 +0200 | [diff] [blame] | 166 | config PL022_SPI |
| 167 | bool "ARM AMBA PL022 SSP controller driver" |
| 168 | depends on ARM |
| 169 | help |
| 170 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP |
| 171 | controller. If you have an embedded system with an AMBA(R) |
| 172 | bus and a PL022 controller, say Y or M here. |
| 173 | |
Marek Vasut | fbebea2 | 2017-11-29 06:29:46 +0100 | [diff] [blame] | 174 | config RENESAS_RPC_SPI |
| 175 | bool "Renesas RPC SPI driver" |
Marek Vasut | b5b6656 | 2019-05-04 18:52:33 +0200 | [diff] [blame] | 176 | depends on RCAR_GEN3 || RZA1 |
Vignesh R | 6d82517 | 2019-02-05 11:29:28 +0530 | [diff] [blame] | 177 | imply SPI_FLASH_BAR |
Marek Vasut | fbebea2 | 2017-11-29 06:29:46 +0100 | [diff] [blame] | 178 | help |
| 179 | Enable the Renesas RPC SPI driver, used to access SPI NOR flash |
| 180 | on Renesas RCar Gen3 SoCs. This uses driver model and requires a |
| 181 | device tree binding to operate. |
| 182 | |
Simon Glass | 1b2fd5b | 2015-09-01 19:19:37 -0600 | [diff] [blame] | 183 | config ROCKCHIP_SPI |
| 184 | bool "Rockchip SPI driver" |
| 185 | help |
| 186 | Enable the Rockchip SPI driver, used to access SPI NOR flash and |
| 187 | other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs. |
| 188 | This uses driver model and requires a device tree binding to |
| 189 | operate. |
| 190 | |
Simon Glass | 892cac7 | 2015-03-06 13:19:05 -0700 | [diff] [blame] | 191 | config SANDBOX_SPI |
| 192 | bool "Sandbox SPI driver" |
| 193 | depends on SANDBOX && DM |
| 194 | help |
| 195 | Enable SPI support for sandbox. This is an emulation of a real SPI |
| 196 | bus. Devices can be attached to the bus using the device tree |
| 197 | which specifies the driver to use. As an example, see this device |
| 198 | tree fragment from sandbox.dts. It shows that the SPI bus has a |
| 199 | single flash device on chip select 0 which is emulated by the driver |
| 200 | for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c. |
| 201 | |
| 202 | spi@0 { |
| 203 | #address-cells = <1>; |
| 204 | #size-cells = <0>; |
| 205 | reg = <0>; |
| 206 | compatible = "sandbox,spi"; |
| 207 | cs-gpios = <0>, <&gpio_a 0>; |
| 208 | flash@0 { |
| 209 | reg = <0>; |
| 210 | compatible = "spansion,m25p16", "sandbox,spi-flash"; |
| 211 | spi-max-frequency = <40000000>; |
| 212 | sandbox,filename = "spi.bin"; |
| 213 | }; |
Jagan Teki | e4976af | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 214 | }; |
Jagan Teki | f924a20 | 2015-06-27 04:41:11 +0530 | [diff] [blame] | 215 | |
Jagan Teki | a51cd54 | 2019-02-27 20:02:13 +0530 | [diff] [blame] | 216 | config SPI_SUNXI |
| 217 | bool "Allwinner SoC SPI controllers" |
| 218 | help |
| 219 | Enable the Allwinner SoC SPi controller driver. |
| 220 | |
| 221 | Same controller driver can reuse in all Allwinner SoC variants. |
| 222 | |
Michael Kurz | d4363ba | 2017-01-22 16:04:30 +0100 | [diff] [blame] | 223 | config STM32_QSPI |
| 224 | bool "STM32F7 QSPI driver" |
Patrice Chotard | 351d2fe | 2019-04-30 16:09:18 +0200 | [diff] [blame] | 225 | depends on STM32F4 || STM32F7 || ARCH_STM32MP |
Michael Kurz | d4363ba | 2017-01-22 16:04:30 +0100 | [diff] [blame] | 226 | help |
| 227 | Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be |
| 228 | used to access the SPI NOR flash chips on platforms embedding |
| 229 | this ST IP core. |
| 230 | |
Jagan Teki | 5bf9a2d | 2015-06-27 15:57:53 +0530 | [diff] [blame] | 231 | config TEGRA114_SPI |
| 232 | bool "nVidia Tegra114 SPI driver" |
| 233 | help |
| 234 | Enable the nVidia Tegra114 SPI driver. This driver can be used to |
| 235 | access the SPI NOR flash on platforms embedding this nVidia Tegra114 |
| 236 | IP core. |
| 237 | |
| 238 | This controller is different than the older SoCs SPI controller and |
| 239 | also register interface get changed with this controller. |
| 240 | |
Jagan Teki | 2f3e6f8 | 2015-06-27 16:04:05 +0530 | [diff] [blame] | 241 | config TEGRA20_SFLASH |
| 242 | bool "nVidia Tegra20 Serial Flash controller driver" |
| 243 | help |
| 244 | Enable the nVidia Tegra20 Serial Flash controller driver. This driver |
| 245 | can be used to access the SPI NOR flash on platforms embedding this |
| 246 | nVidia Tegra20 IP core. |
| 247 | |
Jagan Teki | 4495830 | 2015-06-27 16:07:54 +0530 | [diff] [blame] | 248 | config TEGRA20_SLINK |
| 249 | bool "nVidia Tegra20/Tegra30 SLINK driver" |
| 250 | help |
| 251 | Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can |
| 252 | be used to access the SPI NOR flash on platforms embedding this |
| 253 | nVidia Tegra20/Tegra30 IP cores. |
| 254 | |
Tom Warren | 4e675ff | 2015-10-12 14:50:54 -0700 | [diff] [blame] | 255 | config TEGRA210_QSPI |
| 256 | bool "nVidia Tegra210 QSPI driver" |
| 257 | help |
| 258 | Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver |
| 259 | be used to access SPI chips on platforms embedding this |
| 260 | NVIDIA Tegra210 IP core. |
| 261 | |
Vignesh Raghavendra | 61ae978 | 2019-04-16 21:31:59 +0530 | [diff] [blame] | 262 | config TI_QSPI |
| 263 | bool "TI QSPI driver" |
| 264 | imply TI_EDMA3 |
| 265 | help |
| 266 | Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms. |
| 267 | This driver support spi flash single, quad and memory reads. |
| 268 | |
Jagan Teki | 075143d | 2015-06-27 04:32:43 +0530 | [diff] [blame] | 269 | config XILINX_SPI |
| 270 | bool "Xilinx SPI driver" |
Jagan Teki | 075143d | 2015-06-27 04:32:43 +0530 | [diff] [blame] | 271 | help |
| 272 | Enable the Xilinx SPI driver from the Xilinx EDK. This SPI |
| 273 | controller support 8 bit SPI transfers only, with or w/o FIFO. |
| 274 | For more info on Xilinx SPI Register Definitions and Overview |
| 275 | see driver file - drivers/spi/xilinx_spi.c |
| 276 | |
Jagan Teki | df30a42 | 2015-06-27 00:51:38 +0530 | [diff] [blame] | 277 | config ZYNQ_SPI |
| 278 | bool "Zynq SPI driver" |
Michal Simek | ec48b6c | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 279 | depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL |
Jagan Teki | df30a42 | 2015-06-27 00:51:38 +0530 | [diff] [blame] | 280 | help |
| 281 | Enable the Zynq SPI driver. This driver can be used to |
| 282 | access the SPI NOR flash on platforms embedding this Zynq |
| 283 | SPI IP core. |
Jagan Teki | de82305 | 2015-06-27 22:35:14 +0530 | [diff] [blame] | 284 | |
Jagan Teki | 78a025a | 2015-08-16 00:19:38 +0530 | [diff] [blame] | 285 | config ZYNQ_QSPI |
| 286 | bool "Zynq QSPI driver" |
| 287 | depends on ARCH_ZYNQ |
Vignesh R | 6d82517 | 2019-02-05 11:29:28 +0530 | [diff] [blame] | 288 | imply SPI_FLASH_BAR |
Jagan Teki | 78a025a | 2015-08-16 00:19:38 +0530 | [diff] [blame] | 289 | help |
| 290 | Enable the Zynq Quad-SPI (QSPI) driver. This driver can be |
| 291 | used to access the SPI NOR flash on platforms embedding this |
| 292 | Zynq QSPI IP core. This IP is used to connect the flash in |
| 293 | 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel. |
| 294 | |
Siva Durga Prasad Paladugu | 22cca17 | 2018-07-04 17:31:23 +0530 | [diff] [blame] | 295 | config ZYNQMP_GQSPI |
| 296 | bool "Configure ZynqMP Generic QSPI" |
Michal Simek | ec48b6c | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 297 | depends on ARCH_ZYNQMP || ARCH_VERSAL |
Siva Durga Prasad Paladugu | 22cca17 | 2018-07-04 17:31:23 +0530 | [diff] [blame] | 298 | help |
| 299 | This option is used to enable ZynqMP QSPI controller driver which |
| 300 | is used to communicate with qspi flash devices. |
| 301 | |
Jagan Teki | e4976af | 2015-06-27 22:37:00 +0530 | [diff] [blame] | 302 | endif # if DM_SPI |
| 303 | |
Peng Fan | 41eb8ff | 2017-04-13 14:09:55 +0800 | [diff] [blame] | 304 | config SOFT_SPI |
| 305 | bool "Soft SPI driver" |
| 306 | help |
| 307 | Enable Soft SPI driver. This driver is to use GPIO simulate |
| 308 | the SPI protocol. |
| 309 | |
Lars Povlsen | fd6e0b0 | 2019-01-08 10:38:33 +0100 | [diff] [blame] | 310 | config MSCC_BB_SPI |
| 311 | bool "MSCC bitbang SPI driver" |
| 312 | depends on SOC_VCOREIII |
| 313 | help |
| 314 | Enable MSCC bitbang SPI driver. This driver can be used on |
| 315 | MSCC SOCs. |
| 316 | |
Tuomas Tynkkynen | fbca0e6 | 2018-02-07 02:42:23 +0200 | [diff] [blame] | 317 | config CF_SPI |
| 318 | bool "ColdFire SPI driver" |
| 319 | help |
| 320 | Enable the ColdFire SPI driver. This driver can be used on |
| 321 | some m68k SoCs. |
| 322 | |
Jagan Teki | 3debffa | 2015-06-27 15:21:36 +0530 | [diff] [blame] | 323 | config FSL_ESPI |
| 324 | bool "Freescale eSPI driver" |
| 325 | help |
| 326 | Enable the Freescale eSPI driver. This driver can be used to |
| 327 | access the SPI interface and SPI NOR flash on platforms embedding |
| 328 | this Freescale eSPI IP core. |
| 329 | |
Jagan Teki | 21b1dd1 | 2016-09-03 12:58:33 +0530 | [diff] [blame] | 330 | config FSL_QSPI |
| 331 | bool "Freescale QSPI driver" |
Vignesh R | 6d82517 | 2019-02-05 11:29:28 +0530 | [diff] [blame] | 332 | imply SPI_FLASH_BAR |
Jagan Teki | 21b1dd1 | 2016-09-03 12:58:33 +0530 | [diff] [blame] | 333 | help |
| 334 | Enable the Freescale Quad-SPI (QSPI) driver. This driver can be |
| 335 | used to access the SPI NOR flash on platforms embedding this |
| 336 | Freescale IP core. |
| 337 | |
Adam Ford | 26410c1 | 2017-12-30 07:33:42 -0600 | [diff] [blame] | 338 | config DAVINCI_SPI |
| 339 | bool "Davinci & Keystone SPI driver" |
| 340 | depends on ARCH_DAVINCI || ARCH_KEYSTONE |
| 341 | help |
| 342 | Enable the Davinci SPI driver |
| 343 | |
Tuomas Tynkkynen | 95d3877 | 2018-02-07 02:42:16 +0200 | [diff] [blame] | 344 | config SH_SPI |
| 345 | bool "SuperH SPI driver" |
| 346 | help |
| 347 | Enable the SuperH SPI controller driver. This driver can be used |
| 348 | on various SuperH SoCs, such as SH7757. |
| 349 | |
Tuomas Tynkkynen | a5dfabe | 2018-02-07 02:42:17 +0200 | [diff] [blame] | 350 | config SH_QSPI |
| 351 | bool "Renesas Quad SPI driver" |
| 352 | help |
| 353 | Enable the Renesas Quad SPI controller driver. This driver can be |
| 354 | used on Renesas SoCs. |
| 355 | |
Tuomas Tynkkynen | 4a942f4 | 2018-02-07 02:42:22 +0200 | [diff] [blame] | 356 | config KIRKWOOD_SPI |
| 357 | bool "Marvell Kirkwood SPI Driver" |
| 358 | help |
| 359 | Enable support for SPI on various Marvell SoCs, such as |
| 360 | Kirkwood and Armada 375. |
| 361 | |
Tuomas Tynkkynen | 2c4b096 | 2018-02-07 02:42:21 +0200 | [diff] [blame] | 362 | config LPC32XX_SSP |
| 363 | bool "LPC32XX SPI Driver" |
| 364 | help |
| 365 | Enable support for SPI on LPC32xx |
| 366 | |
Tuomas Tynkkynen | bbdf386 | 2018-02-07 02:42:20 +0200 | [diff] [blame] | 367 | config MPC8XXX_SPI |
| 368 | bool "MPC8XXX SPI Driver" |
| 369 | help |
| 370 | Enable support for SPI on the MPC8XXX PowerPC SoCs. |
| 371 | |
Tuomas Tynkkynen | 60e5456 | 2018-02-07 02:42:19 +0200 | [diff] [blame] | 372 | config MXC_SPI |
| 373 | bool "MXC SPI Driver" |
| 374 | help |
| 375 | Enable the MXC SPI controller driver. This driver can be used |
| 376 | on various i.MX SoCs such as i.MX31/35/51/6/7. |
| 377 | |
Tuomas Tynkkynen | 7b819b5 | 2018-02-07 02:42:18 +0200 | [diff] [blame] | 378 | config MXS_SPI |
| 379 | bool "MXS SPI Driver" |
| 380 | help |
| 381 | Enable the MXS SPI controller driver. This driver can be used |
| 382 | on the i.MX23 and i.MX28 SoCs. |
| 383 | |
Adam Ford | a41e3e1 | 2017-07-26 22:25:29 -0500 | [diff] [blame] | 384 | config OMAP3_SPI |
| 385 | bool "McSPI driver for OMAP" |
| 386 | help |
| 387 | SPI master controller for OMAP24XX and later Multichannel SPI |
| 388 | (McSPI). This driver be used to access SPI chips on platforms |
| 389 | embedding this OMAP3 McSPI IP core. |
| 390 | |
Adam Ford | f1b1f77 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 391 | endif # menu "SPI Support" |