| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ROCKCHIP=y |
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 4 | CONFIG_ROCKCHIP_RK3288=y |
| 5 | CONFIG_TARGET_FIREFLY_RK3288=y |
| Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 6 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 7 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" |
| Simon Glass | 98af879 | 2016-10-17 20:12:35 -0600 | [diff] [blame] | 8 | CONFIG_SILENT_CONSOLE=y |
| Simon Glass | ef26d60 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 9 | # CONFIG_DISPLAY_CPUINFO is not set |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 10 | CONFIG_SPL_STACK_R=y |
| Simon Glass | ec4ac4e | 2016-01-21 19:43:35 -0700 | [diff] [blame] | 11 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 12 | # CONFIG_CMD_IMLS is not set |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 13 | CONFIG_CMD_MMC=y |
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 14 | CONFIG_CMD_SF=y |
| 15 | CONFIG_CMD_SPI=y |
| 16 | CONFIG_CMD_I2C=y |
| 17 | CONFIG_CMD_GPIO=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 18 | # CONFIG_CMD_SETEXPR is not set |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 19 | CONFIG_CMD_CACHE=y |
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 20 | CONFIG_CMD_TIME=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 21 | CONFIG_CMD_PMIC=y |
| 22 | CONFIG_CMD_REGULATOR=y |
| 23 | CONFIG_SPL_OF_CONTROL=y |
| Simon Glass | 56d6977 | 2016-05-14 14:03:00 -0600 | [diff] [blame] | 24 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| Tom Rini | aca5cd2 | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 25 | CONFIG_SPL_OF_PLATDATA=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 26 | CONFIG_REGMAP=y |
| huang lin | 41c7f66 | 2015-11-17 14:20:13 +0800 | [diff] [blame] | 27 | CONFIG_SPL_REGMAP=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 28 | CONFIG_SYSCON=y |
| Simon Glass | ec4ac4e | 2016-01-21 19:43:35 -0700 | [diff] [blame] | 29 | CONFIG_SPL_SYSCON=y |
| Simon Glass | 7991809 | 2016-01-21 19:43:49 -0700 | [diff] [blame] | 30 | # CONFIG_SPL_SIMPLE_BUS is not set |
| Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 31 | CONFIG_CLK=y |
| 32 | CONFIG_SPL_CLK=y |
| 33 | CONFIG_ROCKCHIP_GPIO=y |
| 34 | CONFIG_SYS_I2C_ROCKCHIP=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 35 | CONFIG_LED=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 36 | CONFIG_LED_GPIO=y |
| Masahiro Yamada | 55ed3b4 | 2017-01-10 13:32:04 +0900 | [diff] [blame] | 37 | CONFIG_MMC_DW=y |
| Masahiro Yamada | fed4408 | 2017-01-10 13:32:03 +0900 | [diff] [blame] | 38 | CONFIG_MMC_DW_ROCKCHIP=y |
| Sjoerd Simons | 8c3018e | 2017-01-11 11:46:12 +0100 | [diff] [blame] | 39 | CONFIG_DM_ETH=y |
| Sjoerd Simons | 8c3018e | 2017-01-11 11:46:12 +0100 | [diff] [blame] | 40 | CONFIG_ETH_DESIGNWARE=y |
| 41 | CONFIG_GMAC_ROCKCHIP=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 42 | CONFIG_PINCTRL=y |
| Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 43 | CONFIG_SPL_PINCTRL=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 44 | # CONFIG_SPL_PINCTRL_FULL is not set |
| Heiko Stübner | 9f862ec | 2016-07-16 00:17:13 +0200 | [diff] [blame] | 45 | CONFIG_ROCKCHIP_RK3288_PINCTRL=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 46 | CONFIG_DM_PMIC=y |
| Simon Glass | 889b8a3 | 2016-01-21 19:45:20 -0700 | [diff] [blame] | 47 | # CONFIG_SPL_PMIC_CHILDREN is not set |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 48 | CONFIG_PMIC_ACT8846=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 49 | CONFIG_REGULATOR_ACT8846=y |
| Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 50 | CONFIG_DM_REGULATOR_FIXED=y |
| Simon Glass | 889b8a3 | 2016-01-21 19:45:20 -0700 | [diff] [blame] | 51 | CONFIG_PWM_ROCKCHIP=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 52 | CONFIG_RAM=y |
| 53 | CONFIG_SPL_RAM=y |
| Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 54 | CONFIG_DEBUG_UART=y |
| 55 | CONFIG_DEBUG_UART_BASE=0xff690000 |
| 56 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 57 | CONFIG_DEBUG_UART_SHIFT=2 |
| Thomas Chou | 9e39003 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 58 | CONFIG_SYS_NS16550=y |
| Tom Rini | aca5cd2 | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 59 | CONFIG_ROCKCHIP_SERIAL=y |
| 60 | CONFIG_SYSRESET=y |
| Simon Glass | 889b8a3 | 2016-01-21 19:45:20 -0700 | [diff] [blame] | 61 | CONFIG_DM_VIDEO=y |
| Anatolij Gustschin | 7588c31 | 2016-01-25 17:17:22 +0100 | [diff] [blame] | 62 | CONFIG_DISPLAY=y |
| Simon Glass | 889b8a3 | 2016-01-21 19:45:20 -0700 | [diff] [blame] | 63 | CONFIG_VIDEO_ROCKCHIP=y |
| Simon Glass | b87ca80 | 2016-10-17 20:12:57 -0600 | [diff] [blame] | 64 | CONFIG_CONSOLE_SCROLL_LINES=10 |
| Sjoerd Simons | f4a8a17 | 2015-12-04 23:27:41 +0100 | [diff] [blame] | 65 | CONFIG_USE_TINY_PRINTF=y |
| Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 66 | CONFIG_CMD_DHRYSTONE=y |
| 67 | CONFIG_ERRNO_STR=y |
| Simon Glass | 97feca3 | 2016-07-04 11:58:36 -0600 | [diff] [blame] | 68 | # CONFIG_SPL_OF_LIBFDT is not set |