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Simon Glass6854f872014-11-14 20:56:33 -07001/*
2 * Copyright (C) 2014 Google, Inc
3 *
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
5 *
6 * Modifications are:
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
15 *
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
17 *
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
20 *
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
22
23 * SPDX-License-Identifier: GPL-2.0
24 */
25
26#include <common.h>
27#include <bios_emul.h>
28#include <errno.h>
29#include <malloc.h>
30#include <pci.h>
31#include <pci_rom.h>
32#include <vbe.h>
33#include <video_fb.h>
Bin Menga4520022015-07-06 16:31:36 +080034#include <linux/screen_info.h>
Simon Glass6854f872014-11-14 20:56:33 -070035
36#ifdef CONFIG_HAVE_ACPI_RESUME
37#include <asm/acpi.h>
38#endif
39
40__weak bool board_should_run_oprom(pci_dev_t dev)
41{
42 return true;
43}
44
45static bool should_load_oprom(pci_dev_t dev)
46{
47#ifdef CONFIG_HAVE_ACPI_RESUME
48 if (acpi_get_slp_type() == 3)
49 return false;
50#endif
51 if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
52 return 1;
53 if (board_should_run_oprom(dev))
54 return 1;
55
56 return 0;
57}
58
59__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
60{
61 return vendev;
62}
63
64static int pci_rom_probe(pci_dev_t dev, uint class,
65 struct pci_rom_header **hdrp)
66{
67 struct pci_rom_header *rom_header;
68 struct pci_rom_data *rom_data;
69 u16 vendor, device;
Simon Glass40305242014-12-29 19:32:23 -070070 u16 rom_vendor, rom_device;
Bin Mengd57c2f22015-04-24 15:48:03 +080071 u32 rom_class;
Simon Glass6854f872014-11-14 20:56:33 -070072 u32 vendev;
73 u32 mapped_vendev;
74 u32 rom_address;
75
76 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
77 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
78 vendev = vendor << 16 | device;
79 mapped_vendev = board_map_oprom_vendev(vendev);
80 if (vendev != mapped_vendev)
81 debug("Device ID mapped to %#08x\n", mapped_vendev);
82
Bin Meng786a08e2015-07-06 16:31:33 +080083#ifdef CONFIG_VGA_BIOS_ADDR
84 rom_address = CONFIG_VGA_BIOS_ADDR;
Simon Glass6854f872014-11-14 20:56:33 -070085#else
Simon Glass4a2708a2015-01-14 21:37:04 -070086
87 if (pciauto_setup_rom(pci_bus_to_hose(PCI_BUS(dev)), dev)) {
88 debug("Cannot find option ROM\n");
89 return -ENOENT;
90 }
91
Simon Glass6854f872014-11-14 20:56:33 -070092 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
93 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
94 debug("%s: rom_address=%x\n", __func__, rom_address);
95 return -ENOENT;
96 }
97
98 /* Enable expansion ROM address decoding. */
99 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
100 rom_address | PCI_ROM_ADDRESS_ENABLE);
101#endif
102 debug("Option ROM address %x\n", rom_address);
Minghuan Lianef2d17f2015-01-22 13:21:55 +0800103 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glass6854f872014-11-14 20:56:33 -0700104
105 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700106 le16_to_cpu(rom_header->signature),
107 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700108
Simon Glass40305242014-12-29 19:32:23 -0700109 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glass6854f872014-11-14 20:56:33 -0700110 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700111 le16_to_cpu(rom_header->signature));
Simon Glass6854f872014-11-14 20:56:33 -0700112 return -EINVAL;
113 }
114
Simon Glass40305242014-12-29 19:32:23 -0700115 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
116 rom_vendor = le16_to_cpu(rom_data->vendor);
117 rom_device = le16_to_cpu(rom_data->device);
Simon Glass6854f872014-11-14 20:56:33 -0700118
119 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glass40305242014-12-29 19:32:23 -0700120 rom_vendor, rom_device);
Simon Glass6854f872014-11-14 20:56:33 -0700121
122 /* If the device id is mapped, a mismatch is expected */
Simon Glass40305242014-12-29 19:32:23 -0700123 if ((vendor != rom_vendor || device != rom_device) &&
Simon Glass6854f872014-11-14 20:56:33 -0700124 (vendev == mapped_vendev)) {
125 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700126 rom_vendor, rom_device);
Simon Glassc5caba02014-12-29 19:32:27 -0700127 /* Continue anyway */
Simon Glass6854f872014-11-14 20:56:33 -0700128 }
129
Bin Mengd57c2f22015-04-24 15:48:03 +0800130 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
131 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
132 rom_class, rom_data->type);
Simon Glass6854f872014-11-14 20:56:33 -0700133
Bin Mengd57c2f22015-04-24 15:48:03 +0800134 if (class != rom_class) {
135 debug("Class Code mismatch ROM %06x, dev %06x\n",
136 rom_class, class);
Simon Glass6854f872014-11-14 20:56:33 -0700137 }
138 *hdrp = rom_header;
139
140 return 0;
141}
142
Bin Meng81d0b352015-04-24 15:48:04 +0800143int pci_rom_load(struct pci_rom_header *rom_header,
Simon Glass6854f872014-11-14 20:56:33 -0700144 struct pci_rom_header **ram_headerp)
145{
146 struct pci_rom_data *rom_data;
147 unsigned int rom_size;
148 unsigned int image_size = 0;
149 void *target;
150
151 do {
152 /* Get next image, until we see an x86 version */
153 rom_header = (struct pci_rom_header *)((void *)rom_header +
154 image_size);
155
156 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glass40305242014-12-29 19:32:23 -0700157 le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700158
Simon Glass40305242014-12-29 19:32:23 -0700159 image_size = le16_to_cpu(rom_data->ilen) * 512;
160 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glass6854f872014-11-14 20:56:33 -0700161
162 if (rom_data->type != 0)
163 return -EACCES;
164
165 rom_size = rom_header->size * 512;
166
Simon Glassbdc88d42014-12-29 19:32:24 -0700167#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glass6854f872014-11-14 20:56:33 -0700168 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glassbdc88d42014-12-29 19:32:24 -0700169#else
170 target = (void *)malloc(rom_size);
171 if (!target)
172 return -ENOMEM;
173#endif
Simon Glass6854f872014-11-14 20:56:33 -0700174 if (target != rom_header) {
Simon Glassfba7eac2015-01-01 16:18:01 -0700175 ulong start = get_timer(0);
176
Simon Glass6854f872014-11-14 20:56:33 -0700177 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
178 rom_header, target, rom_size);
179 memcpy(target, rom_header, rom_size);
180 if (memcmp(target, rom_header, rom_size)) {
181 printf("VGA ROM copy failed\n");
182 return -EFAULT;
183 }
Simon Glassfba7eac2015-01-01 16:18:01 -0700184 debug("Copy took %lums\n", get_timer(start));
Simon Glass6854f872014-11-14 20:56:33 -0700185 }
186 *ram_headerp = target;
187
188 return 0;
189}
190
191static struct vbe_mode_info mode_info;
192
193int vbe_get_video_info(struct graphic_device *gdev)
194{
195#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
196 struct vesa_mode_info *vesa = &mode_info.vesa;
197
198 gdev->winSizeX = vesa->x_resolution;
199 gdev->winSizeY = vesa->y_resolution;
200
201 gdev->plnSizeX = vesa->x_resolution;
202 gdev->plnSizeY = vesa->y_resolution;
203
204 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
205
206 switch (vesa->bits_per_pixel) {
Jian Luo0e98a142015-07-06 16:31:29 +0800207 case 32:
Simon Glass6854f872014-11-14 20:56:33 -0700208 case 24:
209 gdev->gdfIndex = GDF_32BIT_X888RGB;
210 break;
211 case 16:
212 gdev->gdfIndex = GDF_16BIT_565RGB;
213 break;
214 default:
215 gdev->gdfIndex = GDF__8BIT_INDEX;
216 break;
217 }
218
219 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
220 gdev->pciBase = vesa->phys_base_ptr;
221
222 gdev->frameAdrs = vesa->phys_base_ptr;
223 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
224
225 gdev->vprBase = vesa->phys_base_ptr;
226 gdev->cprBase = vesa->phys_base_ptr;
227
Simon Glass23609c72015-01-01 16:18:00 -0700228 return gdev->winSizeX ? 0 : -ENOSYS;
Simon Glass6854f872014-11-14 20:56:33 -0700229#else
230 return -ENOSYS;
231#endif
232}
233
Bin Menga4520022015-07-06 16:31:36 +0800234void setup_video(struct screen_info *screen_info)
235{
236#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
237 struct vesa_mode_info *vesa = &mode_info.vesa;
238
239 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
240
241 screen_info->lfb_width = vesa->x_resolution;
242 screen_info->lfb_height = vesa->y_resolution;
243 screen_info->lfb_depth = vesa->bits_per_pixel;
244 screen_info->lfb_linelength = vesa->bytes_per_scanline;
245 screen_info->lfb_base = vesa->phys_base_ptr;
246 screen_info->lfb_size =
247 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
248 65536);
249 screen_info->lfb_size >>= 16;
250 screen_info->red_size = vesa->red_mask_size;
251 screen_info->red_pos = vesa->red_mask_pos;
252 screen_info->green_size = vesa->green_mask_size;
253 screen_info->green_pos = vesa->green_mask_pos;
254 screen_info->blue_size = vesa->blue_mask_size;
255 screen_info->blue_pos = vesa->blue_mask_pos;
256 screen_info->rsvd_size = vesa->reserved_mask_size;
257 screen_info->rsvd_pos = vesa->reserved_mask_pos;
258#endif
259}
260
Simon Glassbc17d8f2015-01-27 22:13:34 -0700261int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), int exec_method)
Simon Glass6854f872014-11-14 20:56:33 -0700262{
263 struct pci_rom_header *rom, *ram;
264 int vesa_mode = -1;
Bin Mengd57c2f22015-04-24 15:48:03 +0800265 uint class;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700266 bool emulate;
Simon Glass6854f872014-11-14 20:56:33 -0700267 int ret;
268
269 /* Only execute VGA ROMs */
Bin Mengd57c2f22015-04-24 15:48:03 +0800270 pci_read_config_dword(dev, PCI_REVISION_ID, &class);
271 if (((class >> 16) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
Simon Glass6854f872014-11-14 20:56:33 -0700272 debug("%s: Class %#x, should be %#x\n", __func__, class,
273 PCI_CLASS_DISPLAY_VGA);
274 return -ENODEV;
275 }
Bin Mengd57c2f22015-04-24 15:48:03 +0800276 class >>= 8;
Simon Glass6854f872014-11-14 20:56:33 -0700277
278 if (!should_load_oprom(dev))
279 return -ENXIO;
280
281 ret = pci_rom_probe(dev, class, &rom);
282 if (ret)
283 return ret;
284
Bin Meng81d0b352015-04-24 15:48:04 +0800285 ret = pci_rom_load(rom, &ram);
Simon Glass6854f872014-11-14 20:56:33 -0700286 if (ret)
287 return ret;
288
289 if (!board_should_run_oprom(dev))
290 return -ENXIO;
291
292#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
293 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
294 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
295#endif
Simon Glass9a99caf2015-01-01 16:18:05 -0700296 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glassbc17d8f2015-01-27 22:13:34 -0700297
298 if (exec_method & PCI_ROM_USE_NATIVE) {
299#ifdef CONFIG_X86
300 emulate = false;
301#else
302 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
303 printf("BIOS native execution is only available on x86\n");
304 return -ENOSYS;
305 }
306 emulate = true;
307#endif
308 } else {
309#ifdef CONFIG_BIOSEMU
310 emulate = true;
311#else
312 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
313 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
314 return -ENOSYS;
315 }
316 emulate = false;
317#endif
318 }
319
Simon Glass6854f872014-11-14 20:56:33 -0700320 if (emulate) {
321#ifdef CONFIG_BIOSEMU
322 BE_VGAInfo *info;
323
324 ret = biosemu_setup(dev, &info);
325 if (ret)
326 return ret;
327 biosemu_set_interrupt_handler(0x15, int15_handler);
328 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true,
329 vesa_mode, &mode_info);
330 if (ret)
331 return ret;
Simon Glass6854f872014-11-14 20:56:33 -0700332#endif
333 } else {
334#ifdef CONFIG_X86
335 bios_set_interrupt_handler(0x15, int15_handler);
336
337 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
338 &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700339#endif
340 }
Simon Glass9a99caf2015-01-01 16:18:05 -0700341 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glass6854f872014-11-14 20:56:33 -0700342
343 return 0;
344}