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Ian Campbellcba69ee2014-05-05 11:52:26 +01001/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
16/*
17 * High Level Configuration Options
18 */
19#define CONFIG_SUNXI /* sunxi family */
Ian Campbell50827a52014-05-05 11:52:30 +010020#ifdef CONFIG_SPL_BUILD
21#ifndef CONFIG_SPL_FEL
22#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
23#endif
24#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010025
26#include <asm/arch/cpu.h> /* get chip and board defs */
27
28#define CONFIG_SYS_TEXT_BASE 0x4a000000
29
Simon Glass57f878e2014-10-30 20:25:46 -060030#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM)
31# define CONFIG_CMD_DM
Simon Glass7aa97482014-10-30 20:25:49 -060032# define CONFIG_DM_GPIO
Simon Glass1a81cf832014-10-30 20:25:50 -060033# define CONFIG_DM_SERIAL
34# define CONFIG_DW_SERIAL
35# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
Simon Glass57f878e2014-10-30 20:25:46 -060036#endif
37
Ian Campbellcba69ee2014-05-05 11:52:26 +010038/*
39 * Display CPU information
40 */
41#define CONFIG_DISPLAY_CPUINFO
42
43/* Serial & console */
44#define CONFIG_SYS_NS16550
45#define CONFIG_SYS_NS16550_SERIAL
46/* ns16550 reg in the low bits of cpu reg */
Ian Campbellcba69ee2014-05-05 11:52:26 +010047#define CONFIG_SYS_NS16550_CLK 24000000
Simon Glass1a81cf832014-10-30 20:25:50 -060048#ifndef CONFIG_DM_SERIAL
49# define CONFIG_SYS_NS16550_REG_SIZE -4
50# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
51# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
52# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
53# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
54# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
55#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010056
57/* DRAM Base */
58#define CONFIG_SYS_SDRAM_BASE 0x40000000
59#define CONFIG_SYS_INIT_RAM_ADDR 0x0
60#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
61
62#define CONFIG_SYS_INIT_SP_OFFSET \
63 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
64#define CONFIG_SYS_INIT_SP_ADDR \
65 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
66
67#define CONFIG_NR_DRAM_BANKS 1
68#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
69#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
70
Ian Campbella6e50a82014-07-18 20:38:41 +010071#ifdef CONFIG_AHCI
72#define CONFIG_LIBATA
73#define CONFIG_SCSI_AHCI
74#define CONFIG_SCSI_AHCI_PLAT
75#define CONFIG_SUNXI_AHCI
76#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
77#define CONFIG_SYS_SCSI_MAX_LUN 1
78#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
79 CONFIG_SYS_SCSI_MAX_LUN)
80#define CONFIG_CMD_SCSI
81#endif
82
Ian Campbellcba69ee2014-05-05 11:52:26 +010083#define CONFIG_CMD_MEMORY
84#define CONFIG_CMD_SETEXPR
85
86#define CONFIG_SETUP_MEMORY_TAGS
87#define CONFIG_CMDLINE_TAG
88#define CONFIG_INITRD_TAG
89
Ian Campbelle24ea552014-05-05 14:42:31 +010090/* mmc config */
Chen-Yu Tsaiff2b47f2014-10-22 16:47:42 +080091#if !defined(CONFIG_UART0_PORT_F)
Ian Campbelle24ea552014-05-05 14:42:31 +010092#define CONFIG_MMC
93#define CONFIG_GENERIC_MMC
94#define CONFIG_CMD_MMC
95#define CONFIG_MMC_SUNXI
96#define CONFIG_MMC_SUNXI_SLOT 0
Ian Campbelle24ea552014-05-05 14:42:31 +010097#define CONFIG_ENV_IS_IN_MMC
98#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
Chen-Yu Tsaiff2b47f2014-10-22 16:47:42 +080099#endif
Ian Campbelle24ea552014-05-05 14:42:31 +0100100
Ian Campbellcba69ee2014-05-05 11:52:26 +0100101/* 4MB of malloc() pool */
102#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
103
104/*
105 * Miscellaneous configurable options
106 */
107#define CONFIG_CMD_ECHO
Ian Campbell06beadb2014-10-07 14:20:30 +0100108#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
109#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100110#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
111#define CONFIG_SYS_GENERIC_BOARD
112
113/* Boot Argument Buffer Size */
114#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
115
Hans de Goede846e3252014-08-01 09:37:58 +0200116#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100117
118/* standalone support */
Hans de Goede846e3252014-08-01 09:37:58 +0200119#define CONFIG_STANDALONE_LOAD_ADDR 0x42000000
Ian Campbellcba69ee2014-05-05 11:52:26 +0100120
Ian Campbellcba69ee2014-05-05 11:52:26 +0100121/* baudrate */
122#define CONFIG_BAUDRATE 115200
123
124/* The stack sizes are set up in start.S using the settings below */
125#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
126
127/* FLASH and environment organization */
128
129#define CONFIG_SYS_NO_FLASH
130
131#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */
132#define CONFIG_IDENT_STRING " Allwinner Technology"
133
Ian Campbelle24ea552014-05-05 14:42:31 +0100134#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100135#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
136
Ian Campbellcba69ee2014-05-05 11:52:26 +0100137#include <config_cmd_default.h>
Hans de Goedeb9fb3b92014-08-01 09:19:55 +0200138#undef CONFIG_CMD_FPGA
Ian Campbellcba69ee2014-05-05 11:52:26 +0100139
140#define CONFIG_FAT_WRITE /* enable write access */
141
142#define CONFIG_SPL_FRAMEWORK
143#define CONFIG_SPL_LIBCOMMON_SUPPORT
144#define CONFIG_SPL_SERIAL_SUPPORT
145#define CONFIG_SPL_LIBGENERIC_SUPPORT
146
Ian Campbell50827a52014-05-05 11:52:30 +0100147#ifdef CONFIG_SPL_FEL
148
Ian Campbellcba69ee2014-05-05 11:52:26 +0100149#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
150#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
151#define CONFIG_SPL_TEXT_BASE 0x2000
152#define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */
Ian Campbell50827a52014-05-05 11:52:30 +0100153
154#else /* CONFIG_SPL */
155
156#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
157#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */
158
159#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
160#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
161
162#define CONFIG_SPL_LIBDISK_SUPPORT
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200163
164#if !defined(CONFIG_UART0_PORT_F)
Ian Campbell50827a52014-05-05 11:52:30 +0100165#define CONFIG_SPL_MMC_SUPPORT
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200166#endif
Ian Campbell50827a52014-05-05 11:52:30 +0100167
168#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
169
170#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
171#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
172
173#endif /* CONFIG_SPL */
174
Ian Campbellcba69ee2014-05-05 11:52:26 +0100175/* end of 32 KiB in sram */
176#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
177#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
178#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
179#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
180
Hans de Goede66203772014-06-13 22:55:49 +0200181/* I2C */
182#define CONFIG_SPL_I2C_SUPPORT
183#define CONFIG_SYS_I2C
184#define CONFIG_SYS_I2C_MVTWSI
185#define CONFIG_SYS_I2C_SPEED 400000
186#define CONFIG_SYS_I2C_SLAVE 0x7f
187#define CONFIG_CMD_I2C
188
Henrik Nordstrom14bc66b2014-06-13 22:55:50 +0200189/* PMU */
190#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
191#define CONFIG_SPL_POWER_SUPPORT
192#endif
193
Hans de Goedef84269c2014-06-09 11:36:58 +0200194#ifndef CONFIG_CONS_INDEX
Ian Campbellcba69ee2014-05-05 11:52:26 +0100195#define CONFIG_CONS_INDEX 1 /* UART0 */
Hans de Goedef84269c2014-06-09 11:36:58 +0200196#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +0100197
Ian Campbellabce2c62014-06-05 19:00:15 +0100198/* GPIO */
199#define CONFIG_SUNXI_GPIO
Hans de Goedecd821132014-10-02 20:29:26 +0200200#define CONFIG_SPL_GPIO_SUPPORT
Ian Campbellabce2c62014-06-05 19:00:15 +0100201#define CONFIG_CMD_GPIO
202
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200203#ifdef CONFIG_VIDEO
204/*
205 * The amount of RAM that is reserved for the FB. This will not show up as
206 * RAM to the kernel, but will be reclaimed by a KMS driver in future.
207 */
Hans de Goede5f339932014-12-19 14:03:40 +0100208#define CONFIG_SUNXI_FB_SIZE (9 << 20)
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200209
Luc Verhaegen2d7a0842014-08-13 07:55:07 +0200210/* Do we want to initialize a simple FB? */
211#define CONFIG_VIDEO_DT_SIMPLEFB
212
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200213#define CONFIG_VIDEO_SUNXI
214
215#define CONFIG_CFB_CONSOLE
216#define CONFIG_VIDEO_SW_CURSOR
217#define CONFIG_VIDEO_LOGO
Hans de Goedebe8ec632014-12-19 13:46:33 +0100218#define CONFIG_VIDEO_STD_TIMINGS
Hans de Goede75481602014-12-19 16:05:12 +0100219#define CONFIG_I2C_EDID
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200220
221/* allow both serial and cfb console. */
222#define CONFIG_CONSOLE_MUX
223/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
224#define CONFIG_VGA_AS_SINGLE_DEVICE
225
226#define CONFIG_SYS_MEM_TOP_HIDE ((CONFIG_SUNXI_FB_SIZE + 0xFFF) & ~0xFFF)
227
Luc Verhaegen2d7a0842014-08-13 07:55:07 +0200228/* To be able to hook simplefb into dt */
229#ifdef CONFIG_VIDEO_DT_SIMPLEFB
230#define CONFIG_OF_BOARD_SETUP
231#endif
232
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200233#endif /* CONFIG_VIDEO */
234
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200235/* Ethernet support */
236#ifdef CONFIG_SUNXI_EMAC
237#define CONFIG_MII /* MII PHY management */
238#endif
239
Ian Campbell58358232014-05-05 11:52:28 +0100240#ifdef CONFIG_SUNXI_GMAC
241#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
242#define CONFIG_DW_AUTONEG
243#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
244#define CONFIG_PHY_ADDR 1
245#define CONFIG_MII /* MII PHY management */
246#define CONFIG_PHYLIB
247#endif
248
Roman Byshko3584f302014-07-24 22:54:22 +0200249#ifdef CONFIG_USB_EHCI
250#define CONFIG_CMD_USB
251#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
252#define CONFIG_USB_STORAGE
253#endif
254
Hans de Goede86b49092014-09-18 21:03:34 +0200255#ifdef CONFIG_USB_KEYBOARD
256#define CONFIG_CONSOLE_MUX
257#define CONFIG_PREBOOT
258#define CONFIG_SYS_STDIO_DEREGISTER
259#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
260#endif
261
Ian Campbellcba69ee2014-05-05 11:52:26 +0100262#if !defined CONFIG_ENV_IS_IN_MMC && \
263 !defined CONFIG_ENV_IS_IN_NAND && \
264 !defined CONFIG_ENV_IS_IN_FAT && \
265 !defined CONFIG_ENV_IS_IN_SPI_FLASH
266#define CONFIG_ENV_IS_NOWHERE
267#endif
268
Jonathan Liub41d7d02014-06-14 08:59:09 +0200269#define CONFIG_MISC_INIT_R
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200270#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Jonathan Liub41d7d02014-06-14 08:59:09 +0200271
Ian Campbellcba69ee2014-05-05 11:52:26 +0100272#ifndef CONFIG_SPL_BUILD
273#include <config_distro_defaults.h>
Hans de Goede2ec3a612014-07-31 23:04:45 +0200274
Siarhei Siamashkaa7925072015-01-08 09:02:32 +0200275/* Enable pre-console buffer to get complete log on the VGA console */
276#define CONFIG_PRE_CONSOLE_BUFFER
277#define CONFIG_PRE_CON_BUF_SZ (1024 * 1024)
278/* Use the room between the end of bootm_size and the framebuffer */
279#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
280
Hans de Goede8c95c552014-12-24 16:08:30 +0100281/*
282 * 240M RAM (256M minimum minus space for the framebuffer),
283 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
284 * 1M script, 1M pxe and the ramdisk at the end.
285 */
Hans de Goede846e3252014-08-01 09:37:58 +0200286#define MEM_LAYOUT_ENV_SETTINGS \
Hans de Goede8c95c552014-12-24 16:08:30 +0100287 "bootm_size=0xf000000\0" \
Hans de Goede846e3252014-08-01 09:37:58 +0200288 "kernel_addr_r=0x42000000\0" \
289 "fdt_addr_r=0x43000000\0" \
290 "scriptaddr=0x43100000\0" \
291 "pxefile_addr_r=0x43200000\0" \
292 "ramdisk_addr_r=0x43300000\0"
293
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800294#ifdef CONFIG_MMC
295#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
296#else
297#define BOOT_TARGET_DEVICES_MMC(func)
298#endif
299
Hans de Goede2ec3a612014-07-31 23:04:45 +0200300#ifdef CONFIG_AHCI
301#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
302#else
303#define BOOT_TARGET_DEVICES_SCSI(func)
304#endif
305
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800306#ifdef CONFIG_USB_EHCI
307#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
308#else
309#define BOOT_TARGET_DEVICES_USB(func)
310#endif
311
Hans de Goede2ec3a612014-07-31 23:04:45 +0200312#define BOOT_TARGET_DEVICES(func) \
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800313 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200314 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800315 BOOT_TARGET_DEVICES_USB(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200316 func(PXE, pxe, na) \
317 func(DHCP, dhcp, na)
318
319#include <config_distro_bootcmd.h>
320
Hans de Goede86b49092014-09-18 21:03:34 +0200321#ifdef CONFIG_USB_KEYBOARD
322#define CONSOLE_STDIN_SETTINGS \
323 "preboot=usb start\0" \
324 "stdin=serial,usbkbd\0"
325#else
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200326#define CONSOLE_STDIN_SETTINGS \
327 "stdin=serial\0"
Hans de Goede86b49092014-09-18 21:03:34 +0200328#endif
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200329
330#ifdef CONFIG_VIDEO
331#define CONSOLE_STDOUT_SETTINGS \
332 "stdout=serial,vga\0" \
333 "stderr=serial,vga\0"
334#else
335#define CONSOLE_STDOUT_SETTINGS \
336 "stdout=serial\0" \
337 "stderr=serial\0"
338#endif
339
340#define CONSOLE_ENV_SETTINGS \
341 CONSOLE_STDIN_SETTINGS \
342 CONSOLE_STDOUT_SETTINGS
343
Hans de Goede2ec3a612014-07-31 23:04:45 +0200344#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200345 CONSOLE_ENV_SETTINGS \
Hans de Goede846e3252014-08-01 09:37:58 +0200346 MEM_LAYOUT_ENV_SETTINGS \
Ian Campbell98e214d2014-08-31 13:13:43 +0100347 "fdtfile=" CONFIG_FDTFILE "\0" \
Hans de Goede846e3252014-08-01 09:37:58 +0200348 "console=ttyS0,115200\0" \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200349 BOOTENV
350
351#else /* ifndef CONFIG_SPL_BUILD */
352#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbellcba69ee2014-05-05 11:52:26 +0100353#endif
354
355#endif /* _SUNXI_COMMON_CONFIG_H */