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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mingkai Hudd029362016-09-07 18:47:28 +08002/*
3 * Copyright 2016 Freescale Semiconductor
Yangbo Lu34f39ce2021-06-03 10:51:19 +08004 * Copyright 2019-2021 NXP
Mingkai Hudd029362016-09-07 18:47:28 +08005 */
6
7#ifndef __LS1046A_COMMON_H
8#define __LS1046A_COMMON_H
9
Sumit Garga52ff332017-03-30 09:53:13 +053010/* SPL build */
11#ifdef CONFIG_SPL_BUILD
12#define SPL_NO_QBMAN
13#define SPL_NO_FMAN
14#define SPL_NO_ENV
15#define SPL_NO_MISC
16#define SPL_NO_QSPI
17#define SPL_NO_USB
18#define SPL_NO_SATA
19#endif
York Sun038b9652018-06-26 14:48:29 -070020#if defined(CONFIG_SPL_BUILD) && \
21 (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
Sumit Garga52ff332017-03-30 09:53:13 +053022#define SPL_NO_MMC
23#endif
York Sun80bec962018-06-08 16:37:27 -070024#if defined(CONFIG_SPL_BUILD) && \
York Sun80bec962018-06-08 16:37:27 -070025 !defined(CONFIG_SPL_FSL_LS_PPA)
Sumit Garga52ff332017-03-30 09:53:13 +053026#define SPL_NO_IFC
27#endif
28
Mingkai Hudd029362016-09-07 18:47:28 +080029#define CONFIG_REMAKE_ELF
Mingkai Hudd029362016-09-07 18:47:28 +080030
31#include <asm/arch/config.h>
Bharat Bhushanb52a0502017-03-22 12:06:28 +053032#include <asm/arch/stream_id_lsch2.h>
Mingkai Hudd029362016-09-07 18:47:28 +080033
34/* Link Definitions */
Rajesh Bhagat8e156bb2018-11-05 18:02:36 +000035#ifdef CONFIG_TFABOOT
36#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
37#else
Mingkai Hudd029362016-09-07 18:47:28 +080038#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
Rajesh Bhagat8e156bb2018-11-05 18:02:36 +000039#endif
Mingkai Hudd029362016-09-07 18:47:28 +080040
Mingkai Hudd029362016-09-07 18:47:28 +080041#define CONFIG_VERY_BIG_RAM
42#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
43#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
44#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
45#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
46
Michael Walle3d3fe8b2020-06-01 21:53:26 +020047#define CPU_RELEASE_ADDR secondary_boot_addr
Mingkai Hudd029362016-09-07 18:47:28 +080048
49/* Generic Timer Definitions */
50#define COUNTER_FREQUENCY 25000000 /* 25MHz */
51
Mingkai Hudd029362016-09-07 18:47:28 +080052/* Serial Port */
Mingkai Hudd029362016-09-07 18:47:28 +080053#define CONFIG_SYS_NS16550_SERIAL
54#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang904110c2017-01-10 16:44:15 +080055#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Mingkai Hudd029362016-09-07 18:47:28 +080056
Mingkai Hudd029362016-09-07 18:47:28 +080057/* SD boot SPL */
58#ifdef CONFIG_SD_BOOT
Mingkai Hudd029362016-09-07 18:47:28 +080059#define CONFIG_SPL_MAX_SIZE 0x1f000 /* 124 KiB */
60#define CONFIG_SPL_STACK 0x10020000
61#define CONFIG_SPL_PAD_TO 0x21000 /* 132 KiB */
62#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
63#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
64#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
65 CONFIG_SPL_BSS_MAX_SIZE)
66#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
Ruchika Gupta511fc862017-04-17 18:07:19 +053067
Udit Agarwal5536c3c2019-11-07 16:11:32 +000068#ifdef CONFIG_NXP_ESBC
Ruchika Gupta511fc862017-04-17 18:07:19 +053069#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
70/*
71 * HDR would be appended at end of image and copied to DDR along
72 * with U-Boot image. Here u-boot max. size is 512K. So if binary
73 * size increases then increase this size in case of secure boot as
74 * it uses raw u-boot image instead of fit image.
75 */
76#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
77#else
78#define CONFIG_SYS_MONITOR_LEN 0x100000
Udit Agarwal5536c3c2019-11-07 16:11:32 +000079#endif /* ifdef CONFIG_NXP_ESBC */
Mingkai Hudd029362016-09-07 18:47:28 +080080#endif
81
York Sun038b9652018-06-26 14:48:29 -070082#if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
83#define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl"
York Sun038b9652018-06-26 14:48:29 -070084#define CONFIG_SPL_MAX_SIZE 0x1f000
85#define CONFIG_SPL_STACK 0x10020000
86#define CONFIG_SPL_PAD_TO 0x20000
87#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
88#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
89#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
90 CONFIG_SPL_BSS_MAX_SIZE)
91#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
92#define CONFIG_SYS_MONITOR_LEN 0x100000
York Sun038b9652018-06-26 14:48:29 -070093#endif
94
Shaohui Xie126fe702016-09-07 17:56:14 +080095/* NAND SPL */
96#ifdef CONFIG_NAND_BOOT
97#define CONFIG_SPL_PBL_PAD
Shaohui Xie126fe702016-09-07 17:56:14 +080098
Ruchika Gupta511fc862017-04-17 18:07:19 +053099#define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */
Shaohui Xie126fe702016-09-07 17:56:14 +0800100#define CONFIG_SPL_STACK 0x1001f000
101#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
102#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
103
104#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
105#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
106#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
107 CONFIG_SPL_BSS_MAX_SIZE)
108#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
109#define CONFIG_SYS_MONITOR_LEN 0xa0000
110#endif
111
Biwen Li0077d712021-02-05 19:02:01 +0800112/* GPIO */
113#ifdef CONFIG_DM_GPIO
114#ifndef CONFIG_MPC8XXX_GPIO
115#define CONFIG_MPC8XXX_GPIO
116#endif
117#endif
118
Mingkai Hudd029362016-09-07 18:47:28 +0800119/* I2C */
Mingkai Hudd029362016-09-07 18:47:28 +0800120
Hou Zhiqiang3098e532017-04-14 16:49:01 +0800121/* PCIe */
122#define CONFIG_PCIE1 /* PCIE controller 1 */
123#define CONFIG_PCIE2 /* PCIE controller 2 */
124#define CONFIG_PCIE3 /* PCIE controller 3 */
125
126#ifdef CONFIG_PCI
127#define CONFIG_PCI_SCAN_SHOW
Hou Zhiqiang3098e532017-04-14 16:49:01 +0800128#endif
129
Yuantian Tangf216ef22018-01-03 15:53:09 +0800130/* SATA */
131#ifndef SPL_NO_SATA
132#define CONFIG_SCSI_AHCI_PLAT
133
134#define CONFIG_SYS_SATA AHCI_BASE_ADDR
135
136#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
137#define CONFIG_SYS_SCSI_MAX_LUN 1
138#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
139 CONFIG_SYS_SCSI_MAX_LUN)
140#endif
141
Mingkai Hudd029362016-09-07 18:47:28 +0800142/* FMan ucode */
Sumit Garga52ff332017-03-30 09:53:13 +0530143#ifndef SPL_NO_FMAN
Mingkai Hudd029362016-09-07 18:47:28 +0800144#define CONFIG_SYS_DPAA_FMAN
145#ifdef CONFIG_SYS_DPAA_FMAN
146#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
Sumit Garga52ff332017-03-30 09:53:13 +0530147#endif
Mingkai Hudd029362016-09-07 18:47:28 +0800148
Rajesh Bhagat8e156bb2018-11-05 18:02:36 +0000149#ifdef CONFIG_TFABOOT
150#define CONFIG_SYS_FMAN_FW_ADDR 0x900000
Rajesh Bhagat8e156bb2018-11-05 18:02:36 +0000151#else
Mingkai Hudd029362016-09-07 18:47:28 +0800152#ifdef CONFIG_SD_BOOT
153/*
154 * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
155 * about 1MB (2048 blocks), Env is stored after the image, and the env size is
Alison Wang8104deb2017-05-16 10:45:59 +0800156 * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
Mingkai Hudd029362016-09-07 18:47:28 +0800157 */
Alison Wang8104deb2017-05-16 10:45:59 +0800158#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800)
Shaohui Xie126fe702016-09-07 17:56:14 +0800159#elif defined(CONFIG_QSPI_BOOT)
Alison Wang8104deb2017-05-16 10:45:59 +0800160#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000
Shaohui Xie126fe702016-09-07 17:56:14 +0800161#elif defined(CONFIG_NAND_BOOT)
Tom Rinia0de0752021-09-22 14:50:29 -0400162#define CONFIG_SYS_FMAN_FW_ADDR (36 * (256 * 1024))
Shaohui Xie126fe702016-09-07 17:56:14 +0800163#else
Alison Wang8104deb2017-05-16 10:45:59 +0800164#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
Mingkai Hudd029362016-09-07 18:47:28 +0800165#endif
Rajesh Bhagat8e156bb2018-11-05 18:02:36 +0000166#endif
Mingkai Hudd029362016-09-07 18:47:28 +0800167#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
168#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
169#endif
170
171/* Miscellaneous configurable options */
Mingkai Hudd029362016-09-07 18:47:28 +0800172
173#define CONFIG_HWCONFIG
174#define HWCONFIG_BUFFER_SIZE 128
175
Qianyu Gong8de227e2017-06-15 11:10:09 +0800176#ifndef CONFIG_SPL_BUILD
177#define BOOT_TARGET_DEVICES(func) \
Yuantian Tangf216ef22018-01-03 15:53:09 +0800178 func(SCSI, scsi, 0) \
Qianyu Gong8de227e2017-06-15 11:10:09 +0800179 func(MMC, mmc, 0) \
Mian Yousaf Kaukabf43cc402019-01-29 16:38:37 +0100180 func(USB, usb, 0) \
181 func(DHCP, dhcp, na)
Qianyu Gong8de227e2017-06-15 11:10:09 +0800182#include <config_distro_bootcmd.h>
183#endif
184
Vabhav Sharmad90c7ac2019-06-06 12:35:28 +0000185#if defined(CONFIG_TARGET_LS1046AFRWY)
186#define LS1046A_BOOT_SRC_AND_HDR\
187 "boot_scripts=ls1046afrwy_boot.scr\0" \
188 "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
Biwen Lid71f65e2020-04-20 18:29:06 +0800189#elif defined(CONFIG_TARGET_LS1046AQDS)
190#define LS1046A_BOOT_SRC_AND_HDR\
191 "boot_scripts=ls1046aqds_boot.scr\0" \
192 "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
Vabhav Sharmad90c7ac2019-06-06 12:35:28 +0000193#else
194#define LS1046A_BOOT_SRC_AND_HDR\
195 "boot_scripts=ls1046ardb_boot.scr\0" \
196 "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
197#endif
Sumit Garga52ff332017-03-30 09:53:13 +0530198#ifndef SPL_NO_MISC
Mingkai Hudd029362016-09-07 18:47:28 +0800199/* Initial environment variables */
200#define CONFIG_EXTRA_ENV_SETTINGS \
201 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
Mingkai Hudd029362016-09-07 18:47:28 +0800202 "ramdisk_addr=0x800000\0" \
203 "ramdisk_size=0x2000000\0" \
Yuantian Tange9d9c2e2020-02-19 17:02:22 +0800204 "bootm_size=0x10000000\0" \
Qianyu Gong8de227e2017-06-15 11:10:09 +0800205 "fdt_addr=0x64f00000\0" \
Biwen Lid71f65e2020-04-20 18:29:06 +0800206 "kernel_addr=0x61000000\0" \
Qianyu Gong8de227e2017-06-15 11:10:09 +0800207 "scriptaddr=0x80000000\0" \
Sumit Gargf7b75f82017-06-06 20:50:29 +0530208 "scripthdraddr=0x80080000\0" \
Qianyu Gong8de227e2017-06-15 11:10:09 +0800209 "fdtheader_addr_r=0x80100000\0" \
210 "kernelheader_addr_r=0x80200000\0" \
211 "load_addr=0xa0000000\0" \
Sumit Gargf7b75f82017-06-06 20:50:29 +0530212 "kernel_addr_r=0x81000000\0" \
Qianyu Gong8de227e2017-06-15 11:10:09 +0800213 "fdt_addr_r=0x90000000\0" \
214 "ramdisk_addr_r=0xa0000000\0" \
Mingkai Hudd029362016-09-07 18:47:28 +0800215 "kernel_start=0x1000000\0" \
Priyanka Singhe735ad32020-01-22 10:29:46 +0000216 "kernelheader_start=0x600000\0" \
Mingkai Hudd029362016-09-07 18:47:28 +0800217 "kernel_load=0xa0000000\0" \
218 "kernel_size=0x2800000\0" \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530219 "kernelheader_size=0x40000\0" \
Shengzhou Liuaab2ef92017-11-09 17:57:56 +0800220 "kernel_addr_sd=0x8000\0" \
221 "kernel_size_sd=0x14000\0" \
Priyanka Singhe735ad32020-01-22 10:29:46 +0000222 "kernelhdr_addr_sd=0x3000\0" \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530223 "kernelhdr_size_sd=0x10\0" \
Mingkai Hudd029362016-09-07 18:47:28 +0800224 "console=ttyS0,115200\0" \
Tom Rini43ede0b2017-10-22 17:55:07 -0400225 CONFIG_MTDPARTS_DEFAULT "\0" \
Qianyu Gong8de227e2017-06-15 11:10:09 +0800226 BOOTENV \
Vabhav Sharmad90c7ac2019-06-06 12:35:28 +0000227 LS1046A_BOOT_SRC_AND_HDR \
Qianyu Gong8de227e2017-06-15 11:10:09 +0800228 "scan_dev_for_boot_part=" \
229 "part list ${devtype} ${devnum} devplist; " \
230 "env exists devplist || setenv devplist 1; " \
231 "for distro_bootpart in ${devplist}; do " \
232 "if fstype ${devtype} " \
233 "${devnum}:${distro_bootpart} " \
234 "bootfstype; then " \
235 "run scan_dev_for_boot; " \
236 "fi; " \
237 "done\0" \
Sumit Gargf7b75f82017-06-06 20:50:29 +0530238 "boot_a_script=" \
239 "load ${devtype} ${devnum}:${distro_bootpart} " \
240 "${scriptaddr} ${prefix}${script}; " \
241 "env exists secureboot && load ${devtype} " \
242 "${devnum}:${distro_bootpart} " \
Vinitha V Pillai78c58082019-04-23 05:52:17 +0000243 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
244 "env exists secureboot " \
245 "&& esbc_validate ${scripthdraddr};" \
Sumit Gargf7b75f82017-06-06 20:50:29 +0530246 "source ${scriptaddr}\0" \
Qianyu Gong8de227e2017-06-15 11:10:09 +0800247 "qspi_bootcmd=echo Trying load from qspi..;" \
248 "sf probe && sf read $load_addr " \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530249 "$kernel_start $kernel_size; env exists secureboot " \
250 "&& sf read $kernelheader_addr_r $kernelheader_start " \
251 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
252 "bootm $load_addr#$board\0" \
Biwen Lid71f65e2020-04-20 18:29:06 +0800253 "nand_bootcmd=echo Trying load from nand..;" \
254 "nand info; nand read $load_addr " \
255 "$kernel_start $kernel_size; env exists secureboot " \
256 "&& nand read $kernelheader_addr_r $kernelheader_start " \
257 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
258 "bootm $load_addr#$board\0" \
259 "nor_bootcmd=echo Trying load from nor..;" \
260 "cp.b $kernel_addr $load_addr " \
261 "$kernel_size; env exists secureboot " \
262 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
263 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
264 "bootm $load_addr#$board\0" \
Shengzhou Liuaab2ef92017-11-09 17:57:56 +0800265 "sd_bootcmd=echo Trying load from SD ..;" \
266 "mmcinfo; mmc read $load_addr " \
267 "$kernel_addr_sd $kernel_size_sd && " \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530268 "env exists secureboot && mmc read $kernelheader_addr_r " \
269 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
270 " && esbc_validate ${kernelheader_addr_r};" \
Shengzhou Liuaab2ef92017-11-09 17:57:56 +0800271 "bootm $load_addr#$board\0"
Qianyu Gong8de227e2017-06-15 11:10:09 +0800272
Sumit Garga52ff332017-03-30 09:53:13 +0530273#endif
274
Mingkai Hudd029362016-09-07 18:47:28 +0800275/* Monitor Command Prompt */
276#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Sumit Garga52ff332017-03-30 09:53:13 +0530277
Mingkai Hudd029362016-09-07 18:47:28 +0800278#define CONFIG_SYS_MAXARGS 64 /* max command args */
279
280#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
281
Simon Glass457e51c2017-05-17 08:23:10 -0600282#include <asm/arch/soc.h>
283
Mingkai Hudd029362016-09-07 18:47:28 +0800284#endif /* __LS1046A_COMMON_H */