Dinh Nguyen | 7775440 | 2012-10-04 06:46:02 +0000 | [diff] [blame] | 1 | # |
| 2 | # (C) Copyright 2000-2003 |
| 3 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | # |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 5 | # Copyright (C) 2012-2017 Altera Corporation <www.altera.com> |
Dinh Nguyen | 7775440 | 2012-10-04 06:46:02 +0000 | [diff] [blame] | 6 | # |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | # SPDX-License-Identifier: GPL-2.0+ |
Dinh Nguyen | 7775440 | 2012-10-04 06:46:02 +0000 | [diff] [blame] | 8 | # |
| 9 | |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 10 | obj-y += board.o |
| 11 | obj-y += clock_manager.o |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 12 | obj-y += misc.o |
| 13 | obj-y += reset_manager.o |
| 14 | obj-y += timer.o |
Dinh Nguyen | e5ad7d9 | 2015-12-02 13:31:32 -0600 | [diff] [blame] | 15 | |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 16 | ifdef CONFIG_TARGET_SOCFPGA_GEN5 |
| 17 | obj-y += clock_manager_gen5.o |
| 18 | obj-y += misc_gen5.o |
| 19 | obj-y += reset_manager_gen5.o |
| 20 | obj-y += scan_manager.o |
| 21 | obj-y += system_manager_gen5.o |
| 22 | obj-y += wrap_pll_config.o |
Tien Fong Chee | 6867e19 | 2017-07-26 13:05:38 +0800 | [diff] [blame] | 23 | obj-y += fpga_manager.o |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 24 | endif |
Ley Foon Tan | 827e6a7 | 2017-04-26 02:44:38 +0800 | [diff] [blame] | 25 | |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 26 | ifdef CONFIG_TARGET_SOCFPGA_ARRIA10 |
| 27 | obj-y += clock_manager_arria10.o |
| 28 | obj-y += misc_arria10.o |
| 29 | obj-y += pinmux_arria10.o |
| 30 | obj-y += reset_manager_arria10.o |
| 31 | endif |
Marek Vasut | ca62d2e | 2015-08-02 21:12:09 +0200 | [diff] [blame] | 32 | |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 33 | ifdef CONFIG_SPL_BUILD |
| 34 | obj-y += spl.o |
| 35 | ifdef CONFIG_TARGET_SOCFPGA_GEN5 |
| 36 | obj-y += freeze_controller.o |
| 37 | obj-y += wrap_iocsr_config.o |
| 38 | obj-y += wrap_pinmux_config.o |
| 39 | obj-y += wrap_sdram_config.o |
| 40 | endif |
| 41 | endif |
| 42 | |
| 43 | ifdef CONFIG_TARGET_SOCFPGA_GEN5 |
Marek Vasut | ca62d2e | 2015-08-02 21:12:09 +0200 | [diff] [blame] | 44 | # QTS-generated config file wrappers |
Marek Vasut | ca62d2e | 2015-08-02 21:12:09 +0200 | [diff] [blame] | 45 | CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR) |
| 46 | CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR) |
| 47 | CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR) |
| 48 | CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR) |
Ley Foon Tan | d89e979 | 2017-04-26 02:44:48 +0800 | [diff] [blame] | 49 | endif |