blob: 8094ac4efe0d6feb120433e021f0cd2e723c85dd [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
Simon Glass24b852a2015-11-08 23:47:45 -070016#include <console.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000017#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060018#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000019#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000020#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000021#if defined(CONFIG_CMD_IDE)
22#include <ide.h>
23#endif
24#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000025#include <initcall.h>
26#include <logbuff.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070027#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050028#include <mapmem.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000029
30/* TODO: Can we move these into arch/ headers? */
31#ifdef CONFIG_8xx
32#include <mpc8xx.h>
33#endif
34#ifdef CONFIG_5xx
35#include <mpc5xx.h>
36#endif
37#ifdef CONFIG_MPC5xxx
38#include <mpc5xxx.h>
39#endif
Gabriel Huauec3b4822014-09-03 13:57:54 -070040#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Gabriel Huaua76df702014-07-26 11:35:43 -070041#include <asm/mp.h>
42#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000043
Simon Glassa733b062013-04-26 02:53:43 +000044#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000045#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000046#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020047#include <status_led.h>
Simon Glass71c52db2013-06-11 11:14:42 -070048#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000049#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000050#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000051#include <asm/io.h>
52#include <asm/sections.h>
Alexey Brodkin3fb80162015-02-24 19:40:36 +030053#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +000054#include <asm/init_helpers.h>
55#include <asm/relocate.h>
56#endif
Simon Glassa733b062013-04-26 02:53:43 +000057#ifdef CONFIG_SANDBOX
58#include <asm/state.h>
59#endif
Simon Glassab7cd622014-07-23 06:55:04 -060060#include <dm/root.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000061#include <linux/compiler.h>
62
63/*
64 * Pointer to initial global data area
65 *
66 * Here we initialize it if needed.
67 */
68#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
69#undef XTRN_DECLARE_GLOBAL_DATA_PTR
70#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
71DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
72#else
73DECLARE_GLOBAL_DATA_PTR;
74#endif
75
76/*
Simon Glass4c509342015-04-28 20:25:03 -060077 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000078 * refactored to a single function, something like:
79 *
80 * void led_set_state(enum led_colour_t colour, int on);
81 */
82/************************************************************************
83 * Coloured LED functionality
84 ************************************************************************
85 * May be supplied by boards if desired
86 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020087__weak void coloured_LED_init(void) {}
88__weak void red_led_on(void) {}
89__weak void red_led_off(void) {}
90__weak void green_led_on(void) {}
91__weak void green_led_off(void) {}
92__weak void yellow_led_on(void) {}
93__weak void yellow_led_off(void) {}
94__weak void blue_led_on(void) {}
95__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000096
97/*
98 * Why is gd allocated a register? Prior to reloc it might be better to
99 * just pass it around to each function in this file?
100 *
101 * After reloc one could argue that it is hardly used and doesn't need
102 * to be in a register. Or if it is it should perhaps hold pointers to all
103 * global data for all modules, so that post-reloc we can avoid the massive
104 * literal pool we get on ARM. Or perhaps just encourage each module to use
105 * a structure...
106 */
107
108/*
109 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
110 */
111
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800112#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000113static int init_func_watchdog_init(void)
114{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800115# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
116 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Stefan Roese14a380a2015-03-10 08:04:36 +0100117 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
118 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800119 hw_watchdog_init();
120# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000121 puts(" Watchdog enabled\n");
122 WATCHDOG_RESET();
123
124 return 0;
125}
126
127int init_func_watchdog_reset(void)
128{
129 WATCHDOG_RESET();
130
131 return 0;
132}
133#endif /* CONFIG_WATCHDOG */
134
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200135__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000136{
137 /* please define platform specific board_add_ram_info() */
138}
139
Simon Glass1938f4a2013-03-11 06:49:53 +0000140static int init_baud_rate(void)
141{
142 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
143 return 0;
144}
145
146static int display_text_info(void)
147{
Ben Stoltz9b217492015-07-31 09:31:37 -0600148#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100149 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000150
Simon Glass632efa72013-03-11 07:06:48 +0000151 bss_start = (ulong)&__bss_start;
152 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100153
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800154#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100155 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800156#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100157 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800158#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100159
160 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
161 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000162#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000163
164#ifdef CONFIG_MODEM_SUPPORT
165 debug("Modem Support enabled\n");
166#endif
167#ifdef CONFIG_USE_IRQ
168 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
169 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
170#endif
171
172 return 0;
173}
174
175static int announce_dram_init(void)
176{
177 puts("DRAM: ");
178 return 0;
179}
180
angelo@sysam.ite310b932015-02-12 01:40:17 +0100181#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000182static int init_func_ram(void)
183{
184#ifdef CONFIG_BOARD_TYPES
185 int board_type = gd->board_type;
186#else
187 int board_type = 0; /* use dummy arg */
188#endif
189
190 gd->ram_size = initdram(board_type);
191
192 if (gd->ram_size > 0)
193 return 0;
194
195 puts("*** failed ***\n");
196 return 1;
197}
198#endif
199
Simon Glass1938f4a2013-03-11 06:49:53 +0000200static int show_dram_config(void)
201{
York Sunfa39ffe2014-05-02 17:28:05 -0700202 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000203
204#ifdef CONFIG_NR_DRAM_BANKS
205 int i;
206
207 debug("\nRAM Configuration:\n");
208 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
209 size += gd->bd->bi_dram[i].size;
Bin Meng715f5992015-08-06 01:31:20 -0700210 debug("Bank #%d: %llx ", i,
211 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glass1938f4a2013-03-11 06:49:53 +0000212#ifdef DEBUG
213 print_size(gd->bd->bi_dram[i].size, "\n");
214#endif
215 }
216 debug("\nDRAM: ");
217#else
218 size = gd->ram_size;
219#endif
220
Simon Glasse4fef6c2013-03-11 14:30:42 +0000221 print_size(size, "");
222 board_add_ram_info(0);
223 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000224
225 return 0;
226}
227
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200228__weak void dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000229{
230#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
231 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
232 gd->bd->bi_dram[0].size = get_effective_memsize();
233#endif
234}
235
Heiko Schocherea818db2013-01-29 08:53:15 +0100236#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000237static int init_func_i2c(void)
238{
239 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200240#ifdef CONFIG_SYS_I2C
241 i2c_init_all();
242#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000243 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200244#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000245 puts("ready\n");
246 return 0;
247}
248#endif
249
250#if defined(CONFIG_HARD_SPI)
251static int init_func_spi(void)
252{
253 puts("SPI: ");
254 spi_init();
255 puts("ready\n");
256 return 0;
257}
258#endif
259
260__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000261static int zero_global_data(void)
262{
263 memset((void *)gd, '\0', sizeof(gd_t));
264
265 return 0;
266}
267
268static int setup_mon_len(void)
269{
Michal Simeke945f6d2014-05-08 16:08:44 +0200270#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100271 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Ben Stoltz9b217492015-07-31 09:31:37 -0600272#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
Simon Glassa733b062013-04-26 02:53:43 +0000273 gd->mon_len = (ulong)&_end - (ulong)_init;
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800274#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800275 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800276#elif defined(CONFIG_NDS32)
277 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
Simon Glass632efa72013-03-11 07:06:48 +0000278#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000279 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
280 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000281#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000282 return 0;
283}
284
285__weak int arch_cpu_init(void)
286{
287 return 0;
288}
289
Simon Glassa733b062013-04-26 02:53:43 +0000290#ifdef CONFIG_SANDBOX
291static int setup_ram_buf(void)
292{
Simon Glass5c2859c2013-11-10 10:27:03 -0700293 struct sandbox_state *state = state_get_current();
294
295 gd->arch.ram_buf = state->ram_buf;
296 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000297
298 return 0;
299}
300#endif
301
Simon Glass1938f4a2013-03-11 06:49:53 +0000302/* Get the top of usable RAM */
303__weak ulong board_get_usable_ram_top(ulong total_size)
304{
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700305#ifdef CONFIG_SYS_SDRAM_BASE
306 /*
Simon Glass4c509342015-04-28 20:25:03 -0600307 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700308 * 32-bit address space. If so, clip the usable RAM so it doesn't.
309 */
310 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
311 /*
312 * Will wrap back to top of 32-bit space when reservations
313 * are made.
314 */
315 return 0;
316#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000317 return gd->ram_top;
318}
319
York Sunaabd7dd2015-12-07 11:05:29 -0800320__weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
321{
322#ifdef CONFIG_SYS_MEM_TOP_HIDE
323 return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
324#else
325 return ram_size;
326#endif
327}
328
Simon Glass1938f4a2013-03-11 06:49:53 +0000329static int setup_dest_addr(void)
330{
331 debug("Monitor len: %08lX\n", gd->mon_len);
332 /*
333 * Ram is setup, size stored in gd !!
334 */
335 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
York Sune8149522015-12-04 11:57:07 -0800336#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
337 /* Reserve memory for secure MMU tables, and/or security monitor */
338 gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
339 /*
340 * Record secure memory location. Need recalcuate if memory splits
341 * into banks, or the ram base is not zero.
342 */
343 gd->secure_ram = gd->ram_size;
344#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000345 /*
346 * Subtract specified amount of memory to hide so that it won't
347 * get "touched" at all by U-Boot. By fixing up gd->ram_size
348 * the Linux kernel should now get passed the now "corrected"
York Sunaabd7dd2015-12-07 11:05:29 -0800349 * memory size and won't touch it either. This has been used
350 * by arch/powerpc exclusively. Now ARMv8 takes advantage of
351 * thie mechanism. If memory is split into banks, addresses
352 * need to be calculated.
Simon Glass1938f4a2013-03-11 06:49:53 +0000353 */
York Sunaabd7dd2015-12-07 11:05:29 -0800354 gd->ram_size = board_reserve_ram_top(gd->ram_size);
355
Simon Glass1938f4a2013-03-11 06:49:53 +0000356#ifdef CONFIG_SYS_SDRAM_BASE
357 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
358#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000359 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000360 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000361 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000362 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700363#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000364 /*
365 * We need to make sure the location we intend to put secondary core
366 * boot code is reserved and not used by any part of u-boot
367 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000368 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
369 gd->relocaddr = determine_mp_bootpg(NULL);
370 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000371 }
372#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000373 return 0;
374}
375
Francois Retief1e85cce2015-11-23 13:05:44 +0200376#if defined(CONFIG_SPARC)
377static int reserve_prom(void)
378{
379 /* defined in arch/sparc/cpu/leon?/prom.c */
380 extern void *__prom_start_reloc;
381 int size = 8192; /* page table = 2k, prom = 6k */
382 gd->relocaddr -= size;
383 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
384 debug("Reserving %dk for PROM and page table at %08lx\n", size,
385 gd->relocaddr);
386 return 0;
387}
388#endif
389
Simon Glass1938f4a2013-03-11 06:49:53 +0000390#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
391static int reserve_logbuffer(void)
392{
393 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000394 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000395 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000396 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000397 return 0;
398}
399#endif
400
401#ifdef CONFIG_PRAM
402/* reserve protected RAM */
403static int reserve_pram(void)
404{
405 ulong reg;
406
407 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000408 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000409 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000410 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000411 return 0;
412}
413#endif /* CONFIG_PRAM */
414
415/* Round memory pointer down to next 4 kB limit */
416static int reserve_round_4k(void)
417{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000418 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000419 return 0;
420}
421
422#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
423 defined(CONFIG_ARM)
424static int reserve_mmu(void)
425{
426 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800427 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000428 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000429
430 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000431 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000432
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000433 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000434 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
435 gd->arch.tlb_addr + gd->arch.tlb_size);
436 return 0;
437}
438#endif
439
440#ifdef CONFIG_LCD
441static int reserve_lcd(void)
442{
443#ifdef CONFIG_FB_ADDR
444 gd->fb_base = CONFIG_FB_ADDR;
445#else
446 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000447 gd->relocaddr = lcd_setmem(gd->relocaddr);
448 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000449#endif /* CONFIG_FB_ADDR */
450 return 0;
451}
452#endif /* CONFIG_LCD */
453
Simon Glass71c52db2013-06-11 11:14:42 -0700454static int reserve_trace(void)
455{
456#ifdef CONFIG_TRACE
457 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
458 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
459 debug("Reserving %dk for trace data at: %08lx\n",
460 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
461#endif
462
463 return 0;
464}
465
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800466#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
467 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
angelo@sysam.it944ab342015-03-28 11:34:52 +0100468 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000469static int reserve_video(void)
470{
471 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000472 gd->relocaddr = video_setmem(gd->relocaddr);
473 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000474
475 return 0;
476}
477#endif
478
Simon Glass1938f4a2013-03-11 06:49:53 +0000479static int reserve_uboot(void)
480{
481 /*
482 * reserve memory for U-Boot code, data & bss
483 * round down to next 4 kB limit
484 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000485 gd->relocaddr -= gd->mon_len;
486 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000487#ifdef CONFIG_E500
488 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000489 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000490#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000491
492 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000493 gd->relocaddr);
494
495 gd->start_addr_sp = gd->relocaddr;
496
Simon Glass1938f4a2013-03-11 06:49:53 +0000497 return 0;
498}
499
Simon Glass8cae8a62013-03-05 14:39:45 +0000500#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000501/* reserve memory for malloc() area */
502static int reserve_malloc(void)
503{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000504 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000505 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000506 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000507 return 0;
508}
509
510/* (permanently) allocate a Board Info struct */
511static int reserve_board(void)
512{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800513 if (!gd->bd) {
514 gd->start_addr_sp -= sizeof(bd_t);
515 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
516 memset(gd->bd, '\0', sizeof(bd_t));
517 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
518 sizeof(bd_t), gd->start_addr_sp);
519 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000520 return 0;
521}
Simon Glass8cae8a62013-03-05 14:39:45 +0000522#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000523
524static int setup_machine(void)
525{
526#ifdef CONFIG_MACH_TYPE
527 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
528#endif
529 return 0;
530}
531
532static int reserve_global_data(void)
533{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000534 gd->start_addr_sp -= sizeof(gd_t);
535 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000536 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000537 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000538 return 0;
539}
540
541static int reserve_fdt(void)
542{
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100543#ifndef CONFIG_OF_EMBED
Simon Glass1938f4a2013-03-11 06:49:53 +0000544 /*
Simon Glass4c509342015-04-28 20:25:03 -0600545 * If the device tree is sitting immediately above our image then we
Simon Glass1938f4a2013-03-11 06:49:53 +0000546 * must relocate it. If it is embedded in the data section, then it
547 * will be relocated with other data.
548 */
549 if (gd->fdt_blob) {
550 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
551
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000552 gd->start_addr_sp -= gd->fdt_size;
553 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000554 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000555 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000556 }
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100557#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000558
559 return 0;
560}
561
Andreas Bießmann68145d42015-02-06 23:06:45 +0100562int arch_reserve_stacks(void)
563{
564 return 0;
565}
566
Simon Glass1938f4a2013-03-11 06:49:53 +0000567static int reserve_stacks(void)
568{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100569 /* make stack pointer 16-byte aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000570 gd->start_addr_sp -= 16;
571 gd->start_addr_sp &= ~0xf;
Simon Glass1938f4a2013-03-11 06:49:53 +0000572
573 /*
Simon Glass4c509342015-04-28 20:25:03 -0600574 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100575 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000576 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100577 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000578}
579
580static int display_new_sp(void)
581{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000582 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000583
584 return 0;
585}
586
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100587#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000588static int setup_board_part1(void)
589{
590 bd_t *bd = gd->bd;
591
592 /*
593 * Save local variables to board info struct
594 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000595 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
596 bd->bi_memsize = gd->ram_size; /* size in bytes */
597
598#ifdef CONFIG_SYS_SRAM_BASE
599 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
600 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
601#endif
602
Masahiro Yamada58dac322014-03-05 17:40:10 +0900603#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000604 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
605 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
606#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100607#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000608 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
609#endif
610#if defined(CONFIG_MPC83xx)
611 bd->bi_immrbar = CONFIG_SYS_IMMR;
612#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000613
614 return 0;
615}
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100616#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000617
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100618#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000619static int setup_board_part2(void)
620{
621 bd_t *bd = gd->bd;
622
623 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
624 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
625#if defined(CONFIG_CPM2)
626 bd->bi_cpmfreq = gd->arch.cpm_clk;
627 bd->bi_brgfreq = gd->arch.brg_clk;
628 bd->bi_sccfreq = gd->arch.scc_clk;
629 bd->bi_vco = gd->arch.vco_out;
630#endif /* CONFIG_CPM2 */
631#if defined(CONFIG_MPC512X)
632 bd->bi_ipsfreq = gd->arch.ips_clk;
633#endif /* CONFIG_MPC512X */
634#if defined(CONFIG_MPC5xxx)
635 bd->bi_ipbfreq = gd->arch.ipb_clk;
636 bd->bi_pcifreq = gd->pci_clk;
637#endif /* CONFIG_MPC5xxx */
Alison Wang1313db42015-02-12 18:33:15 +0800638#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
639 bd->bi_pcifreq = gd->pci_clk;
640#endif
641#if defined(CONFIG_EXTRA_CLOCK)
642 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
643 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
644 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
645#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000646
647 return 0;
648}
649#endif
650
651#ifdef CONFIG_SYS_EXTBDINFO
652static int setup_board_extra(void)
653{
654 bd_t *bd = gd->bd;
655
656 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
657 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
658 sizeof(bd->bi_r_version));
659
660 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
661 bd->bi_plb_busfreq = gd->bus_clk;
662#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
663 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
664 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
665 bd->bi_pci_busfreq = get_PCI_freq();
666 bd->bi_opbfreq = get_OPB_freq();
667#elif defined(CONFIG_XILINX_405)
668 bd->bi_pci_busfreq = get_PCI_freq();
669#endif
670
671 return 0;
672}
673#endif
674
Simon Glass1938f4a2013-03-11 06:49:53 +0000675#ifdef CONFIG_POST
676static int init_post(void)
677{
678 post_bootmode_init();
679 post_run(NULL, POST_ROM | post_bootmode_get(0));
680
681 return 0;
682}
683#endif
684
Simon Glass1938f4a2013-03-11 06:49:53 +0000685static int setup_dram_config(void)
686{
687 /* Ram is board specific, so move it to board code ... */
688 dram_init_banksize();
689
690 return 0;
691}
692
693static int reloc_fdt(void)
694{
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100695#ifndef CONFIG_OF_EMBED
Simon Glassf05ad9b2015-08-04 12:33:39 -0600696 if (gd->flags & GD_FLG_SKIP_RELOC)
697 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000698 if (gd->new_fdt) {
699 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
700 gd->fdt_blob = gd->new_fdt;
701 }
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100702#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000703
704 return 0;
705}
706
707static int setup_reloc(void)
708{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600709 if (gd->flags & GD_FLG_SKIP_RELOC) {
710 debug("Skipping relocation due to flag\n");
711 return 0;
712 }
713
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800714#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000715 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100716#ifdef CONFIG_M68K
717 /*
718 * On all ColdFire arch cpu, monitor code starts always
719 * just after the default vector table location, so at 0x400
720 */
721 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
722#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800723#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000724 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
725
726 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000727 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000728 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
729 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000730
731 return 0;
732}
733
734/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700735#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000736
737static int jump_to_copy(void)
738{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600739 if (gd->flags & GD_FLG_SKIP_RELOC)
740 return 0;
Simon Glass48a33802013-03-05 14:39:52 +0000741 /*
742 * x86 is special, but in a nice way. It uses a trampoline which
743 * enables the dcache if possible.
744 *
745 * For now, other archs use relocate_code(), which is implemented
746 * similarly for all archs. When we do generic relocation, hopefully
747 * we can make all archs enable the dcache prior to relocation.
748 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300749#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000750 /*
751 * SDRAM and console are now initialised. The final stack can now
752 * be setup in SDRAM. Code execution will continue in Flash, but
753 * with the stack in SDRAM and Global Data in temporary memory
754 * (CPU cache)
755 */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600756 arch_setup_gd(gd->new_gd);
Simon Glass48a33802013-03-05 14:39:52 +0000757 board_init_f_r_trampoline(gd->start_addr_sp);
758#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000759 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000760#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000761
762 return 0;
763}
764#endif
765
766/* Record the board_init_f() bootstage (after arch_cpu_init()) */
767static int mark_bootstage(void)
768{
769 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
770
771 return 0;
772}
773
Simon Glass9854a872015-11-08 23:47:48 -0700774static int initf_console_record(void)
775{
776#if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
777 return console_record_init();
778#else
779 return 0;
780#endif
781}
782
Simon Glassab7cd622014-07-23 06:55:04 -0600783static int initf_dm(void)
784{
785#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
786 int ret;
787
788 ret = dm_init_and_scan(true);
789 if (ret)
790 return ret;
791#endif
792
793 return 0;
794}
795
Simon Glass146251f2015-01-19 22:16:12 -0700796/* Architecture-specific memory reservation */
797__weak int reserve_arch(void)
798{
799 return 0;
800}
801
Simon Glassd4c671c2015-03-05 12:25:16 -0700802__weak int arch_cpu_init_dm(void)
803{
804 return 0;
805}
806
Simon Glass1938f4a2013-03-11 06:49:53 +0000807static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000808#ifdef CONFIG_SANDBOX
809 setup_ram_buf,
810#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000811 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700812#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700813 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700814#endif
Kevin Hilmand2107182014-12-09 15:03:58 -0800815#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700816 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800817#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700818 initf_malloc,
Simon Glass9854a872015-11-08 23:47:48 -0700819 initf_console_record,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000820#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
821 /* TODO: can this go into arch_cpu_init()? */
822 probecpu,
823#endif
Bin Menga52a068e2015-08-20 06:40:18 -0700824#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
825 x86_fsp_init,
826#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000827 arch_cpu_init, /* basic arch cpu dependent setup */
Simon Glass3ea09532014-09-03 17:36:59 -0600828 initf_dm,
Simon Glassd4c671c2015-03-05 12:25:16 -0700829 arch_cpu_init_dm,
Thomas Chou67521952015-10-30 15:35:51 +0800830 mark_bootstage, /* need timer, go after init dm */
Simon Glass1938f4a2013-03-11 06:49:53 +0000831#if defined(CONFIG_BOARD_EARLY_INIT_F)
832 board_early_init_f,
833#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000834 /* TODO: can any of this go into arch_cpu_init()? */
835#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
836 get_clocks, /* get CPU and bus clocks (etc.) */
837#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
838 && !defined(CONFIG_TQM885D)
839 adjust_sdram_tbs_8xx,
840#endif
841 /* TODO: can we rename this to timer_init()? */
842 init_timebase,
843#endif
Bin Meng2317cf02015-12-08 17:31:40 -0800844#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
Francois Retiefc97088c2015-10-28 15:18:22 +0200845 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
846 defined(CONFIG_SPARC)
Simon Glass1938f4a2013-03-11 06:49:53 +0000847 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000848#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000849#ifdef CONFIG_SYS_ALLOC_DPRAM
850#if !defined(CONFIG_CPM2)
851 dpram_init,
852#endif
853#endif
854#if defined(CONFIG_BOARD_POSTCLK_INIT)
855 board_postclk_init,
856#endif
Peng Fan76648462015-10-30 17:30:02 +0800857#if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
angelo@sysam.ite310b932015-02-12 01:40:17 +0100858 get_clocks,
859#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000860 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000861#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
862 /* get CPU and bus clocks according to the environment variable */
863 get_clocks_866,
864 /* adjust sdram refresh rate according to the new clock */
865 sdram_adjust_866,
866 init_timebase,
867#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000868 init_baud_rate, /* initialze baudrate settings */
869 serial_init, /* serial communications setup */
870 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000871#ifdef CONFIG_SANDBOX
872 sandbox_early_getopt_check,
873#endif
874#ifdef CONFIG_OF_CONTROL
875 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000876#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000877 display_options, /* say that we are here */
878 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900879#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000880 prt_8260_rsr,
881 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900882#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000883#if defined(CONFIG_MPC83xx)
884 prt_83xx_rsr,
885#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100886#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000887 checkcpu,
888#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000889 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000890#if defined(CONFIG_MPC5xxx)
891 prt_mpc5xxx_clks,
892#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000893#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900894 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000895#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000896 INIT_FUNC_WATCHDOG_INIT
897#if defined(CONFIG_MISC_INIT_F)
898 misc_init_f,
899#endif
900 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100901#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000902 init_func_i2c,
903#endif
904#if defined(CONFIG_HARD_SPI)
905 init_func_spi,
906#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000907 announce_dram_init,
908 /* TODO: unify all these dram functions? */
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800909#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
910 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
Simon Glass1938f4a2013-03-11 06:49:53 +0000911 dram_init, /* configure available RAM banks */
912#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100913#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000914 init_func_ram,
915#endif
916#ifdef CONFIG_POST
917 post_init_f,
918#endif
919 INIT_FUNC_WATCHDOG_RESET
920#if defined(CONFIG_SYS_DRAM_TEST)
921 testdram,
922#endif /* CONFIG_SYS_DRAM_TEST */
923 INIT_FUNC_WATCHDOG_RESET
924
Simon Glass1938f4a2013-03-11 06:49:53 +0000925#ifdef CONFIG_POST
926 init_post,
927#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000928 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000929 /*
930 * Now that we have DRAM mapped and working, we can
931 * relocate the code and continue running from DRAM.
932 *
933 * Reserve memory at end of RAM for (top down in that order):
934 * - area that won't get touched by U-Boot and Linux (optional)
935 * - kernel log buffer
936 * - protected RAM
937 * - LCD framebuffer
938 * - monitor code
939 * - board info struct
940 */
941 setup_dest_addr,
Thomas Choubbfdff32015-10-27 11:23:39 +0800942#if defined(CONFIG_BLACKFIN)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800943 /* Blackfin u-boot monitor should be on top of the ram */
944 reserve_uboot,
945#endif
Francois Retief1e85cce2015-11-23 13:05:44 +0200946#if defined(CONFIG_SPARC)
947 reserve_prom,
948#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000949#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
950 reserve_logbuffer,
951#endif
952#ifdef CONFIG_PRAM
953 reserve_pram,
954#endif
955 reserve_round_4k,
956#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
957 defined(CONFIG_ARM)
958 reserve_mmu,
959#endif
960#ifdef CONFIG_LCD
961 reserve_lcd,
962#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700963 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000964 /* TODO: Why the dependency on CONFIG_8xx? */
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800965#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
966 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
angelo@sysam.it944ab342015-03-28 11:34:52 +0100967 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000968 reserve_video,
969#endif
Thomas Choubbfdff32015-10-27 11:23:39 +0800970#if !defined(CONFIG_BLACKFIN)
Simon Glass1938f4a2013-03-11 06:49:53 +0000971 reserve_uboot,
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800972#endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000973#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000974 reserve_malloc,
975 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000976#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000977 setup_machine,
978 reserve_global_data,
979 reserve_fdt,
Simon Glass146251f2015-01-19 22:16:12 -0700980 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000981 reserve_stacks,
982 setup_dram_config,
983 show_dram_config,
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100984#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000985 setup_board_part1,
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100986#endif
987#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000988 INIT_FUNC_WATCHDOG_RESET
989 setup_board_part2,
990#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000991 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000992#ifdef CONFIG_SYS_EXTBDINFO
993 setup_board_extra,
994#endif
995 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000996 reloc_fdt,
997 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300998#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -0700999 copy_uboot_to_ram,
1000 clear_bss,
1001 do_elf_reloc_fixups,
1002#endif
Simon Glass808434c2013-11-10 10:26:59 -07001003#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +00001004 jump_to_copy,
1005#endif
1006 NULL,
1007};
1008
1009void board_init_f(ulong boot_flags)
1010{
York Sun2a1680e2014-05-02 17:28:04 -07001011#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1012 /*
1013 * For some archtectures, global data is initialized and used before
1014 * calling this function. The data should be preserved. For others,
1015 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1016 * here to host global data until relocation.
1017 */
Simon Glass1938f4a2013-03-11 06:49:53 +00001018 gd_t data;
1019
1020 gd = &data;
1021
David Fengcce6be72013-12-14 11:47:36 +08001022 /*
1023 * Clear global data before it is accessed at debug print
1024 * in initcall_run_list. Otherwise the debug print probably
1025 * get the wrong vaule of gd->have_console.
1026 */
David Fengcce6be72013-12-14 11:47:36 +08001027 zero_global_data();
1028#endif
1029
Simon Glass1938f4a2013-03-11 06:49:53 +00001030 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +04001031 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +00001032
1033 if (initcall_run_list(init_sequence_f))
1034 hang();
1035
Ben Stoltz9b217492015-07-31 09:31:37 -06001036#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1037 !defined(CONFIG_EFI_APP)
Simon Glass1938f4a2013-03-11 06:49:53 +00001038 /* NOTREACHED - jump_to_copy() does not return */
1039 hang();
1040#endif
1041}
1042
Alexey Brodkin3fb80162015-02-24 19:40:36 +03001043#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +00001044/*
1045 * For now this code is only used on x86.
1046 *
1047 * init_sequence_f_r is the list of init functions which are run when
1048 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1049 * The following limitations must be considered when implementing an
1050 * '_f_r' function:
1051 * - 'static' variables are read-only
1052 * - Global Data (gd->xxx) is read/write
1053 *
1054 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1055 * supported). It _should_, if possible, copy global data to RAM and
1056 * initialise the CPU caches (to speed up the relocation process)
1057 *
1058 * NOTE: At present only x86 uses this route, but it is intended that
1059 * all archs will move to this when generic relocation is implemented.
1060 */
1061static init_fnc_t init_sequence_f_r[] = {
1062 init_cache_f_r,
Simon Glass48a33802013-03-05 14:39:52 +00001063
1064 NULL,
1065};
1066
1067void board_init_f_r(void)
1068{
1069 if (initcall_run_list(init_sequence_f_r))
1070 hang();
1071
1072 /*
1073 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1074 * Transfer execution from Flash to RAM by calculating the address
1075 * of the in-RAM copy of board_init_r() and calling it
1076 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +03001077 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +00001078
1079 /* NOTREACHED - board_init_r() does not return */
1080 hang();
1081}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001082#endif /* CONFIG_X86 */