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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Fabio Estevam7dd65452012-09-24 08:09:33 +00002/*
3 * Copyright (C) 2012 Freescale Semiconductor, Inc.
4 *
Otavio Salvador903e7792012-10-02 09:22:10 +00005 * Configuration settings for the Freescale i.MX6Q SabreAuto board.
Fabio Estevam7dd65452012-09-24 08:09:33 +00006 */
7
Vanessa Maegimad7c11502017-06-29 09:33:46 -03008#ifndef __MX6SABREAUTO_CONFIG_H
9#define __MX6SABREAUTO_CONFIG_H
Fabio Estevam7dd65452012-09-24 08:09:33 +000010
Vanessa Maegima823dff92017-06-29 09:33:45 -030011#ifdef CONFIG_SPL
12#include "imx6_spl.h"
13#endif
14
Fabio Estevam7dd65452012-09-24 08:09:33 +000015#define CONFIG_MXC_UART_BASE UART4_BASE
Simon Glass12ca05a2016-10-17 20:12:39 -060016#define CONSOLE_DEV "ttymxc3"
Fabio Estevam7dd65452012-09-24 08:09:33 +000017
Knut Wohlrab73448b12013-01-21 23:11:21 +000018/* USB Configs */
Troy Kiskyd1a52862013-10-10 15:27:59 -070019#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
20#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
Knut Wohlrab73448b12013-01-21 23:11:21 +000021#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
22#define CONFIG_MXC_USB_FLAGS 0
23
Ye.Li8fe280f2014-10-30 18:53:49 +080024#define CONFIG_PCA953X
25#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
26
Pierre Aubertc1747972013-06-04 09:00:15 +020027#include "mx6sabre_common.h"
Otavio Salvador51535d92012-09-26 11:37:01 +000028
Diego Dorta07f6ddb2017-07-07 15:38:34 -030029/* Falcon Mode */
30#ifdef CONFIG_SPL_OS_BOOT
31#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
32#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
Diego Dorta07f6ddb2017-07-07 15:38:34 -030033#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
Diego Dorta07f6ddb2017-07-07 15:38:34 -030034
35/* Falcon Mode - MMC support: args@1MB kernel@2MB */
36#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
37#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
Diego Dorta07f6ddb2017-07-07 15:38:34 -030038#endif
39
Fabio Estevamca62e5d2017-07-10 15:59:11 -030040#ifdef CONFIG_MTD_NOR_FLASH
Fabio Estevamcdbdde32014-11-14 11:27:23 -020041#define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR
42#define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024)
Fabio Estevamcdbdde32014-11-14 11:27:23 -020043#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
Fabio Estevamcdbdde32014-11-14 11:27:23 -020044#define CONFIG_SYS_FLASH_EMPTY_INFO
Fabio Estevam565cfcf2016-12-15 16:00:11 -020045#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
Fabio Estevamca62e5d2017-07-10 15:59:11 -030046#endif
Fabio Estevamcdbdde32014-11-14 11:27:23 -020047
Shawn Guode7d02a2012-12-30 14:14:59 +000048#define CONFIG_SYS_FSL_USDHC_NUM 2
Shawn Guode7d02a2012-12-30 14:14:59 +000049
Ye.Li83bb3212014-11-12 14:02:05 +080050/* NAND stuff */
Ye.Li83bb3212014-11-12 14:02:05 +080051#define CONFIG_SYS_MAX_NAND_DEVICE 1
52#define CONFIG_SYS_NAND_BASE 0x40000000
Ye.Li83bb3212014-11-12 14:02:05 +080053
54/* DMA stuff, needed for GPMI/MXS NAND support */
Ye.Li83bb3212014-11-12 14:02:05 +080055
Ye.Li593243d2014-11-06 16:29:02 +080056/* PMIC */
Ye.Li593243d2014-11-06 16:29:02 +080057#define CONFIG_POWER_PFUZE100
58#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
59
Vanessa Maegimad7c11502017-06-29 09:33:46 -030060#endif /* __MX6SABREAUTO_CONFIG_H */