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Stefano Babic649a33e2010-11-30 11:46:56 -05001/*
2 * (C) Copyright 2010
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de
4 *
5 * Based on da850evm.c, original Copyrights follow:
6 *
7 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
8 *
9 * Based on da830evm.c. Original Copyrights follow:
10 *
11 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
12 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <common.h>
30#include <i2c.h>
31#include <net.h>
32#include <netdev.h>
33#include <asm/arch/hardware.h>
34#include <asm/arch/emif_defs.h>
35#include <asm/arch/emac_defs.h>
36#include <asm/io.h>
37#include <asm/arch/davinci_misc.h>
Bastian Ruppertca1646b2011-10-04 23:43:29 +000038#include <asm/arch/gpio.h>
Stefano Babic3c891012011-10-04 23:43:37 +000039#include <asm/arch/da8xx-fb.h>
Stefano Babic649a33e2010-11-30 11:46:56 -050040
41DECLARE_GLOBAL_DATA_PTR;
42
43#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
44
Stefano Babic3c891012011-10-04 23:43:37 +000045static const struct da8xx_panel lcd_panel = {
46 /* Casio COM57H531x */
47 .name = "Casio_COM57H531x",
48 .width = 640,
49 .height = 480,
50 .hfp = 12,
51 .hbp = 144,
52 .hsw = 30,
53 .vfp = 10,
54 .vbp = 35,
55 .vsw = 3,
56 .pxl_clk = 25000000,
57 .invert_pxl_clk = 0,
58};
59
Stefano Babic649a33e2010-11-30 11:46:56 -050060/* SPI0 pin muxer settings */
61static const struct pinmux_config spi1_pins[] = {
62 { pinmux(5), 1, 1 },
63 { pinmux(5), 1, 2 },
64 { pinmux(5), 1, 4 },
65 { pinmux(5), 1, 5 }
66};
67
Stefano Babic42059872011-10-04 23:43:38 +000068/* I2C pin muxer settings */
69static const struct pinmux_config i2c_pins[] = {
70 { pinmux(4), 2, 2 },
71 { pinmux(4), 2, 3 }
72};
73
Bastian Ruppertf9fc2372011-10-04 23:43:28 +000074/* UART0 pin muxer settings */
Stefano Babic649a33e2010-11-30 11:46:56 -050075static const struct pinmux_config uart_pins[] = {
Bastian Ruppertf9fc2372011-10-04 23:43:28 +000076 { pinmux(3), 2, 7 },
77 { pinmux(3), 2, 6 },
78 { pinmux(3), 2, 4 },
79 { pinmux(3), 2, 5 }
Stefano Babic649a33e2010-11-30 11:46:56 -050080};
81
82#ifdef CONFIG_DRIVER_TI_EMAC
83#define HAS_RMII 1
84static const struct pinmux_config emac_pins[] = {
85 { pinmux(14), 8, 2 },
86 { pinmux(14), 8, 3 },
87 { pinmux(14), 8, 4 },
88 { pinmux(14), 8, 5 },
89 { pinmux(14), 8, 6 },
90 { pinmux(14), 8, 7 },
91 { pinmux(15), 8, 1 },
92 { pinmux(4), 8, 0 },
93 { pinmux(4), 8, 1 }
94};
95#endif
96
97#ifdef CONFIG_NAND_DAVINCI
98const struct pinmux_config nand_pins[] = {
Stefano Babic17a89042011-10-04 23:43:30 +000099 { pinmux(7), 1, 0}, /* CS2 */
100 { pinmux(7), 0, 1}, /* CS3 in three state*/
101 { pinmux(7), 1, 4 }, /* EMA_WE */
102 { pinmux(7), 1, 5 }, /* EMA_OE */
103 { pinmux(9), 1, 0 }, /* EMA_D[7] */
104 { pinmux(9), 1, 1 }, /* EMA_D[6] */
105 { pinmux(9), 1, 2 }, /* EMA_D[5] */
106 { pinmux(9), 1, 3 }, /* EMA_D[4] */
107 { pinmux(9), 1, 4 }, /* EMA_D[3] */
108 { pinmux(9), 1, 5 }, /* EMA_D[2] */
109 { pinmux(9), 1, 6 }, /* EMA_D[1] */
110 { pinmux(9), 1, 7 }, /* EMA_D[0] */
111 { pinmux(12), 1, 5 }, /* EMA_A[2] */
112 { pinmux(12), 1, 6 }, /* EMA_A[1] */
113 { pinmux(6), 1, 0 } /* EMA_CLK */
Stefano Babic649a33e2010-11-30 11:46:56 -0500114};
115#endif
116
Bastian Ruppertca1646b2011-10-04 23:43:29 +0000117const struct pinmux_config gpio_pins[] = {
118 { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/
119 { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/
Bastian Ruppert8540b162011-10-04 23:43:34 +0000120 { pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/
121 { pinmux(19), 8, 5 }, /* GPIO6[1] DISP_ON */
122 { pinmux(14), 8, 1 } /* GPIO6[6] LCD_B_PWR*/
Bastian Ruppertca1646b2011-10-04 23:43:29 +0000123};
124
Stefano Babic3c891012011-10-04 23:43:37 +0000125const struct pinmux_config lcd_pins[] = {
126 { pinmux(17), 2, 1 }, /* LCD_D_0 */
127 { pinmux(17), 2, 0 }, /* LCD_D_1 */
128 { pinmux(16), 2, 7 }, /* LCD_D_2 */
129 { pinmux(16), 2, 6 }, /* LCD_D_3 */
130 { pinmux(16), 2, 5 }, /* LCD_D_4 */
131 { pinmux(16), 2, 4 }, /* LCD_D_5 */
132 { pinmux(16), 2, 3 }, /* LCD_D_6 */
133 { pinmux(16), 2, 2 }, /* LCD_D_7 */
134 { pinmux(18), 2, 1 }, /* LCD_D_8 */
135 { pinmux(18), 2, 0 }, /* LCD_D_9 */
136 { pinmux(17), 2, 7 }, /* LCD_D_10 */
137 { pinmux(17), 2, 6 }, /* LCD_D_11 */
138 { pinmux(17), 2, 5 }, /* LCD_D_12 */
139 { pinmux(17), 2, 4 }, /* LCD_D_13 */
140 { pinmux(17), 2, 3 }, /* LCD_D_14 */
141 { pinmux(17), 2, 2 }, /* LCD_D_15 */
142 { pinmux(18), 2, 6 }, /* LCD_PCLK */
143 { pinmux(19), 2, 0 }, /* LCD_HSYNC */
144 { pinmux(19), 2, 1 }, /* LCD_VSYNC */
145 { pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */
146};
147
Bastian Rupperte5ee9122011-10-04 23:43:33 +0000148const struct pinmux_config halten_pin[] = {
149 { pinmux(3), 4, 2 } /* GPIO8[6] HALTEN */
150};
151
Stefano Babic649a33e2010-11-30 11:46:56 -0500152static const struct pinmux_resource pinmuxes[] = {
153#ifdef CONFIG_SPI_FLASH
154 PINMUX_ITEM(spi1_pins),
155#endif
156 PINMUX_ITEM(uart_pins),
Stefano Babic42059872011-10-04 23:43:38 +0000157 PINMUX_ITEM(i2c_pins),
Stefano Babic649a33e2010-11-30 11:46:56 -0500158#ifdef CONFIG_NAND_DAVINCI
159 PINMUX_ITEM(nand_pins),
160#endif
Stefano Babic3c891012011-10-04 23:43:37 +0000161#ifdef CONFIG_VIDEO
162 PINMUX_ITEM(lcd_pins),
163#endif
Stefano Babic649a33e2010-11-30 11:46:56 -0500164};
165
166static const struct lpsc_resource lpsc[] = {
167 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
168 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
169 { DAVINCI_LPSC_EMAC }, /* image download */
Bastian Ruppertf9fc2372011-10-04 23:43:28 +0000170 { DAVINCI_LPSC_UART0 }, /* console */
Stefano Babic649a33e2010-11-30 11:46:56 -0500171 { DAVINCI_LPSC_GPIO },
Stefano Babic3c891012011-10-04 23:43:37 +0000172 { DAVINCI_LPSC_LCDC }, /* LCD */
Stefano Babic649a33e2010-11-30 11:46:56 -0500173};
174
Stefano Babic1c6ec6d2011-10-04 23:43:31 +0000175int board_early_init_f(void)
Stefano Babic649a33e2010-11-30 11:46:56 -0500176{
Bastian Ruppertca1646b2011-10-04 23:43:29 +0000177 struct davinci_gpio *gpio6_base =
178 (struct davinci_gpio *)DAVINCI_GPIO_BANK67;
179
180 /* PinMux for GPIO */
181 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
182 return 1;
183
184 /* Set the RESETOUTn low */
185 writel((readl(&gpio6_base->set_data) & ~(1 << 15)),
186 &gpio6_base->set_data);
187 writel((readl(&gpio6_base->dir) & ~(1 << 15)), &gpio6_base->dir);
188
189 /* Set U0_SW0 low for UART0 as console*/
190 writel((readl(&gpio6_base->set_data) & ~(1 << 10)),
191 &gpio6_base->set_data);
192 writel((readl(&gpio6_base->dir) & ~(1 << 10)), &gpio6_base->dir);
193
194 /* Set U0_SW1 low for UART0 as console*/
195 writel((readl(&gpio6_base->set_data) & ~(1 << 12)),
196 &gpio6_base->set_data);
197 writel((readl(&gpio6_base->dir) & ~(1 << 12)), &gpio6_base->dir);
198
Bastian Ruppert8540b162011-10-04 23:43:34 +0000199 /* Set LCD_B_PWR low to power down LCD Backlight*/
200 writel((readl(&gpio6_base->set_data) & ~(1 << 6)),
201 &gpio6_base->set_data);
202 writel((readl(&gpio6_base->dir) & ~(1 << 6)), &gpio6_base->dir);
203
204 /* Set DISP_ON low to disable LCD output*/
205 writel((readl(&gpio6_base->set_data) & ~(1 << 1)),
206 &gpio6_base->set_data);
207 writel((readl(&gpio6_base->dir) & ~(1 << 1)), &gpio6_base->dir);
208
Stefano Babic649a33e2010-11-30 11:46:56 -0500209#ifndef CONFIG_USE_IRQ
210 irq_init();
211#endif
212
Stefano Babic649a33e2010-11-30 11:46:56 -0500213 /*
214 * NAND CS setup - cycle counts based on da850evm NAND timings in the
215 * Linux kernel @ 25MHz EMIFA
216 */
Stefano Babic17a89042011-10-04 23:43:30 +0000217#ifdef CONFIG_NAND_DAVINCI
Stefano Babic649a33e2010-11-30 11:46:56 -0500218 writel((DAVINCI_ABCR_WSETUP(0) |
Stefano Babic17a89042011-10-04 23:43:30 +0000219 DAVINCI_ABCR_WSTROBE(1) |
Stefano Babic649a33e2010-11-30 11:46:56 -0500220 DAVINCI_ABCR_WHOLD(0) |
221 DAVINCI_ABCR_RSETUP(0) |
222 DAVINCI_ABCR_RSTROBE(1) |
223 DAVINCI_ABCR_RHOLD(0) |
224 DAVINCI_ABCR_TA(0) |
225 DAVINCI_ABCR_ASIZE_8BIT),
Stefano Babic17a89042011-10-04 23:43:30 +0000226 &davinci_emif_regs->ab1cr); /* CS2 */
Stefano Babic649a33e2010-11-30 11:46:56 -0500227#endif
228
Stefano Babic649a33e2010-11-30 11:46:56 -0500229 /*
230 * Power on required peripherals
231 * ARM does not have access by default to PSC0 and PSC1
232 * assuming here that the DSP bootloader has set the IOPU
233 * such that PSC access is available to ARM
234 */
235 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
236 return 1;
237
238 /* setup the SUSPSRC for ARM to control emulation suspend */
239 writel(readl(&davinci_syscfg_regs->suspsrc) &
240 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
241 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
Bastian Ruppertf9fc2372011-10-04 23:43:28 +0000242 DAVINCI_SYSCFG_SUSPSRC_UART0),
Stefano Babic649a33e2010-11-30 11:46:56 -0500243 &davinci_syscfg_regs->suspsrc);
244
245 /* configure pinmux settings */
246 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
247 return 1;
248
249#ifdef CONFIG_DRIVER_TI_EMAC
250 if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
251 return 1;
252
253 davinci_emac_mii_mode_sel(HAS_RMII);
254#endif /* CONFIG_DRIVER_TI_EMAC */
255
256 /* enable the console UART */
257 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
258 DAVINCI_UART_PWREMU_MGMT_UTRST),
Bastian Ruppertf9fc2372011-10-04 23:43:28 +0000259 &davinci_uart0_ctrl_regs->pwremu_mgmt);
Stefano Babic649a33e2010-11-30 11:46:56 -0500260
Stefano Babic3c891012011-10-04 23:43:37 +0000261 /*
262 * Reconfigure the LCDC priority to the highest to ensure that
263 * the throughput/latency requirements for the LCDC are met.
264 */
265 writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff,
266 &davinci_syscfg_regs->mstpri[2]);
267
268 /* Set LCD_B_PWR low to power up LCD Backlight*/
269 writel((readl(&gpio6_base->set_data) | (1 << 6)),
270 &gpio6_base->set_data);
271
272 /* Set DISP_ON low to disable LCD output*/
273 writel((readl(&gpio6_base->set_data) | (1 << 1)),
274 &gpio6_base->set_data);
275
Stefano Babic649a33e2010-11-30 11:46:56 -0500276 return 0;
277}
278
Stefano Babic1c6ec6d2011-10-04 23:43:31 +0000279int board_init(void)
280{
281 /* arch number of the board */
282 gd->bd->bi_arch_number = MACH_TYPE_EA20;
283
284 /* address of boot parameters */
285 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
286
Stefano Babic3c891012011-10-04 23:43:37 +0000287 da8xx_video_init(&lcd_panel, 16);
288
Stefano Babic1c6ec6d2011-10-04 23:43:31 +0000289 return 0;
290}
Bastian Rupperte5ee9122011-10-04 23:43:33 +0000291
292#ifdef BOARD_LATE_INIT
293
294int board_late_init(void)
295{
296 struct davinci_gpio *gpio8_base =
297 (struct davinci_gpio *)DAVINCI_GPIO_BANK8;
298
299 /* PinMux for HALTEN */
300 if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0)
301 return 1;
302
303 /* Set HALTEN to high */
304 writel((readl(&gpio8_base->set_data) | (1 << 6)),
305 &gpio8_base->set_data);
306 writel((readl(&gpio8_base->dir) & ~(1 << 6)), &gpio8_base->dir);
307
Stefano Babic3c891012011-10-04 23:43:37 +0000308 setenv("stdout", "serial");
309
Bastian Rupperte5ee9122011-10-04 23:43:33 +0000310 return 0;
311}
312#endif /* BOARD_LATE_INIT */
313
Stefano Babic649a33e2010-11-30 11:46:56 -0500314#ifdef CONFIG_DRIVER_TI_EMAC
315
316/*
317 * Initializes on-board ethernet controllers.
318 */
319int board_eth_init(bd_t *bis)
320{
321 if (!davinci_emac_initialize()) {
322 printf("Error: Ethernet init failed!\n");
323 return -1;
324 }
325
326 /*
327 * This board has a RMII PHY. However, the MDC line on the SOM
328 * must not be disabled (there is no MII PHY on the
329 * baseboard) via the GPIO2[6], because this pin
330 * disables at the same time the SPI flash.
331 */
332
333 return 0;
334}
335#endif /* CONFIG_DRIVER_TI_EMAC */