Blame - arch/arm/mach-mvebu/Kconfig - platform/external/u-boot

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Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	1	if ARCH_MVEBU
				2
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	3	config HAVE_MVEBU_EFUSE
				4	bool
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	5
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	6	config ARMADA_32BIT
				7	bool
Michal Simek	58008cb	2018-07-23 15:55:15 +0200	[diff] [blame]	8	select BOARD_EARLY_INIT_F
Lokesh Vutla	acf1500	2018-04-26 18:21:26 +0530	[diff] [blame]	9	select CPU_V7A
Stefan Roese	237b629	2019-04-11 08:58:32 +0200	[diff] [blame]	10	select SPL_DM if SPL
				11	select SPL_DM_SEQ_ALIAS if SPL
				12	select SPL_OF_CONTROL if SPL
Tom Rini	7609e02	2021-10-15 10:54:41 -0400	[diff] [blame]	13	select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese	237b629	2019-04-11 08:58:32 +0200	[diff] [blame]	14	select SPL_SIMPLE_BUS if SPL
Michal Simek	58008cb	2018-07-23 15:55:15 +0200	[diff] [blame]	15	select SUPPORT_SPL
Philip Oberfichtner	1116888	2022-08-17 15:07:12 +0200	[diff] [blame]	16	select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese	f2100f6	2019-04-12 16:42:28 +0200	[diff] [blame]	17	select TRANSLATION_OFFSET
Alexander Dahl	b646a10	2023-12-21 08:26:10 +0100	[diff] [blame]	18	select TOOLS_KWBIMAGE if SPL
Pali Rohár	2975bba	2022-04-06 16:20:20 +0200	[diff] [blame]	19	select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Rohár	5bb2c55	2022-05-06 11:05:14 +0200	[diff] [blame]	20	select ARCH_VERY_EARLY_INIT
Marek Behún	383969d	2024-04-04 09:50:59 +0200	[diff] [blame]	21	select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU
Marek Behún	0c350a6	2024-04-04 09:51:00 +0200	[diff] [blame]	22	select ARMADA_32BIT_SYSCON_SYSRESET if SYSRESET
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	23
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	24	# ARMv7 SoCs...
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	25	config ARMADA_375
				26	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	27	select ARMADA_32BIT
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	28
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	29	config ARMADA_38X
				30	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	31	select ARMADA_32BIT
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	32	select HAVE_MVEBU_EFUSE
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	33
Joshua Scott	28f0cbc	2020-11-09 10:14:08 +1300	[diff] [blame]	34	config ARMADA_38X_HS_IMPEDANCE_THRESH
				35	hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
				36	depends on ARMADA_38X
				37	default 0x6
				38	range 0x0 0x7
				39
Marek Behún	aff4ea1	2024-06-18 17:34:38 +0200	[diff] [blame^]	40	config ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING
				41	bool
				42	depends on ARMADA_38X
				43
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	44	config ARMADA_XP
				45	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	46	select ARMADA_32BIT
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	47
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	48	# ARMv8 SoCs...
				49	config ARMADA_3700
				50	bool
				51	select ARM64
Pali Rohár	10154b8	2022-02-23 14:15:45 +0100	[diff] [blame]	52	select HAVE_MVEBU_EFUSE
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	53
Stefan Roese	21b29fc	2016-05-25 08:13:45 +0200	[diff] [blame]	54	# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
				55	config ARMADA_8K
				56	bool
				57	select ARM64
				58
Chris Packham	7d7bb99	2022-11-05 17:23:59 +1300	[diff] [blame]	59	config ALLEYCAT_5
				60	bool
				61	select ARM64
				62
Chris Packham	a53d97a	2016-10-26 14:08:30 +1300	[diff] [blame]	63	# Armada PLL frequency (used for NAND clock generation)
				64	config SYS_MVEBU_PLL_CLOCK
				65	int
Chris Packham	0d0df46	2019-04-11 22:22:50 +1200	[diff] [blame]	66	default "2000000000" if ARMADA_XP \|\| ARMADA_3700 \|\| ARMADA_8K \|\| ARMADA_MSYS
Chris Packham	a53d97a	2016-10-26 14:08:30 +1300	[diff] [blame]	67	default "1000000000" if ARMADA_38X \|\| ARMADA_375
				68
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	69	# Armada XP/38x SoC types...
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	70	config MV78230
				71	bool
				72	select ARMADA_XP
				73
				74	config MV78260
				75	bool
				76	select ARMADA_XP
Simon Glass	3bf926c	2017-06-14 21:28:24 -0600	[diff] [blame]	77	imply CMD_SATA
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	78
				79	config MV78460
				80	bool
				81	select ARMADA_XP
				82
Chris Packham	0d0df46	2019-04-11 22:22:50 +1200	[diff] [blame]	83	config ARMADA_MSYS
				84	bool
				85	select ARMADA_32BIT
				86
				87	config 98DX4251
				88	bool
				89	select ARMADA_MSYS
				90
				91	config 98DX3336
				92	bool
				93	select ARMADA_MSYS
				94
				95	config 98DX3236
				96	bool
				97	select ARMADA_MSYS
				98
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	99	config 88F6820
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	100	bool
				101	select ARMADA_38X
				102
Tom Rini	53dbf11	2022-03-30 18:07:24 -0400	[diff] [blame]	103	config CUSTOMER_BOARD_SUPPORT
				104	bool
				105
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	106	config DDR4
				107	bool "Support Marvell DDR4 Training driver"
				108
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	109	choice
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	110	prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	111	optional
				112
Stefan Roese	0299c90	2015-10-20 15:14:47 +0200	[diff] [blame]	113	config TARGET_CLEARFOG
				114	bool "Support ClearFog"
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	115	select 88F6820
Baruch Siach	867572f	2020-01-20 14:20:13 +0200	[diff] [blame]	116	select BOARD_LATE_INIT
Martin Rowe	c733fe9	2023-03-27 21:24:09 +1000	[diff] [blame]	117	select OF_BOARD_SETUP
Stefan Roese	0299c90	2015-10-20 15:14:47 +0200	[diff] [blame]	118
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	119	config TARGET_HELIOS4
				120	bool "Support Helios4"
				121	select 88F6820
				122
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	123	config TARGET_MVEBU_ARMADA_37XX
				124	bool "Support Armada 37xx platforms"
Stefan Roese	01e62c7	2016-05-17 15:04:16 +0200	[diff] [blame]	125	select ARMADA_3700
Simon Glass	fedb428	2017-06-14 21:28:21 -0600	[diff] [blame]	126	imply SCSI
Stefan Roese	01e62c7	2016-05-17 15:04:16 +0200	[diff] [blame]	127
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	128	config TARGET_DB_88F6720
				129	bool "Support DB-88F6720 Armada 375"
				130	select ARMADA_375
				131
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	132	config TARGET_DB_88F6820_GP
				133	bool "Support DB-88F6820-GP"
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	134	select 88F6820
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	135
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	136	config TARGET_DB_88F6820_AMC
				137	bool "Support DB-88F6820-AMC"
				138	select 88F6820
				139
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	140	config TARGET_TURRIS_OMNIA
				141	bool "Support Turris Omnia"
				142	select 88F6820
Marek Behún	539f024	2019-05-02 16:53:37 +0200	[diff] [blame]	143	select BOARD_LATE_INIT
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	144	select DM_I2C
				145	select I2C_MUX
				146	select I2C_MUX_PCA954x
Marek Behún	6d7bfb6	2021-10-09 19:33:46 +0200	[diff] [blame]	147	select SPL_DRIVERS_MISC
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	148	select SPL_I2C_MUX
Marek Behún	2c8a4e4	2021-10-09 19:33:45 +0200	[diff] [blame]	149	select SPL_SYS_MALLOC_SIMPLE
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	150	select SYS_I2C_MVTWSI
Marek Behún	6b26f3e	2019-05-02 16:53:32 +0200	[diff] [blame]	151	select ATSHA204A
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	152
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	153	config TARGET_TURRIS_MOX
Marek Behún	94c0f0b	2023-10-20 16:29:16 +0200	[diff] [blame]	154	bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe"
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	155	select ARMADA_3700
Marek Behún	94c0f0b	2023-10-20 16:29:16 +0200	[diff] [blame]	156	select BOARD_TYPES
				157	select ENV_IS_IN_MMC
				158	select ENV_IS_IN_SPI_FLASH
				159	select MULTI_DTB_FIT
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	160
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	161	config TARGET_MVEBU_ARMADA_8K
				162	bool "Support Armada 7k/8k platforms"
Stefan Roese	6f8c2d4	2016-05-25 08:21:21 +0200	[diff] [blame]	163	select ARMADA_8K
Tom Rini	e5ec481	2017-01-22 19:43:11 -0500	[diff] [blame]	164	select BOARD_LATE_INIT
Simon Glass	fedb428	2017-06-14 21:28:21 -0600	[diff] [blame]	165	imply SCSI
Stefan Roese	6f8c2d4	2016-05-25 08:21:21 +0200	[diff] [blame]	166
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	167	config TARGET_MVEBU_ALLEYCAT5
				168	bool "Support AlleyCat 5 platforms"
				169	select ALLEYCAT_5
				170
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	171	config TARGET_OCTEONTX2_CN913x
				172	bool "Support CN913x platforms"
				173	select ARMADA_8K
				174	imply BOARD_EARLY_INIT_R
				175	select BOARD_LATE_INIT
				176	imply SCSI
				177
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	178	config TARGET_DB_MV784MP_GP
				179	bool "Support db-mv784mp-gp"
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	180	select BOARD_ECC_SUPPORT
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	181	select MV78460
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	182
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	183	config TARGET_DS116
				184	bool "Support Synology DS116"
				185	select 88F6820
				186
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	187	config TARGET_DS414
				188	bool "Support Synology DS414"
				189	select MV78230
				190
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	191	config TARGET_MAXBCM
				192	bool "Support maxbcm"
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	193	select BOARD_ECC_SUPPORT
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	194	select MV78460
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	195
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	196	config TARGET_N2350
				197	bool "Support Thecus N2350"
				198	select 88F6820
				199	select DDR4
				200
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	201	config TARGET_THEADORABLE
				202	bool "Support theadorable Armada XP"
Tom Rini	e5ec481	2017-01-22 19:43:11 -0500	[diff] [blame]	203	select BOARD_LATE_INIT if USB
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	204	select MV78260
Simon Glass	3bf926c	2017-06-14 21:28:24 -0600	[diff] [blame]	205	imply CMD_SATA
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	206
Dirk Eibach	6008326	2017-02-22 16:07:23 +0100	[diff] [blame]	207	config TARGET_CONTROLCENTERDC
				208	bool "Support CONTROLCENTERDC"
				209	select 88F6820
Tom Rini	53dbf11	2022-03-30 18:07:24 -0400	[diff] [blame]	210	select CUSTOMER_BOARD_SUPPORT
Dirk Eibach	6008326	2017-02-22 16:07:23 +0100	[diff] [blame]	211
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	212	config TARGET_X530
				213	bool "Support Allied Telesis x530"
				214	select 88F6820
				215
Chris Packham	4c97c4b	2023-07-10 10:47:36 +1200	[diff] [blame]	216	config TARGET_X240
				217	bool "Support Allied Telesis x240"
				218	select ALLEYCAT_5
				219
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	220	config TARGET_DB_XC3_24G4XG
				221	bool "Support DB-XC3-24G4XG"
				222	select 98DX3336
				223
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	224	config TARGET_CRS3XX_98DX3236
				225	bool "Support CRS3XX-98DX3236"
Luka Kovacic	22bb913	2019-05-07 19:35:55 +0200	[diff] [blame]	226	select 98DX3236
				227
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	228	endchoice
				229
Tom Rini	5b527c5	2021-08-21 13:50:13 -0400	[diff] [blame]	230	choice
				231	prompt "DDR bus width"
				232	default DDR_64BIT
				233	depends on ARMADA_XP
				234
				235	config DDR_64BIT
				236	bool "64bit bus width"
				237
				238	config DDR_32BIT
				239	bool "32bit bus width"
				240
				241	endchoice
				242
Tom Rini	f66a3fd	2021-08-21 13:50:15 -0400	[diff] [blame]	243	config DDR_LOG_LEVEL
				244	int "DDR training code log level"
				245	depends on ARMADA_XP
				246	default 0
				247	range 0 3
				248	help
				249	Amount of information provided on error while running the DDR
				250	training code. At level 0, provides an error code in a case of
				251	failure, RL, WL errors and other algorithm failure. At level 1,
				252	provides the D-Unit setup (SPD/Static configuration). At level 2,
				253	provides the windows margin as a results of DQS centeralization.
				254	At level 3, rovides the windows margin of each DQ as a results of
				255	DQS centeralization.
				256
Marek Behún	259556e	2024-06-18 17:34:28 +0200	[diff] [blame]	257	config DDR_IMMUTABLE_DEBUG_SETTINGS
				258	bool "Immutable DDR debug level (always DEBUG_LEVEL_ERROR)"
				259	depends on ARMADA_38X
				260	help
				261	Makes the DDR training code debug level settings immutable.
				262	The debug level setting from board topology definition is ignored.
				263	The debug level is always set to DEBUG_LEVEL_ERROR and register
				264	dumps are disabled.
				265	This can save around 10 KiB of space in SPL binary.
				266
Marek Behún	871ee66	2022-02-17 13:54:42 +0100	[diff] [blame]	267	config DDR_RESET_ON_TRAINING_FAILURE
				268	bool "Reset the board on DDR training failure instead of hanging"
				269	depends on ARMADA_38X \|\| ARMADA_XP
				270	help
				271	If DDR training fails in SPL, reset the board instead of hanging.
				272	Some boards are known to fail DDR training occasionally and an
				273	immediate reset may be preferable to waiting until the board is
				274	reset by watchdog (if there even is one).
				275
				276	Note that if booting via UART and the DDR training fails, the
				277	device will still hang - it doesn't make sense to reset the board
				278	in such a case.
				279
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	280	config BOARD_ECC_SUPPORT
				281	bool
				282
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	283	config SYS_BOARD
				284	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	285	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	286	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	287	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	288	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	289	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	290	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	291	default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	292	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	293	default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	294	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	295	default "ds116" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	296	default "ds414" if TARGET_DS414
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	297	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	298	default "n2350" if TARGET_N2350
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	299	default "theadorable" if TARGET_THEADORABLE
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	300	default "a38x" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	301	default "x530" if TARGET_X530
Chris Packham	4c97c4b	2023-07-10 10:47:36 +1200	[diff] [blame]	302	default "x240" if TARGET_X240
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	303	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	304	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	305	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	306
				307	config SYS_CONFIG_NAME
				308	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	309	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	310	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	311	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	312	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	313	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	314	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	315	default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	316	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	317	default "ds116" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	318	default "ds414" if TARGET_DS414
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	319	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	320	default "n2350" if TARGET_N2350
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	321	default "theadorable" if TARGET_THEADORABLE
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	322	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	323	default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	324	default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	325	default "x530" if TARGET_X530
Chris Packham	4c97c4b	2023-07-10 10:47:36 +1200	[diff] [blame]	326	default "x240" if TARGET_X240
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	327	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	328	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	329	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	330
				331	config SYS_VENDOR
				332	default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	333	default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	334	default "Marvell" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	335	default "Marvell" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	336	default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	337	default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	338	default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	339	default "Marvell" if TARGET_DB_XC3_24G4XG
				340	default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	341	default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	342	default "kobol" if TARGET_HELIOS4
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	343	default "Synology" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	344	default "Synology" if TARGET_DS414
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	345	default "thecus" if TARGET_N2350
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	346	default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	347	default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	348	default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	349	default "alliedtelesis" if TARGET_X530
Chris Packham	4c97c4b	2023-07-10 10:47:36 +1200	[diff] [blame]	350	default "alliedtelesis" if TARGET_X240
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	351	default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	352	default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	353
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	354	config SYS_SOC
				355	default "mvebu"
				356
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	357	choice
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	358	prompt "Boot method"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	359	depends on SPL
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	360
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	361	config MVEBU_SPL_BOOT_DEVICE_SPI
Pali Rohár	41d52f3	2023-01-10 23:13:01 +0100	[diff] [blame]	362	bool "NOR flash (SPI or parallel)"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	363	imply ENV_IS_IN_SPI_FLASH
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	364	imply SPL_DM_SPI
				365	imply SPL_SPI_FLASH_SUPPORT
				366	imply SPL_SPI_LOAD
Simon Glass	ea2ca7e	2021-08-08 12:20:14 -0600	[diff] [blame]	367	imply SPL_SPI
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	368	select SPL_BOOTROM_SUPPORT
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	369
Pali Rohár	67bd615	2023-01-10 22:55:21 +0100	[diff] [blame]	370	config MVEBU_SPL_BOOT_DEVICE_NAND
				371	bool "NAND flash (SPI or parallel)"
				372	select MTD_RAW_NAND
				373	select SPL_BOOTROM_SUPPORT
				374
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	375	config MVEBU_SPL_BOOT_DEVICE_MMC
Pali Rohár	41d52f3	2023-01-10 23:13:01 +0100	[diff] [blame]	376	bool "eMMC or SD card"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	377	imply ENV_IS_IN_MMC
				378	# GPIO needed for eMMC/SD card presence detection
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	379	imply SPL_DM_GPIO
				380	imply SPL_DM_MMC
				381	imply SPL_GPIO
				382	imply SPL_LIBDISK_SUPPORT
Simon Glass	103c5f1	2021-08-08 12:20:09 -0600	[diff] [blame]	383	imply SPL_MMC
Pali Rohár	2f27db2	2023-01-08 13:31:41 +0100	[diff] [blame]	384	select SUPPORT_EMMC_BOOT if SPL_MMC
Pali Rohár	913d756	2023-01-09 00:52:09 +0100	[diff] [blame]	385	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	386	select SPL_BOOTROM_SUPPORT
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	387
Baruch Siach	22c6545	2019-05-16 13:03:58 +0300	[diff] [blame]	388	config MVEBU_SPL_BOOT_DEVICE_SATA
				389	bool "SATA"
Simon Glass	f756037	2021-08-08 12:20:17 -0600	[diff] [blame]	390	imply SPL_SATA
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	391	imply SPL_LIBDISK_SUPPORT
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	392	select SPL_BOOTROM_SUPPORT
Baruch Siach	22c6545	2019-05-16 13:03:58 +0300	[diff] [blame]	393
Pali Rohár	50afad5	2023-01-10 23:09:15 +0100	[diff] [blame]	394	config MVEBU_SPL_BOOT_DEVICE_PEX
				395	bool "PCI Express"
				396	select SPL_BOOTROM_SUPPORT
				397
Baruch Siach	72c4e67	2018-06-18 21:56:26 +0300	[diff] [blame]	398	config MVEBU_SPL_BOOT_DEVICE_UART
				399	bool "UART"
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	400	select SPL_BOOTROM_SUPPORT
Baruch Siach	72c4e67	2018-06-18 21:56:26 +0300	[diff] [blame]	401
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	402	endchoice
				403
Pali Rohár	67bd615	2023-01-10 22:55:21 +0100	[diff] [blame]	404	config MVEBU_SPL_NAND_BADBLK_LOCATION
				405	hex "NAND Bad block indicator location"
				406	depends on MVEBU_SPL_BOOT_DEVICE_NAND
				407	range 0x0 0x1
				408	help
				409	Value 0x0 = SLC flash = BBI at page 0 or page 1
				410	Value 0x1 = MLC flash = BBI at last page in the block
				411
Pali Rohár	c62af15	2023-03-29 21:25:58 +0200	[diff] [blame]	412	config MVEBU_SPL_SATA_BLKSZ
				413	int "SATA block size"
				414	depends on MVEBU_SPL_BOOT_DEVICE_SATA
				415	range 512 32768
				416	default 512
				417	help
				418	Block size of the SATA disk in bytes.
				419	Typically 512 bytes for majority of disks
				420	and 4096 bytes for 4K Native disks.
				421
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	422	config MVEBU_EFUSE
				423	bool "Enable eFuse support"
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	424	depends on HAVE_MVEBU_EFUSE
				425	help
				426	Enable support for reading and writing eFuses on mvebu SoCs.
				427
				428	config MVEBU_EFUSE_FAKE
				429	bool "Fake eFuse access (dry run)"
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	430	depends on MVEBU_EFUSE
				431	help
				432	This enables a "dry run" mode where eFuses are not really programmed.
				433	Instead the eFuse accesses are emulated by writing to and reading
				434	from a memory block.
				435	This is can be used for testing prog scripts.
				436
Pali Rohár	8092d1d	2022-09-22 13:43:45 +0200	[diff] [blame]	437	config MVEBU_EFUSE_VHV_GPIO
				438	string "VHV_Enable GPIO name for eFuse programming"
				439	depends on MVEBU_EFUSE && !ARMADA_3700
				440	help
				441	The eFuse programing (burning) phase requires supplying 1.8V to the
				442	device on the VHV power pin, while for normal operation the VHV power
				443	rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
				444	document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
				445	.
				446	This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
				447
				448	config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
				449	bool "VHV_Enable GPIO is Active Low"
				450	depends on MVEBU_EFUSE_VHV_GPIO != ""
				451
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	452	config SECURED_MODE_IMAGE
				453	bool "Build image for trusted boot"
				454	default false
				455	depends on 88F6820
				456	help
				457	Build an image that employs the ARMADA SoC's trusted boot framework
				458	for securely booting images.
				459
				460	config SECURED_MODE_CSK_INDEX
				461	int "Index of active CSK"
				462	default 0
				463	depends on SECURED_MODE_IMAGE
				464
Tony Dinh	21f6227	2023-03-02 19:27:29 -0800	[diff] [blame]	465	config SF_DEFAULT_SPEED
				466	int "Default speed for SPI flash in Hz"
				467	default 10000000
				468	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				469
				470	config SF_DEFAULT_MODE
				471	hex "Default mode for SPI flash"
				472	default 0x0
				473	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				474
Marek Behún	0c350a6	2024-04-04 09:51:00 +0200	[diff] [blame]	475	config ARMADA_32BIT_SYSCON
				476	bool
				477	depends on ARMADA_32BIT
				478	select REGMAP
				479	select SYSCON
				480
Marek Behún	ab900a6	2024-04-04 09:50:58 +0200	[diff] [blame]	481	config ARMADA_32BIT_SYSCON_RESET
				482	bool "Support Armada XP/375/38x/39x reset controller"
				483	depends on ARMADA_32BIT
				484	depends on DM_RESET
Marek Behún	0c350a6	2024-04-04 09:51:00 +0200	[diff] [blame]	485	select ARMADA_32BIT_SYSCON
Marek Behún	ab900a6	2024-04-04 09:50:58 +0200	[diff] [blame]	486	help
				487	Build support for Armada XP/375/38x/39x reset controller. This is
				488	needed for PCIe support.
				489
Marek Behún	0c350a6	2024-04-04 09:51:00 +0200	[diff] [blame]	490	config ARMADA_32BIT_SYSCON_SYSRESET
				491	bool "Support Armada XP/375/38x/39x sysreset via driver model"
				492	depends on ARMADA_32BIT
				493	depends on SYSRESET
				494	select ARMADA_32BIT_SYSCON
				495	help
				496	Build support for Armada XP/375/38x/39x system reset via driver model.
				497
Joel Johnson	9f205d6	2020-03-23 14:21:32 -0600	[diff] [blame]	498	source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore	5a3db5d	2020-12-08 21:07:36 -0600	[diff] [blame]	499	source "board/kobol/helios4/Kconfig"
Joel Johnson	9f205d6	2020-03-23 14:21:32 -0600	[diff] [blame]	500
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	501	endif